[llvm] [SDAG] Allow S/Zext in select-abd pattern (PR #191207)

[via llvm-commits]

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@@ -12725,38 +12725,47 @@ SDValue DAGCombiner::foldSelectToABD(SDValue LHS, SDValue RHS, SDValue True,
       TLI.isTypeLegal(VT) || TLI.getTypeAction(*DAG.getContext(), VT) ==
                                  TargetLowering::TypePromoteInteger;
 
+  auto LHSPat = ISD::isSignedIntSetCC(CC) ? m_SExtOrSelf(m_Specific(LHS))
+                                          : m_ZExtOrSelf(m_Specific(LHS));
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DaKnig wrote:

it does not match the pattern then and is incorrect to combine.

https://github.com/llvm/llvm-project/pull/191207