[llvm] [X86] Add crash test coverage for #169485 (PR #192797)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 18 09:31:45 PDT 2026


https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/192797

None

>From 1c98591c6928be23731a4a0429eb2b94d41d6bb4 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Sat, 18 Apr 2026 17:30:41 +0100
Subject: [PATCH] [X86] Add crash test coverage for #169485

---
 llvm/test/CodeGen/X86/pr169485.ll | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/pr169485.ll

diff --git a/llvm/test/CodeGen/X86/pr169485.ll b/llvm/test/CodeGen/X86/pr169485.ll
new file mode 100644
index 0000000000000..63035fce02615
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr169485.ll
@@ -0,0 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+define <8 x float> @widget(<2 x float> %arg) #0 {
+; CHECK-LABEL: widget:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    subq $24, %rsp
+; CHECK-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill
+; CHECK-NEXT:    callq *%rax
+; CHECK-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
+; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1,0],zero
+; CHECK-NEXT:    addq $24, %rsp
+; CHECK-NEXT:    .cfi_def_cfa_offset 8
+; CHECK-NEXT:    retq
+  %call = tail call float null()
+  %shufflevector = shufflevector <2 x float> %arg, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %freeze = freeze <8 x float> %shufflevector
+  %insertelement = insertelement <8 x float> %freeze, float 0.000000e+00, i64 3
+  %shufflevector1 = shufflevector <8 x float> %insertelement, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
+  ret <8 x float> %shufflevector1
+}
+attributes #0 = { "target-cpu"="znver2" }



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