[llvm] [X86][APX] Update live internals of physical registers too (PR #192595)

[Phoebe Wang via llvm-commits]

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@@ -0,0 +1,190 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=x86_64-- -run-pass=greedy %s -o - | FileCheck %s
+--- |
+  define fastcc void @fold_with_physical_reg(ptr %arg0, i64 %arg1, ptr %arg2, i1 %arg3) #0 {
+  entry:
+    br label %bb1
+
+  bb1:                                              ; preds = %bb2, %entry
+    %alloc = alloca i8, i64 %arg1, align 16
+    br label %bb2
+
+  bb2:                                              ; preds = %bb2, %bb1
+    %phi = phi i64 [ 0, %bb1 ], [ %arg1, %bb2 ]
+    %call = call fastcc ptr null(ptr %arg0, ptr null, ptr null, ptr null, float 0.000000e+00)
+    %gep = getelementptr ptr, ptr %alloc, i64 %phi
+    store ptr null, ptr %gep, align 8
+    store ptr null, ptr %arg2, align 8
+    br i1 %arg3, label %bb1, label %bb2
+  }
+
+  attributes #0 = { nounwind "target-features"="+ndd" }
+...
+---
+name:            fold_with_physical_reg
+alignment:       1
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+noPhis:          true
+isSSA:           false
+noVRegs:         false
+hasFakeUses:     false
+callsEHReturn:   false
+callsUnwindInit: false
+hasEHContTarget: false
+hasEHScopes:     false
+hasEHFunclets:   false
+isOutlined:      false
+debugInstrRef:   true
+failsVerification: false
+tracksDebugUserValues: false
+registers:
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phoebewang wrote:

Done.

https://github.com/llvm/llvm-project/pull/192595