[llvm] 695e1ba - AMDGPU/GlobalISel: RegBankLegalize rules for async LDS stores (#192717)

[via llvm-commits]

Author: vangthao95
Date: 2026-04-17T15:51:44-07:00
New Revision: 695e1baf61c533056e6cc6eff707a681f804db42

URL: https://github.com/llvm/llvm-project/commit/695e1baf61c533056e6cc6eff707a681f804db42
DIFF: https://github.com/llvm/llvm-project/commit/695e1baf61c533056e6cc6eff707a681f804db42.diff

LOG: AMDGPU/GlobalISel: RegBankLegalize rules for async LDS stores (#192717)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
    llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 1b2a7d9feac6a..b95f33e89ca30 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -1766,7 +1766,11 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
   addRulesForIOpcs({amdgcn_global_load_async_to_lds_b8,
                     amdgcn_global_load_async_to_lds_b32,
                     amdgcn_global_load_async_to_lds_b64,
-                    amdgcn_global_load_async_to_lds_b128})
+                    amdgcn_global_load_async_to_lds_b128,
+                    amdgcn_global_store_async_from_lds_b8,
+                    amdgcn_global_store_async_from_lds_b32,
+                    amdgcn_global_store_async_from_lds_b64,
+                    amdgcn_global_store_async_from_lds_b128})
       .Any({{}, {{}, {IntrId, VgprP1, VgprP3}}});
 
   addRulesForIOpcs({amdgcn_perm_pk16_b4_u4}, StandardB)

diff  --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
index 1b7ea7c98f612..cb50f436d4a1a 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
-; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
+; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
 
 declare void @llvm.amdgcn.global.store.async.from.lds.b8(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)
 declare void @llvm.amdgcn.global.store.async.from.lds.b32(ptr addrspace(1) %gaddr, ptr addrspace(3) %laddr, i32 %offset, i32 %cpol)