[llvm] [WIP] AMDGPU: VGPR bank conflict avoidance hints (PR #192140)

[Reem Elkhouly via llvm-commits]

amd-relkhoul wrote:

> > Hints are advisory — they cannot cause spills
> 
> Surely they can cause spills, since they influence regalloc's decisions in a way that _could_ cause more register confilcts, and _could_ cause the allocator to make different splitting/spilling decision.

You're right, hints can indeed cause spills indirectly by steering the allocator toward assignments that increase interference with other live ranges, potentially ending in spills. My earlier reasoning was that hints only reorder candidates without removing any, but I overlooked that even if the hint itself doesn't directly conflict, it can displace other live ranges that eventually spill. I'll update the PR description to reflect this. The flag is off by default, which keeps pressure-sensitive workloads unaffected if kept this way, and I'll investigate safeguards to minimize this risk.
Thanks for catching this.


https://github.com/llvm/llvm-project/pull/192140