[llvm] [X86] Add test coverage for #192034 (PR #192686)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/192686

None

>From 5127edced6f2a4de0be248db3553a83668932ae8 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Fri, 17 Apr 2026 16:46:18 +0100
Subject: [PATCH] [X86] Add test coverage for #192034

---
 llvm/test/CodeGen/X86/pr192034.ll | 35 +++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/pr192034.ll

diff --git a/llvm/test/CodeGen/X86/pr192034.ll b/llvm/test/CodeGen/X86/pr192034.ll
new file mode 100644
index 0000000000000..67d3ff27ef596
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr192034.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512fp16 | FileCheck %s
+
+define <8 x half> @maskload_v8f16_byval(<8 x half> %src, i8 %k, ptr %mem_addr) {
+; CHECK-LABEL: maskload_v8f16_byval:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vmovsh {{.*#+}} xmm0 {%k1} = mem[0],zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT:    retq
+  %bit = and i8 %k, 1
+  %zext = shufflevector <8 x half> %src, <8 x half> <half 0xH0000, half poison, half poison, half poison, half poison, half poison, half poison, half poison>, <8 x i32> <i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
+  %msk = bitcast i8 %bit to <8 x i1>
+  %res = tail call <8 x half> @llvm.masked.load.v8f16.p0(ptr %mem_addr, <8 x i1> %msk, <8 x half> %zext)
+  ret <8 x half> %res
+}
+
+define <8 x half> @maskload_v8f16_byref(ptr %p, i8 %k, ptr %mem_addr) {
+; CHECK-LABEL: maskload_v8f16_byref:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT:    andb $1, %sil
+; CHECK-NEXT:    kmovd %esi, %k0
+; CHECK-NEXT:    kshiftld $24, %k0, %k0
+; CHECK-NEXT:    kshiftrd $24, %k0, %k1
+; CHECK-NEXT:    vmovdqu16 (%rdx), %zmm0 {%k1}
+; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
+; CHECK-NEXT:    vzeroupper
+; CHECK-NEXT:    retq
+  %src = load <8 x half>, ptr %p, align 16
+  %bit = and i8 %k, 1
+  %zext = shufflevector <8 x half> %src, <8 x half> <half 0xH0000, half poison, half poison, half poison, half poison, half poison, half poison, half poison>, <8 x i32> <i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
+  %msk = bitcast i8 %bit to <8 x i1>
+  %res = tail call <8 x half> @llvm.masked.load.v8f16.p0(ptr %mem_addr, <8 x i1> %msk, <8 x half> %zext)
+  ret <8 x half> %res
+}