[llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)

[Janek van Oirschot via llvm-commits]

================
@@ -136,17 +136,21 @@ static uint64_t getPGMRSrc1Reg(const SIProgramInfo &ProgInfo,
   return Reg;
 }
 
-static uint64_t getComputePGMRSrc2Reg(const SIProgramInfo &ProgInfo) {
-  uint64_t Reg = S_00B84C_USER_SGPR(ProgInfo.UserSGPR) |
-                 S_00B84C_TRAP_HANDLER(ProgInfo.TrapHandlerEnable) |
-                 S_00B84C_TGID_X_EN(ProgInfo.TGIdXEnable) |
-                 S_00B84C_TGID_Y_EN(ProgInfo.TGIdYEnable) |
-                 S_00B84C_TGID_Z_EN(ProgInfo.TGIdZEnable) |
-                 S_00B84C_TG_SIZE_EN(ProgInfo.TGSizeEnable) |
-                 S_00B84C_TIDIG_COMP_CNT(ProgInfo.TIdIGCompCount) |
-                 S_00B84C_EXCP_EN_MSB(ProgInfo.EXCPEnMSB) |
-                 S_00B84C_LDS_SIZE(ProgInfo.LdsSize) |
-                 S_00B84C_EXCP_EN(ProgInfo.EXCPEnable);
+static uint64_t getComputePGMRSrc2Reg(const GCNSubtarget &ST,
+                                      const SIProgramInfo &ProgInfo) {
+  uint64_t Reg = ST.hasGFX1250Insts()
----------------
JanekvO wrote:

Nit: can you add these in `SIDefines.h` in terms of set/get/clear macro and use that? Totally a NFC, but more consistent with what we've been doing:
```
#define   S_00B84C_USER_SGPR_GFX1250(x)                               (((x) & 0x3F) << 1)
#define   G_00B84C_USER_SGPR_GFX1250(x)                               (((x) >> 1) & 0x3F)
#define   C_00B84C_USER_SGPR_GFX1250                                  0xFFFFFF81
```

https://github.com/llvm/llvm-project/pull/192579