[llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 17 03:33:45 PDT 2026


lukel97 wrote:

> Overall, this looks like a move in good direction to me, though there are still some details to be ironed out. In addition to the issues raised by @eas, I noticed the following logic in simplifyRecipe:
> 
> ```
> if (CanCreateNewRecipe && match(Def, m_UDiv(m_VPValue(A), m_APInt(APC))) &&
>     APC->isPowerOf2())
>   return Def->replaceAllUsesWith(Builder.createNaryOp(
>       Instruction::LShr,
>       {A, Plan->getConstantInt(APC->getBitWidth(), APC->exactLogBase2())},
>       *cast<VPRecipeWithIRFlags>(Def), Def->getDebugLoc()));
> ```
> 
> Will this optimization be invalidated (or stop being triggered) after this patch?

Those optimisations never kicked in to begin with because the RHS was always a safe divisor select instruction. I've also checked and confirmed across SPEC + llvm-test-suite that we don't miss out on other optimizations in InstCombine/SelectionDAG etc, presumably also because the safe divisor prevented them in the first place

https://github.com/llvm/llvm-project/pull/191377


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