[llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 17 02:54:59 PDT 2026
================
@@ -2669,6 +2669,30 @@ RISCVTTIImpl::getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val,
nullptr);
}
+/// Check to see if this instruction is expected to be combined to a simpler
+/// operation during/before lowering. If so return the cost of the combined
+/// operation rather than provided one. For instance, `udiv i16 %X, 2` is likely
+/// to be combined to `lshr i16 %X, 1`, so return the cost of a `lshr` rather
+/// than the cost of a `udiv`
+std::optional<InstructionCost>
+RISCVTTIImpl::getCombinedArithmeticInstructionCost(
+ unsigned ISDOpcode, Type *Ty, TTI::TargetCostKind CostKind,
+ TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info,
+ ArrayRef<const Value *> Args, const Instruction *CxtI) const {
+ // Vector unsigned division/remainder will be simplified to shifts/masks.
+ if ((ISDOpcode == ISD::UDIV || ISDOpcode == ISD::UREM) &&
+ Opd2Info.isConstant() && Opd2Info.isPowerOf2()) {
----------------
lukel97 wrote:
Just want to check do we simplify constant but non-uniform divisors? I.e. `udiv <4 x i8> %x, <i8 2, i8 4, i8 8, i8 16>`
https://github.com/llvm/llvm-project/pull/179570
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