[llvm] [RISCV][llvm] Support widening fadd, fsub and fmul codegen for zvfbfa (PR #192414)

[Brandon Wu via llvm-commits]

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@@ -18570,13 +18572,9 @@ NodeExtensionHelper::getSupportedFoldings(const SDNode *Root,
   case RISCVISD::VFNMADD_VL:
   case RISCVISD::VFNMSUB_VL:
     Strategies.push_back(canFoldToVWWithSameExtension);
-    if (Subtarget.hasVInstructionsBF16() &&
-        Root->getOpcode() != RISCVISD::FMUL_VL)
-      // TODO: Once other widen operations are supported we can merge
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4vtomat wrote:

I think it was original intention back then, but I found it's better not merging back because we there's 1 exception(zvfbfwma) that will also enable `SupportsBF16Ext` that needs additional logic to handle lol 

https://github.com/llvm/llvm-project/pull/192414