[llvm] [NewPM] Adds a port for AArch64PostSelectOptimize (PR #192599)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 16 23:24:38 PDT 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Anshul Nigham (nigham)
<details>
<summary>Changes</summary>
Standard porting with updated tests.
Note: Removed unused dep on TargetPassConfig for legacy pass.
---
Full diff: https://github.com/llvm/llvm-project/pull/192599.diff
8 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64.h (+8-1)
- (modified) llvm/lib/Target/AArch64/AArch64PassRegistry.def (+2)
- (modified) llvm/lib/Target/AArch64/AArch64TargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp (+44-25)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir (+1)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir (+1)
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 8a7c8680da63c..8983dd28c2286 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -101,6 +101,13 @@ class AArch64PreLegalizerCombinerPass
MachineFunctionAnalysisManager &MFAM);
};
+class AArch64PostSelectOptimizePass
+ : public PassInfoMixin<AArch64PostSelectOptimizePass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
FunctionPass *createAArch64O0PreLegalizerCombiner();
FunctionPass *createAArch64PreLegalizerCombiner();
FunctionPass *createAArch64PostLegalizerCombiner(bool IsOptNone);
@@ -132,7 +139,7 @@ void initializeAArch64O0PreLegalizerCombinerLegacyPass(PassRegistry &);
void initializeAArch64PostCoalescerLegacyPass(PassRegistry &);
void initializeAArch64PostLegalizerCombinerPass(PassRegistry &);
void initializeAArch64PostLegalizerLoweringPass(PassRegistry &);
-void initializeAArch64PostSelectOptimizePass(PassRegistry &);
+void initializeAArch64PostSelectOptimizeLegacyPass(PassRegistry &);
void initializeAArch64PreLegalizerCombinerLegacyPass(PassRegistry &);
void initializeAArch64PromoteConstantPass(PassRegistry&);
void initializeAArch64RedundantCopyEliminationPass(PassRegistry&);
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index 39085fc033c12..7efbf9262c8dd 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -36,6 +36,8 @@ MACHINE_FUNCTION_PASS("aarch64-jump-tables", AArch64CompressJumpTablesPass())
MACHINE_FUNCTION_PASS("aarch64-ldst-opt", AArch64LoadStoreOptPass())
MACHINE_FUNCTION_PASS("aarch64-mi-peephole-opt", AArch64MIPeepholeOptPass())
MACHINE_FUNCTION_PASS("aarch64-post-coalescer", AArch64PostCoalescerPass())
+MACHINE_FUNCTION_PASS("aarch64-post-select-optimize",
+ AArch64PostSelectOptimizePass())
MACHINE_FUNCTION_PASS("aarch64-prelegalizer-combiner",
AArch64PreLegalizerCombinerPass())
MACHINE_FUNCTION_PASS("aarch64-ptrauth", AArch64PointerAuthPass())
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 950d274ceae75..0d8f6a1107a54 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -263,7 +263,7 @@ LLVMInitializeAArch64Target() {
initializeAArch64PostCoalescerLegacyPass(PR);
initializeAArch64PostLegalizerCombinerPass(PR);
initializeAArch64PostLegalizerLoweringPass(PR);
- initializeAArch64PostSelectOptimizePass(PR);
+ initializeAArch64PostSelectOptimizeLegacyPass(PR);
initializeAArch64PromoteConstantPass(PR);
initializeAArch64RedundantCopyEliminationPass(PR);
initializeAArch64RedundantCondBranchPass(PR);
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
index 4bd025da636ca..c1c22029ede50 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
@@ -20,7 +20,6 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
@@ -29,11 +28,23 @@
using namespace llvm;
namespace {
-class AArch64PostSelectOptimize : public MachineFunctionPass {
+class AArch64PostSelectOptimizeImpl {
+public:
+ bool run(MachineFunction &MF);
+
+private:
+ bool optimizeNZCVDefs(MachineBasicBlock &MBB);
+ bool doPeepholeOpts(MachineBasicBlock &MBB);
+ /// Look for cross regclass copies that can be trivially eliminated.
+ bool foldSimpleCrossClassCopies(MachineInstr &MI);
+ bool foldCopyDup(MachineInstr &MI);
+};
+
+class AArch64PostSelectOptimizeLegacy : public MachineFunctionPass {
public:
static char ID;
- AArch64PostSelectOptimize() : MachineFunctionPass(ID) {}
+ AArch64PostSelectOptimizeLegacy() : MachineFunctionPass(ID) {}
StringRef getPassName() const override {
return "AArch64 Post Select Optimizer";
@@ -42,18 +53,11 @@ class AArch64PostSelectOptimize : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
-
-private:
- bool optimizeNZCVDefs(MachineBasicBlock &MBB);
- bool doPeepholeOpts(MachineBasicBlock &MBB);
- /// Look for cross regclass copies that can be trivially eliminated.
- bool foldSimpleCrossClassCopies(MachineInstr &MI);
- bool foldCopyDup(MachineInstr &MI);
};
} // end anonymous namespace
-void AArch64PostSelectOptimize::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<TargetPassConfig>();
+void AArch64PostSelectOptimizeLegacy::getAnalysisUsage(
+ AnalysisUsage &AU) const {
AU.setPreservesCFG();
getSelectionDAGFallbackAnalysisUsage(AU);
MachineFunctionPass::getAnalysisUsage(AU);
@@ -98,7 +102,7 @@ unsigned getNonFlagSettingVariant(unsigned Opc) {
}
}
-bool AArch64PostSelectOptimize::doPeepholeOpts(MachineBasicBlock &MBB) {
+bool AArch64PostSelectOptimizeImpl::doPeepholeOpts(MachineBasicBlock &MBB) {
bool Changed = false;
for (auto &MI : make_early_inc_range(MBB)) {
bool CurrentIterChanged = foldSimpleCrossClassCopies(MI);
@@ -109,7 +113,8 @@ bool AArch64PostSelectOptimize::doPeepholeOpts(MachineBasicBlock &MBB) {
return Changed;
}
-bool AArch64PostSelectOptimize::foldSimpleCrossClassCopies(MachineInstr &MI) {
+bool AArch64PostSelectOptimizeImpl::foldSimpleCrossClassCopies(
+ MachineInstr &MI) {
auto *MF = MI.getMF();
auto &MRI = MF->getRegInfo();
@@ -157,7 +162,7 @@ bool AArch64PostSelectOptimize::foldSimpleCrossClassCopies(MachineInstr &MI) {
return true;
}
-bool AArch64PostSelectOptimize::foldCopyDup(MachineInstr &MI) {
+bool AArch64PostSelectOptimizeImpl::foldCopyDup(MachineInstr &MI) {
if (!MI.isCopy())
return false;
@@ -219,7 +224,7 @@ bool AArch64PostSelectOptimize::foldCopyDup(MachineInstr &MI) {
AArch64::DUPi64, AArch64::UMOVvi64);
}
-bool AArch64PostSelectOptimize::optimizeNZCVDefs(MachineBasicBlock &MBB) {
+bool AArch64PostSelectOptimizeImpl::optimizeNZCVDefs(MachineBasicBlock &MBB) {
// If we find a dead NZCV implicit-def, we
// - try to convert the operation to a non-flag-setting equivalent
// - or mark the def as dead to aid later peephole optimizations.
@@ -291,7 +296,7 @@ bool AArch64PostSelectOptimize::optimizeNZCVDefs(MachineBasicBlock &MBB) {
return Changed;
}
-bool AArch64PostSelectOptimize::runOnMachineFunction(MachineFunction &MF) {
+bool AArch64PostSelectOptimizeImpl::run(MachineFunction &MF) {
if (MF.getProperties().hasFailedISel())
return false;
assert(MF.getProperties().hasSelected() && "Expected a selected MF");
@@ -304,16 +309,30 @@ bool AArch64PostSelectOptimize::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}
-char AArch64PostSelectOptimize::ID = 0;
-INITIALIZE_PASS_BEGIN(AArch64PostSelectOptimize, DEBUG_TYPE,
- "Optimize AArch64 selected instructions",
- false, false)
-INITIALIZE_PASS_END(AArch64PostSelectOptimize, DEBUG_TYPE,
- "Optimize AArch64 selected instructions", false,
- false)
+bool AArch64PostSelectOptimizeLegacy::runOnMachineFunction(
+ MachineFunction &MF) {
+ return AArch64PostSelectOptimizeImpl().run(MF);
+}
+
+char AArch64PostSelectOptimizeLegacy::ID = 0;
+INITIALIZE_PASS_BEGIN(AArch64PostSelectOptimizeLegacy, DEBUG_TYPE,
+ "Optimize AArch64 selected instructions", false, false)
+INITIALIZE_PASS_END(AArch64PostSelectOptimizeLegacy, DEBUG_TYPE,
+ "Optimize AArch64 selected instructions", false, false)
namespace llvm {
FunctionPass *createAArch64PostSelectOptimize() {
- return new AArch64PostSelectOptimize();
+ return new AArch64PostSelectOptimizeLegacy();
+}
+
+PreservedAnalyses
+AArch64PostSelectOptimizePass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ const bool Changed = AArch64PostSelectOptimizeImpl().run(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
}
} // end namespace llvm
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
index 5721f235de460..d8837653a5911 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-post-select-optimize -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-post-select-optimize %s -o - | FileCheck %s
---
name: pluto
alignment: 4
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir
index 0b9c72f6358cd..3765164ab5204 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-post-select-optimize -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-post-select-optimize %s -o - | FileCheck %s
---
name: test_fcmp_dead_cc
alignment: 4
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir
index 0b9c72f6358cd..3765164ab5204 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-post-select-optimize -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-post-select-optimize %s -o - | FileCheck %s
---
name: test_fcmp_dead_cc
alignment: 4
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir
index 4bd5c14e5e745..efa27486e167b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-post-select-optimize -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-post-select-optimize %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
``````````
</details>
https://github.com/llvm/llvm-project/pull/192599
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