[llvm] [RISCV] Support emitting plui.h for i32 constants on RV64. (PR #192534)

Sam Elliott via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 16 21:27:58 PDT 2026


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@@ -1151,8 +1152,9 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
       if (!isInt<32>(Imm) && isUInt<32>(Imm) && hasAllWUsers(Node))
         Imm = SignExtend64<32>(Imm);
 
-      if (VT == MVT::i64 && !isInt<12>(Imm) && Subtarget->hasStdExtP() &&
-          isApplicableToPLI(Imm) && hasAllWUsers(Node)) {
+      if (VT == MVT::i64 && !isInt<12>(Imm) && !isShiftedInt<20, 12>(Imm) &&
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lenary wrote:

The isInt<12> && isShiftedInt<20,12> condition could be extracted to a named helper if it helped clarity - but I haven't checked if it's a repeated condition. 

https://github.com/llvm/llvm-project/pull/192534


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