[llvm] [PowerPC] Add bctar instruction (ISA 2.07) (PR #187322)

[Lei Huang via llvm-commits]

https://github.com/lei137 requested changes to this pull request.

Can you please add some disassembly tests in llvm/test/MC/Disassembler/PowerPC?
I'm wondering if this is missing 64bit support since I use `let Defs = [LR]` which is the representation for 32bit link register vs the 64bit representation `LR8`.

See def of `BLR` vs `BLR8`

https://github.com/llvm/llvm-project/pull/187322