[llvm] [AMDGPU] Improve execz branch removal for async load-to-LDS (PR #192341)

[Matt Arsenault via llvm-commits]

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@@ -428,7 +452,16 @@ class BranchWeightCostModel {
     if (TII.isWaitcnt(MI.getOpcode()))
       return false;
 
-    ThenCyclesCost += SchedModel.computeInstrLatency(&MI);
+    // gfx1250 async loads to LDS: use issue cost (1 cycle) instead of the
+    // scheduling model's resource latency so the cost model can remove the
+    // execz branch when the block is cheap enough. The HW drops async
+    // loads when the LDS destination address is OOB, so executing at
+    // EXEC=0 is safe. Async stores are NOT overridden: the HW reads
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arsenm wrote:

If this is wrong, that's handled in hasUnwantedEffectsWhenEXECEmpty?

https://github.com/llvm/llvm-project/pull/192341