[compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)
Trevor Gross via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 16 06:04:22 PDT 2026
https://github.com/tgross35 updated https://github.com/llvm/llvm-project/pull/192441
>From e45bb7d83247cd6d09fd111700abe1c5f3b39fe4 Mon Sep 17 00:00:00 2001
From: Trevor Gross <tg at trevorgross.com>
Date: Thu, 16 Apr 2026 04:33:09 -0400
Subject: [PATCH 1/2] [WebAssembly] Explicitly set `getCmpLibcallReturnType` to
i32
LLVM's default for `getCmpLibcallReturnType` is currently set to `i32`,
but this is not exactly accurate: the default in GCC is an integer of
word size. This means that on wasm64 targets, runtime libraries that are
assuming word size are incorrect and instead need to be using a 32-bit
integer.
The unintentional i32 default is actually a reasonable choice for Wasm
because it may be slightly cheaper to operate on when running 64-bit
wasm on 32-bit hosts, and there is no advantage to using a larger
integer (the result of comparisons need only be able to represent three
possible values). Thus, do the following:
* Make `getCmpLibcallReturnType` explicit as `i32` to prevent against
future changes to the default.
* Update compiler-rt to account for this and fix wasm64.
* Note this decision in the changelog so other runtime libraries can
update if needed.
GCC does not support wasm64 so there is no compatibility concern at the
current time. If added, it would be reasonable for `i32` to be used
there as well.
Closes: https://github.com/llvm/llvm-project/issues/75302
Closes: https://github.com/llvm/llvm-project/issues/192416
---
compiler-rt/lib/builtins/fp_compare_impl.inc | 3 +++
llvm/docs/ReleaseNotes.md | 5 ++++-
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h | 5 +++++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/compiler-rt/lib/builtins/fp_compare_impl.inc b/compiler-rt/lib/builtins/fp_compare_impl.inc
index f883338c471d3..129d0136a0b98 100644
--- a/compiler-rt/lib/builtins/fp_compare_impl.inc
+++ b/compiler-rt/lib/builtins/fp_compare_impl.inc
@@ -15,6 +15,9 @@
#if defined(__aarch64__) || defined(__arm64ec__)
// AArch64 GCC overrides libgcc_cmp_return to use int instead of long.
typedef int CMP_RESULT;
+#elif defined(__wasm__)
+// Both wasm32 and wasm64 use i32
+typedef int CMP_RESULT;
#elif __SIZEOF_POINTER__ == 8 && __SIZEOF_LONG__ == 4
// LLP64 ABIs use long long instead of long.
typedef long long CMP_RESULT;
diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 9caeef89d0b1c..14958f5674d46 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -106,7 +106,7 @@ Changes to LLVM infrastructure
([#177046](https://github.com/llvm/llvm-project/pull/125687)). Note that
there are still issues with invalid compiler reasoning about some functions
in bitcode, e.g. `malloc`. Not yet supported on MachO or when using
- distributed ThinLTO.
+ distributed ThinLTO.
Changes to building LLVM
------------------------
@@ -198,6 +198,9 @@ Changes to the RISC-V Backend
Changes to the WebAssembly Backend
----------------------------------
+* The result of runtime library call comparisons is explicitly set to `i32` on
+ both wasm32 and wasm64.
+
Changes to the Windows Target
-----------------------------
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
index 42f047840e504..f3ecd520a6076 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
@@ -29,6 +29,11 @@ class WebAssemblyTargetLowering final : public TargetLowering {
MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override;
MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override;
+ MVT::SimpleValueType getCmpLibcallReturnType() const override {
+ // i32 may be more efficient than the default word size for wasm64 targets
+ return MVT::i32;
+ }
+
private:
/// Keep a pointer to the WebAssemblySubtarget around so that we can make the
/// right decision when generating code for different targets.
>From 7e46048efd421aaf96dfe123af52247d35569fe7 Mon Sep 17 00:00:00 2001
From: Trevor Gross <tg at trevorgross.com>
Date: Thu, 16 Apr 2026 12:33:26 +0000
Subject: [PATCH 2/2] [TargetLowering] Set the default
`getCmpLibcallReturnType` to word size
In GCC `CMPtype` defaults to a word-sized integer (see
`default_libgcc_cmp_return_mode` in GCC source), which is also how the
corresponding libcalls are defined in compiler-rt. Currently, however,
LLVM sets the default to an `i32`. On most targets this happens to work
because `i32` and `i64` have the same return ABI and the truncated
comparison to 0 works, but this is not guaranteed (wasm64 ran into one
such problem).
Resolve this by changing the default to a pointer-sized integer.
compiler-rt is updated as well to make the behavior more clear.
---
compiler-rt/lib/builtins/fp_compare_impl.inc | 15 +++---
compiler-rt/lib/builtins/int_types.h | 7 +++
llvm/include/llvm/CodeGen/TargetLowering.h | 4 +-
.../CodeGen/SelectionDAG/TargetLowering.cpp | 3 +-
llvm/lib/CodeGen/TargetLoweringBase.cpp | 6 ++-
llvm/lib/Target/AArch64/AArch64ISelLowering.h | 6 +++
llvm/lib/Target/AVR/AVRISelLowering.h | 3 +-
llvm/lib/Target/MSP430/MSP430ISelLowering.h | 4 +-
.../WebAssembly/WebAssemblyISelLowering.h | 3 +-
llvm/test/CodeGen/RISCV/float-convert.ll | 20 ++++----
.../test/CodeGen/RISCV/rv64-double-convert.ll | 14 +++---
llvm/test/CodeGen/RISCV/rv64-float-convert.ll | 43 +++++++++--------
.../CodeGen/X86/fminimumnum-fmaximumnum.ll | 48 +++++++++----------
llvm/test/CodeGen/X86/fp128-cast.ll | 8 ++--
llvm/test/CodeGen/X86/fp128-compare.ll | 22 ++++-----
llvm/test/CodeGen/X86/fp128-i128.ll | 20 ++++----
.../test/CodeGen/X86/fp128-libcalls-strict.ll | 36 +++++++-------
llvm/test/CodeGen/X86/fp128-select.ll | 18 +++----
.../CodeGen/X86/soft-fp-legal-in-HW-reg.ll | 4 +-
19 files changed, 151 insertions(+), 133 deletions(-)
diff --git a/compiler-rt/lib/builtins/fp_compare_impl.inc b/compiler-rt/lib/builtins/fp_compare_impl.inc
index 129d0136a0b98..efca964d52190 100644
--- a/compiler-rt/lib/builtins/fp_compare_impl.inc
+++ b/compiler-rt/lib/builtins/fp_compare_impl.inc
@@ -8,25 +8,22 @@
#include "fp_lib.h"
-// GCC uses long (at least for x86_64) as the return type of the comparison
-// functions. We need to ensure that the return value is sign-extended in the
-// same way as GCC expects (since otherwise GCC-generated __builtin_isinf
+// GCC defaults to a word-sized return value, with a few platforms hooking
+// the override. We need to ensure that the return value is sign-extended in
+// the same way as GCC expects (since otherwise GCC-generated __builtin_isinf
// returns true for finite 128-bit floating-point numbers).
#if defined(__aarch64__) || defined(__arm64ec__)
-// AArch64 GCC overrides libgcc_cmp_return to use int instead of long.
+// AArch64 GCC overrides libgcc_cmp_return to use an int.
typedef int CMP_RESULT;
#elif defined(__wasm__)
// Both wasm32 and wasm64 use i32
typedef int CMP_RESULT;
-#elif __SIZEOF_POINTER__ == 8 && __SIZEOF_LONG__ == 4
-// LLP64 ABIs use long long instead of long.
-typedef long long CMP_RESULT;
#elif __AVR__
// AVR uses a single byte for the return value.
typedef char CMP_RESULT;
#else
-// Otherwise the comparison functions return long.
-typedef long CMP_RESULT;
+// By default, use a signed word.
+typedef sword CMP_RESULT;
#endif
#if !defined(__clang__) && defined(__GNUC__)
diff --git a/compiler-rt/lib/builtins/int_types.h b/compiler-rt/lib/builtins/int_types.h
index 7c7f8cb64aa9a..08de8e0245452 100644
--- a/compiler-rt/lib/builtins/int_types.h
+++ b/compiler-rt/lib/builtins/int_types.h
@@ -18,6 +18,13 @@
#include "int_endianness.h"
+#if __SIZEOF_POINTER__ == 8 && __SIZEOF_LONG__ == 4
+// LLP64 ABIs use long long instead of long.
+typedef long long sword;
+#else
+typedef long sword;
+#endif
+
// si_int is defined in Linux sysroot's asm-generic/siginfo.h
#ifdef si_int
#undef si_int
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 59a0f2d2e0c2a..1966ca9405d21 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -996,8 +996,8 @@ class LLVM_ABI TargetLoweringBase {
/// Return the ValueType for comparison libcalls. Comparison libcalls include
/// floating point comparison calls, and Ordered/Unordered check calls on
/// floating point numbers.
- virtual
- MVT::SimpleValueType getCmpLibcallReturnType() const;
+ virtual MVT::SimpleValueType
+ getCmpLibcallReturnType(const DataLayout &DL) const;
/// For targets without i1 registers, this gives the nature of the high-bits
/// of boolean values held in types wider than i1.
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index e6aa222425d13..ffaa6a62a9fc9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -420,7 +420,8 @@ void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
}
// Use the target specific return value for comparison lib calls.
- EVT RetVT = getCmpLibcallReturnType();
+ const DataLayout &DL = DAG.getDataLayout();
+ EVT RetVT = getCmpLibcallReturnType(DL);
SDValue Ops[2] = {NewLHS, NewRHS};
TargetLowering::MakeLibCallOptions CallOptions;
EVT OpsVT[2] = { OldLHS.getValueType(),
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 2f1e3f2f3ff7a..0eebd848d7d4f 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1959,8 +1959,10 @@ EVT TargetLoweringBase::getSetCCResultType(const DataLayout &DL, LLVMContext &,
return getPointerTy(DL).SimpleTy;
}
-MVT::SimpleValueType TargetLoweringBase::getCmpLibcallReturnType() const {
- return MVT::i32; // return the default value
+MVT::SimpleValueType
+TargetLoweringBase::getCmpLibcallReturnType(const DataLayout &DL) const {
+ return getPointerTy(DL).SimpleTy;
+ // return MVT::iPTR; // By default, comparisons return a word-sized integer
}
/// getVectorTypeBreakdown - Vector types are broken down into some number of
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index 58efdd3e18fc0..0a3420af1a898 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -107,6 +107,12 @@ class AArch64TargetLowering : public TargetLowering {
}
}
+ MVT::SimpleValueType
+ getCmpLibcallReturnType(const DataLayout &DL) const override {
+ // All Arm targets use a 32-bit integer for comparison results.
+ return MVT::i32;
+ }
+
unsigned getVectorIdxWidth(const DataLayout &DL) const override {
// The VectorIdx type is i64, with both normal and ilp32.
return 64;
diff --git a/llvm/lib/Target/AVR/AVRISelLowering.h b/llvm/lib/Target/AVR/AVRISelLowering.h
index 2ae22b2d8af6c..19fa895cf4632 100644
--- a/llvm/lib/Target/AVR/AVRISelLowering.h
+++ b/llvm/lib/Target/AVR/AVRISelLowering.h
@@ -33,7 +33,8 @@ class AVRTargetLowering : public TargetLowering {
return MVT::i8;
}
- MVT::SimpleValueType getCmpLibcallReturnType() const override {
+ MVT::SimpleValueType
+ getCmpLibcallReturnType(const DataLayout &DL) const override {
return MVT::i8;
}
diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.h b/llvm/lib/Target/MSP430/MSP430ISelLowering.h
index d906c3817bbe5..7f0b775ab61e5 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelLowering.h
+++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.h
@@ -17,6 +17,7 @@
#include "MSP430.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/TargetLowering.h"
+#include "llvm/IR/DataLayout.h"
namespace llvm {
class MSP430Subtarget;
@@ -29,7 +30,8 @@ namespace llvm {
return MVT::i8;
}
- MVT::SimpleValueType getCmpLibcallReturnType() const override {
+ MVT::SimpleValueType
+ getCmpLibcallReturnType(const DataLayout &DL) const override {
return MVT::i16;
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
index f3ecd520a6076..8599cbab8bf66 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
@@ -29,7 +29,8 @@ class WebAssemblyTargetLowering final : public TargetLowering {
MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override;
MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override;
- MVT::SimpleValueType getCmpLibcallReturnType() const override {
+ MVT::SimpleValueType
+ getCmpLibcallReturnType(const DataLayout &DL) const override {
// i32 may be more efficient than the default word size for wasm64 targets
return MVT::i32;
}
diff --git a/llvm/test/CodeGen/RISCV/float-convert.ll b/llvm/test/CodeGen/RISCV/float-convert.ll
index 4a637bf4ae327..63f1bbc056a03 100644
--- a/llvm/test/CodeGen/RISCV/float-convert.ll
+++ b/llvm/test/CodeGen/RISCV/float-convert.ll
@@ -960,26 +960,24 @@ define i64 @fcvt_lu_s_sat(float %a) nounwind {
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0
-; RV64I-NEXT: lui a1, 391168
-; RV64I-NEXT: addi a1, a1, -1
-; RV64I-NEXT: call __gtsf2
-; RV64I-NEXT: sgtz a0, a0
-; RV64I-NEXT: neg s1, a0
-; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __gesf2
; RV64I-NEXT: srli a0, a0, 63
-; RV64I-NEXT: addi s2, a0, -1
+; RV64I-NEXT: addi s1, a0, -1
; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __fixunssfdi
-; RV64I-NEXT: and a0, s2, a0
-; RV64I-NEXT: or a0, s1, a0
+; RV64I-NEXT: and s1, s1, a0
+; RV64I-NEXT: lui a1, 391168
+; RV64I-NEXT: addi a1, a1, -1
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __gtsf2
+; RV64I-NEXT: sgtz a0, a0
+; RV64I-NEXT: neg a0, a0
+; RV64I-NEXT: or a0, a0, s1
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret
start:
diff --git a/llvm/test/CodeGen/RISCV/rv64-double-convert.ll b/llvm/test/CodeGen/RISCV/rv64-double-convert.ll
index c310c105767ff..0a6beb05b34ab 100644
--- a/llvm/test/CodeGen/RISCV/rv64-double-convert.ll
+++ b/llvm/test/CodeGen/RISCV/rv64-double-convert.ll
@@ -69,14 +69,14 @@ define i128 @fptosi_sat_f64_to_i128(double %a) nounwind {
; RV64I-NEXT: sd s3, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s4, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: li a1, -449
; RV64I-NEXT: slli a1, a1, 53
; RV64I-NEXT: call __gedf2
; RV64I-NEXT: mv s2, a0
-; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __fixdfti
-; RV64I-NEXT: mv s1, a0
+; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv s3, a1
; RV64I-NEXT: li s5, -1
; RV64I-NEXT: bgez s2, .LBB4_2
@@ -86,15 +86,15 @@ define i128 @fptosi_sat_f64_to_i128(double %a) nounwind {
; RV64I-NEXT: li a0, 575
; RV64I-NEXT: slli a0, a0, 53
; RV64I-NEXT: addi a1, a0, -1
-; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __gtdf2
; RV64I-NEXT: mv s4, a0
; RV64I-NEXT: blez a0, .LBB4_4
; RV64I-NEXT: # %bb.3:
; RV64I-NEXT: srli s3, s5, 1
; RV64I-NEXT: .LBB4_4:
-; RV64I-NEXT: mv a0, s0
-; RV64I-NEXT: mv a1, s0
+; RV64I-NEXT: mv a0, s1
+; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call __unorddf2
; RV64I-NEXT: snez a0, a0
; RV64I-NEXT: srli a1, s2, 63
@@ -102,7 +102,7 @@ define i128 @fptosi_sat_f64_to_i128(double %a) nounwind {
; RV64I-NEXT: addi a0, a0, -1
; RV64I-NEXT: addi a3, a1, -1
; RV64I-NEXT: and a1, a0, s3
-; RV64I-NEXT: and a3, a3, s1
+; RV64I-NEXT: and a3, a3, s0
; RV64I-NEXT: neg a2, a2
; RV64I-NEXT: or a2, a2, a3
; RV64I-NEXT: and a0, a0, a2
diff --git a/llvm/test/CodeGen/RISCV/rv64-float-convert.ll b/llvm/test/CodeGen/RISCV/rv64-float-convert.ll
index fcbbb8235c629..d50869bef69f4 100644
--- a/llvm/test/CodeGen/RISCV/rv64-float-convert.ll
+++ b/llvm/test/CodeGen/RISCV/rv64-float-convert.ll
@@ -195,33 +195,36 @@ define i128 @fptosi_sat_f32_to_i128(float %a) nounwind {
define i128 @fptoui_sat_f32_to_i128(float %a) nounwind {
; RV64I-LABEL: fptoui_sat_f32_to_i128:
; RV64I: # %bb.0:
-; RV64I-NEXT: addi sp, sp, -32
-; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
-; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
-; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0
-; RV64I-NEXT: lui a1, 522240
-; RV64I-NEXT: addi a1, a1, -1
-; RV64I-NEXT: call __gtsf2
-; RV64I-NEXT: sgtz a0, a0
-; RV64I-NEXT: neg s1, a0
-; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __gesf2
; RV64I-NEXT: srli a0, a0, 63
; RV64I-NEXT: addi s2, a0, -1
; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __fixunssfti
-; RV64I-NEXT: and a0, s2, a0
-; RV64I-NEXT: and a1, s2, a1
-; RV64I-NEXT: or a0, s1, a0
-; RV64I-NEXT: or a1, s1, a1
-; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
-; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
-; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
-; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: and s3, s2, a0
+; RV64I-NEXT: lui a1, 522240
+; RV64I-NEXT: addi a1, a1, -1
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __gtsf2
+; RV64I-NEXT: sgtz a0, a0
+; RV64I-NEXT: and a1, s2, s1
+; RV64I-NEXT: neg a2, a0
+; RV64I-NEXT: or a0, a2, s3
+; RV64I-NEXT: or a1, a2, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret
;
; RV64IF-LABEL: fptoui_sat_f32_to_i128:
diff --git a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
index 8abd68701676c..d2a75abf1bc42 100644
--- a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
+++ b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
@@ -3170,7 +3170,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: callq __unordtf2 at PLT
; SSE2-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: jne .LBB41_2
; SSE2-NEXT: # %bb.1: # %start
@@ -3179,7 +3179,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: callq __unordtf2 at PLT
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; SSE2-NEXT: jne .LBB41_4
; SSE2-NEXT: # %bb.3: # %start
@@ -3189,7 +3189,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill
; SSE2-NEXT: callq __gttf2 at PLT
; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: jg .LBB41_6
; SSE2-NEXT: # %bb.5: # %start
@@ -3207,7 +3207,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: movaps %xmm2, %xmm0
; SSE2-NEXT: callq __eqtf2 at PLT
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE2-NEXT: je .LBB41_10
; SSE2-NEXT: # %bb.9: # %start
@@ -3224,7 +3224,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: callq __unordtf2 at PLT
; AVX-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: jne .LBB41_2
; AVX-NEXT: # %bb.1: # %start
@@ -3233,7 +3233,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: callq __unordtf2 at PLT
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX-NEXT: jne .LBB41_4
; AVX-NEXT: # %bb.3: # %start
@@ -3243,7 +3243,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vmovaps %xmm1, (%rsp) # 16-byte Spill
; AVX-NEXT: callq __gttf2 at PLT
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovdqa %xmm0, %xmm1
; AVX-NEXT: jg .LBB41_6
; AVX-NEXT: # %bb.5: # %start
@@ -3261,7 +3261,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovaps %xmm2, %xmm0
; AVX-NEXT: callq __eqtf2 at PLT
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX-NEXT: je .LBB41_10
; AVX-NEXT: # %bb.9: # %start
@@ -3278,7 +3278,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vmovaps %xmm0, %xmm1
; AVX10_2-NEXT: callq __unordtf2 at PLT
; AVX10_2-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovaps %xmm0, %xmm1
; AVX10_2-NEXT: jne .LBB41_2
; AVX10_2-NEXT: # %bb.1: # %start
@@ -3287,7 +3287,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX10_2-NEXT: vmovaps %xmm0, %xmm1
; AVX10_2-NEXT: callq __unordtf2 at PLT
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX10_2-NEXT: jne .LBB41_4
; AVX10_2-NEXT: # %bb.3: # %start
@@ -3297,7 +3297,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vmovaps %xmm1, (%rsp) # 16-byte Spill
; AVX10_2-NEXT: callq __gttf2 at PLT
; AVX10_2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovdqa %xmm0, %xmm1
; AVX10_2-NEXT: jg .LBB41_6
; AVX10_2-NEXT: # %bb.5: # %start
@@ -3315,7 +3315,7 @@ define fp128 @test_fmaximumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX10_2-NEXT: vmovaps %xmm2, %xmm0
; AVX10_2-NEXT: callq __eqtf2 at PLT
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX10_2-NEXT: je .LBB41_10
; AVX10_2-NEXT: # %bb.9: # %start
@@ -3360,7 +3360,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: callq __unordtf2 at PLT
; SSE2-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: jne .LBB42_2
; SSE2-NEXT: # %bb.1: # %start
@@ -3369,7 +3369,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: callq __unordtf2 at PLT
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; SSE2-NEXT: jne .LBB42_4
; SSE2-NEXT: # %bb.3: # %start
@@ -3379,7 +3379,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill
; SSE2-NEXT: callq __lttf2 at PLT
; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: js .LBB42_6
; SSE2-NEXT: # %bb.5: # %start
@@ -3397,7 +3397,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: movaps %xmm2, %xmm0
; SSE2-NEXT: callq __eqtf2 at PLT
-; SSE2-NEXT: testl %eax, %eax
+; SSE2-NEXT: testq %rax, %rax
; SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE2-NEXT: je .LBB42_10
; SSE2-NEXT: # %bb.9: # %start
@@ -3414,7 +3414,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: callq __unordtf2 at PLT
; AVX-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: jne .LBB42_2
; AVX-NEXT: # %bb.1: # %start
@@ -3423,7 +3423,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: callq __unordtf2 at PLT
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX-NEXT: jne .LBB42_4
; AVX-NEXT: # %bb.3: # %start
@@ -3433,7 +3433,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vmovaps %xmm1, (%rsp) # 16-byte Spill
; AVX-NEXT: callq __lttf2 at PLT
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovdqa %xmm0, %xmm1
; AVX-NEXT: js .LBB42_6
; AVX-NEXT: # %bb.5: # %start
@@ -3451,7 +3451,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovaps %xmm2, %xmm0
; AVX-NEXT: callq __eqtf2 at PLT
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX-NEXT: je .LBB42_10
; AVX-NEXT: # %bb.9: # %start
@@ -3468,7 +3468,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vmovaps %xmm0, %xmm1
; AVX10_2-NEXT: callq __unordtf2 at PLT
; AVX10_2-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovaps %xmm0, %xmm1
; AVX10_2-NEXT: jne .LBB42_2
; AVX10_2-NEXT: # %bb.1: # %start
@@ -3477,7 +3477,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX10_2-NEXT: vmovaps %xmm0, %xmm1
; AVX10_2-NEXT: callq __unordtf2 at PLT
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX10_2-NEXT: jne .LBB42_4
; AVX10_2-NEXT: # %bb.3: # %start
@@ -3487,7 +3487,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vmovaps %xmm1, (%rsp) # 16-byte Spill
; AVX10_2-NEXT: callq __lttf2 at PLT
; AVX10_2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovdqa %xmm0, %xmm1
; AVX10_2-NEXT: js .LBB42_6
; AVX10_2-NEXT: # %bb.5: # %start
@@ -3505,7 +3505,7 @@ define fp128 @test_fminimumnum_fp128(fp128 %x, fp128 %y) nounwind {
; AVX10_2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX10_2-NEXT: vmovaps %xmm2, %xmm0
; AVX10_2-NEXT: callq __eqtf2 at PLT
-; AVX10_2-NEXT: testl %eax, %eax
+; AVX10_2-NEXT: testq %rax, %rax
; AVX10_2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX10_2-NEXT: je .LBB42_10
; AVX10_2-NEXT: # %bb.9: # %start
diff --git a/llvm/test/CodeGen/X86/fp128-cast.ll b/llvm/test/CodeGen/X86/fp128-cast.ll
index 6d4ec063ccd46..e5631ba6dfcf6 100644
--- a/llvm/test/CodeGen/X86/fp128-cast.ll
+++ b/llvm/test/CodeGen/X86/fp128-cast.ll
@@ -1024,7 +1024,7 @@ define dso_local i32 @TestConst128(fp128 %v) nounwind {
; X64-SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0]
; X64-SSE-NEXT: callq __gttf2 at PLT
; X64-SSE-NEXT: xorl %ecx, %ecx
-; X64-SSE-NEXT: testl %eax, %eax
+; X64-SSE-NEXT: testq %rax, %rax
; X64-SSE-NEXT: setg %cl
; X64-SSE-NEXT: movl %ecx, %eax
; X64-SSE-NEXT: popq %rcx
@@ -1056,7 +1056,7 @@ define dso_local i32 @TestConst128(fp128 %v) nounwind {
; X64-AVX-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0]
; X64-AVX-NEXT: callq __gttf2 at PLT
; X64-AVX-NEXT: xorl %ecx, %ecx
-; X64-AVX-NEXT: testl %eax, %eax
+; X64-AVX-NEXT: testq %rax, %rax
; X64-AVX-NEXT: setg %cl
; X64-AVX-NEXT: movl %ecx, %eax
; X64-AVX-NEXT: popq %rcx
@@ -1075,7 +1075,7 @@ define dso_local i32 @TestConst128Zero(fp128 %v) nounwind {
; X64-SSE-NEXT: xorps %xmm1, %xmm1
; X64-SSE-NEXT: callq __gttf2 at PLT
; X64-SSE-NEXT: xorl %ecx, %ecx
-; X64-SSE-NEXT: testl %eax, %eax
+; X64-SSE-NEXT: testq %rax, %rax
; X64-SSE-NEXT: setg %cl
; X64-SSE-NEXT: movl %ecx, %eax
; X64-SSE-NEXT: popq %rcx
@@ -1107,7 +1107,7 @@ define dso_local i32 @TestConst128Zero(fp128 %v) nounwind {
; X64-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-AVX-NEXT: callq __gttf2 at PLT
; X64-AVX-NEXT: xorl %ecx, %ecx
-; X64-AVX-NEXT: testl %eax, %eax
+; X64-AVX-NEXT: testq %rax, %rax
; X64-AVX-NEXT: setg %cl
; X64-AVX-NEXT: movl %ecx, %eax
; X64-AVX-NEXT: popq %rcx
diff --git a/llvm/test/CodeGen/X86/fp128-compare.ll b/llvm/test/CodeGen/X86/fp128-compare.ll
index 3851e59a08e35..97c1f5008e4dd 100644
--- a/llvm/test/CodeGen/X86/fp128-compare.ll
+++ b/llvm/test/CodeGen/X86/fp128-compare.ll
@@ -11,7 +11,7 @@ define i32 @TestComp128GT(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq __gttf2 at PLT
; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: setg %cl
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: popq %rcx
@@ -30,7 +30,7 @@ define i32 @TestComp128GE(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq __getf2 at PLT
; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: setns %cl
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: popq %rcx
@@ -49,7 +49,7 @@ define i32 @TestComp128LT(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq __lttf2 at PLT
; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: sets %cl
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: popq %rcx
@@ -71,7 +71,7 @@ define i32 @TestComp128LE(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq __letf2 at PLT
; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: setle %cl
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: popq %rcx
@@ -90,7 +90,7 @@ define i32 @TestComp128EQ(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq __eqtf2 at PLT
; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: sete %cl
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: popq %rcx
@@ -109,7 +109,7 @@ define i32 @TestComp128NE(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq __netf2 at PLT
; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: setne %cl
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: popq %rcx
@@ -132,12 +132,12 @@ define i32 @TestComp128UEQ(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: callq __eqtf2 at PLT
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: sete %bl
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; CHECK-NEXT: callq __unordtf2 at PLT
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: setne %al
; CHECK-NEXT: orb %bl, %al
; CHECK-NEXT: movzbl %al, %eax
@@ -163,12 +163,12 @@ define i32 @TestComp128ONE(fp128 %d1, fp128 %d2) {
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: callq __eqtf2 at PLT
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: setne %bl
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; CHECK-NEXT: callq __unordtf2 at PLT
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: sete %al
; CHECK-NEXT: andb %bl, %al
; CHECK-NEXT: movzbl %al, %eax
@@ -192,7 +192,7 @@ define fp128 @TestMax(fp128 %x, fp128 %y) {
; CHECK-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill
; CHECK-NEXT: callq __gttf2 at PLT
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
-; CHECK-NEXT: testl %eax, %eax
+; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: jg .LBB8_2
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
diff --git a/llvm/test/CodeGen/X86/fp128-i128.ll b/llvm/test/CodeGen/X86/fp128-i128.ll
index 338950ac4c350..15bf183d9a90d 100644
--- a/llvm/test/CodeGen/X86/fp128-i128.ll
+++ b/llvm/test/CodeGen/X86/fp128-i128.ll
@@ -135,7 +135,7 @@ define fp128 @TestI128_1(fp128 %x) #0 {
; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.00000000000000000000000000000000005E-1]
; SSE-NEXT: callq __lttf2 at PLT
; SSE-NEXT: xorl %ecx, %ecx
-; SSE-NEXT: testl %eax, %eax
+; SSE-NEXT: testq %rax, %rax
; SSE-NEXT: sets %cl
; SSE-NEXT: shll $4, %ecx
; SSE-NEXT: movaps {{.*#+}} xmm0 = [?]
@@ -149,7 +149,7 @@ define fp128 @TestI128_1(fp128 %x) #0 {
; AVX-NEXT: vmovaps {{.*#+}} xmm1 = [1.00000000000000000000000000000000005E-1]
; AVX-NEXT: callq __lttf2 at PLT
; AVX-NEXT: xorl %ecx, %ecx
-; AVX-NEXT: testl %eax, %eax
+; AVX-NEXT: testq %rax, %rax
; AVX-NEXT: sets %cl
; AVX-NEXT: shll $4, %ecx
; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [?]
@@ -431,7 +431,7 @@ declare fp128 @copysignl(fp128, fp128) #1
define dso_local void @TestCopySign(ptr noalias nocapture sret({ fp128, fp128 }) %agg.result, ptr byval({ fp128, fp128 }) nocapture readonly align 16 %z) #0 {
; SSE-LABEL: TestCopySign:
; SSE: # %bb.0: # %entry
-; SSE-NEXT: pushq %rbp
+; SSE-NEXT: pushq %r14
; SSE-NEXT: pushq %rbx
; SSE-NEXT: subq $40, %rsp
; SSE-NEXT: movq %rdi, %rbx
@@ -440,11 +440,11 @@ define dso_local void @TestCopySign(ptr noalias nocapture sret({ fp128, fp128 })
; SSE-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; SSE-NEXT: callq __gttf2 at PLT
-; SSE-NEXT: movl %eax, %ebp
+; SSE-NEXT: movq %rax, %r14
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, %xmm1
; SSE-NEXT: callq __subtf3 at PLT
-; SSE-NEXT: testl %ebp, %ebp
+; SSE-NEXT: testq %r14, %r14
; SSE-NEXT: jle .LBB10_1
; SSE-NEXT: # %bb.2: # %if.then
; SSE-NEXT: movaps %xmm0, %xmm1
@@ -463,12 +463,12 @@ define dso_local void @TestCopySign(ptr noalias nocapture sret({ fp128, fp128 })
; SSE-NEXT: movq %rbx, %rax
; SSE-NEXT: addq $40, %rsp
; SSE-NEXT: popq %rbx
-; SSE-NEXT: popq %rbp
+; SSE-NEXT: popq %r14
; SSE-NEXT: retq
;
; AVX-LABEL: TestCopySign:
; AVX: # %bb.0: # %entry
-; AVX-NEXT: pushq %rbp
+; AVX-NEXT: pushq %r14
; AVX-NEXT: pushq %rbx
; AVX-NEXT: subq $40, %rsp
; AVX-NEXT: movq %rdi, %rbx
@@ -477,11 +477,11 @@ define dso_local void @TestCopySign(ptr noalias nocapture sret({ fp128, fp128 })
; AVX-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; AVX-NEXT: callq __gttf2 at PLT
-; AVX-NEXT: movl %eax, %ebp
+; AVX-NEXT: movq %rax, %r14
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX-NEXT: vmovaps %xmm0, %xmm1
; AVX-NEXT: callq __subtf3 at PLT
-; AVX-NEXT: testl %ebp, %ebp
+; AVX-NEXT: testq %r14, %r14
; AVX-NEXT: jle .LBB10_1
; AVX-NEXT: # %bb.2: # %if.then
; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
@@ -499,7 +499,7 @@ define dso_local void @TestCopySign(ptr noalias nocapture sret({ fp128, fp128 })
; AVX-NEXT: movq %rbx, %rax
; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: popq %rbx
-; AVX-NEXT: popq %rbp
+; AVX-NEXT: popq %r14
; AVX-NEXT: retq
entry:
%z.realp = getelementptr inbounds { fp128, fp128 }, ptr %z, i64 0, i32 0
diff --git a/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll b/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
index ad2d690fd7ed0..94a141d116193 100644
--- a/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
+++ b/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
@@ -3548,7 +3548,7 @@ define i64 @cmp(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; ANDROID-NEXT: movq %rsi, %rbx
; ANDROID-NEXT: movq %rdi, %r14
; ANDROID-NEXT: callq __eqtf2 at PLT
-; ANDROID-NEXT: testl %eax, %eax
+; ANDROID-NEXT: testq %rax, %rax
; ANDROID-NEXT: cmovneq %rbx, %r14
; ANDROID-NEXT: movq %r14, %rax
; ANDROID-NEXT: addq $8, %rsp
@@ -3564,7 +3564,7 @@ define i64 @cmp(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; GNU-NEXT: movq %rsi, %rbx
; GNU-NEXT: movq %rdi, %r14
; GNU-NEXT: callq __eqtf2 at PLT
-; GNU-NEXT: testl %eax, %eax
+; GNU-NEXT: testq %rax, %rax
; GNU-NEXT: cmovneq %rbx, %r14
; GNU-NEXT: movq %r14, %rax
; GNU-NEXT: addq $8, %rsp
@@ -3608,7 +3608,7 @@ define i64 @cmp(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rcx
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rdx
; WIN-NEXT: callq __eqtf2
-; WIN-NEXT: testl %eax, %eax
+; WIN-NEXT: testq %rax, %rax
; WIN-NEXT: cmovneq %rsi, %rdi
; WIN-NEXT: movq %rdi, %rax
; WIN-NEXT: addq $72, %rsp
@@ -3678,7 +3678,7 @@ define i64 @cmps(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; ANDROID-NEXT: movq %rsi, %rbx
; ANDROID-NEXT: movq %rdi, %r14
; ANDROID-NEXT: callq __eqtf2 at PLT
-; ANDROID-NEXT: testl %eax, %eax
+; ANDROID-NEXT: testq %rax, %rax
; ANDROID-NEXT: cmovneq %rbx, %r14
; ANDROID-NEXT: movq %r14, %rax
; ANDROID-NEXT: addq $8, %rsp
@@ -3694,7 +3694,7 @@ define i64 @cmps(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; GNU-NEXT: movq %rsi, %rbx
; GNU-NEXT: movq %rdi, %r14
; GNU-NEXT: callq __eqtf2 at PLT
-; GNU-NEXT: testl %eax, %eax
+; GNU-NEXT: testq %rax, %rax
; GNU-NEXT: cmovneq %rbx, %r14
; GNU-NEXT: movq %r14, %rax
; GNU-NEXT: addq $8, %rsp
@@ -3738,7 +3738,7 @@ define i64 @cmps(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rcx
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rdx
; WIN-NEXT: callq __eqtf2
-; WIN-NEXT: testl %eax, %eax
+; WIN-NEXT: testq %rax, %rax
; WIN-NEXT: cmovneq %rsi, %rdi
; WIN-NEXT: movq %rdi, %rax
; WIN-NEXT: addq $72, %rsp
@@ -3822,12 +3822,12 @@ define i64 @cmp_ueq_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; ANDROID-NEXT: movq %rsi, %rbx
; ANDROID-NEXT: movq %rdi, %r14
; ANDROID-NEXT: callq __eqtf2 at PLT
-; ANDROID-NEXT: testl %eax, %eax
+; ANDROID-NEXT: testq %rax, %rax
; ANDROID-NEXT: sete %bpl
; ANDROID-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; ANDROID-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; ANDROID-NEXT: callq __unordtf2 at PLT
-; ANDROID-NEXT: testl %eax, %eax
+; ANDROID-NEXT: testq %rax, %rax
; ANDROID-NEXT: setne %al
; ANDROID-NEXT: orb %bpl, %al
; ANDROID-NEXT: cmoveq %rbx, %r14
@@ -3849,12 +3849,12 @@ define i64 @cmp_ueq_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; GNU-NEXT: movq %rsi, %rbx
; GNU-NEXT: movq %rdi, %r14
; GNU-NEXT: callq __eqtf2 at PLT
-; GNU-NEXT: testl %eax, %eax
+; GNU-NEXT: testq %rax, %rax
; GNU-NEXT: sete %bpl
; GNU-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; GNU-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; GNU-NEXT: callq __unordtf2 at PLT
-; GNU-NEXT: testl %eax, %eax
+; GNU-NEXT: testq %rax, %rax
; GNU-NEXT: setne %al
; GNU-NEXT: orb %bpl, %al
; GNU-NEXT: cmoveq %rbx, %r14
@@ -3929,12 +3929,12 @@ define i64 @cmp_ueq_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; WIN-NEXT: callq __eqtf2
; WIN-NEXT: movaps %xmm7, {{[0-9]+}}(%rsp)
; WIN-NEXT: movaps %xmm6, {{[0-9]+}}(%rsp)
-; WIN-NEXT: testl %eax, %eax
+; WIN-NEXT: testq %rax, %rax
; WIN-NEXT: sete %bl
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rcx
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rdx
; WIN-NEXT: callq __unordtf2
-; WIN-NEXT: testl %eax, %eax
+; WIN-NEXT: testq %rax, %rax
; WIN-NEXT: setne %al
; WIN-NEXT: orb %bl, %al
; WIN-NEXT: cmoveq %rsi, %rdi
@@ -4043,12 +4043,12 @@ define i64 @cmp_one_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; ANDROID-NEXT: movq %rsi, %rbx
; ANDROID-NEXT: movq %rdi, %r14
; ANDROID-NEXT: callq __eqtf2 at PLT
-; ANDROID-NEXT: testl %eax, %eax
+; ANDROID-NEXT: testq %rax, %rax
; ANDROID-NEXT: setne %bpl
; ANDROID-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; ANDROID-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; ANDROID-NEXT: callq __unordtf2 at PLT
-; ANDROID-NEXT: testl %eax, %eax
+; ANDROID-NEXT: testq %rax, %rax
; ANDROID-NEXT: sete %al
; ANDROID-NEXT: testb %bpl, %al
; ANDROID-NEXT: cmoveq %rbx, %r14
@@ -4070,12 +4070,12 @@ define i64 @cmp_one_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; GNU-NEXT: movq %rsi, %rbx
; GNU-NEXT: movq %rdi, %r14
; GNU-NEXT: callq __eqtf2 at PLT
-; GNU-NEXT: testl %eax, %eax
+; GNU-NEXT: testq %rax, %rax
; GNU-NEXT: setne %bpl
; GNU-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; GNU-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; GNU-NEXT: callq __unordtf2 at PLT
-; GNU-NEXT: testl %eax, %eax
+; GNU-NEXT: testq %rax, %rax
; GNU-NEXT: sete %al
; GNU-NEXT: testb %bpl, %al
; GNU-NEXT: cmoveq %rbx, %r14
@@ -4152,12 +4152,12 @@ define i64 @cmp_one_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
; WIN-NEXT: callq __eqtf2
; WIN-NEXT: movaps %xmm7, {{[0-9]+}}(%rsp)
; WIN-NEXT: movaps %xmm6, {{[0-9]+}}(%rsp)
-; WIN-NEXT: testl %eax, %eax
+; WIN-NEXT: testq %rax, %rax
; WIN-NEXT: setne %bl
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rcx
; WIN-NEXT: leaq {{[0-9]+}}(%rsp), %rdx
; WIN-NEXT: callq __unordtf2
-; WIN-NEXT: testl %eax, %eax
+; WIN-NEXT: testq %rax, %rax
; WIN-NEXT: sete %al
; WIN-NEXT: testb %bl, %al
; WIN-NEXT: cmoveq %rsi, %rdi
diff --git a/llvm/test/CodeGen/X86/fp128-select.ll b/llvm/test/CodeGen/X86/fp128-select.ll
index 27a651e23f886..880a3d6873822 100644
--- a/llvm/test/CodeGen/X86/fp128-select.ll
+++ b/llvm/test/CodeGen/X86/fp128-select.ll
@@ -48,11 +48,11 @@ define fp128 @test_select_cc(fp128, fp128) nounwind {
; SSE-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; SSE-NEXT: callq __netf2 at PLT
-; SSE-NEXT: movl %eax, %ebx
+; SSE-NEXT: movq %rax, %rbx
; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; SSE-NEXT: callq __eqtf2 at PLT
-; SSE-NEXT: testl %eax, %eax
+; SSE-NEXT: testq %rax, %rax
; SSE-NEXT: je .LBB1_1
; SSE-NEXT: # %bb.2: # %BB0
; SSE-NEXT: xorps %xmm1, %xmm1
@@ -60,7 +60,7 @@ define fp128 @test_select_cc(fp128, fp128) nounwind {
; SSE-NEXT: .LBB1_1:
; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0]
; SSE-NEXT: .LBB1_3: # %BB0
-; SSE-NEXT: testl %ebx, %ebx
+; SSE-NEXT: testq %rbx, %rbx
; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; SSE-NEXT: jne .LBB1_5
; SSE-NEXT: # %bb.4: # %BB1
@@ -72,9 +72,9 @@ define fp128 @test_select_cc(fp128, fp128) nounwind {
;
; NOSSE-LABEL: test_select_cc:
; NOSSE: # %bb.0: # %BB0
-; NOSSE-NEXT: pushq %rbp
; NOSSE-NEXT: pushq %r15
; NOSSE-NEXT: pushq %r14
+; NOSSE-NEXT: pushq %r13
; NOSSE-NEXT: pushq %r12
; NOSSE-NEXT: pushq %rbx
; NOSSE-NEXT: movq %rcx, %r15
@@ -82,18 +82,18 @@ define fp128 @test_select_cc(fp128, fp128) nounwind {
; NOSSE-NEXT: movq %rsi, %rbx
; NOSSE-NEXT: movq %rdi, %r14
; NOSSE-NEXT: callq __netf2 at PLT
-; NOSSE-NEXT: movl %eax, %ebp
+; NOSSE-NEXT: movq %rax, %r13
; NOSSE-NEXT: movq %r14, %rdi
; NOSSE-NEXT: movq %rbx, %rsi
; NOSSE-NEXT: movq %r12, %rdx
; NOSSE-NEXT: movq %r15, %rcx
; NOSSE-NEXT: callq __eqtf2 at PLT
-; NOSSE-NEXT: movl %eax, %ecx
+; NOSSE-NEXT: movq %rax, %rcx
; NOSSE-NEXT: xorl %eax, %eax
-; NOSSE-NEXT: testl %ecx, %ecx
+; NOSSE-NEXT: testq %rcx, %rcx
; NOSSE-NEXT: movabsq $4611404543450677248, %rdx # imm = 0x3FFF000000000000
; NOSSE-NEXT: cmovneq %rax, %rdx
-; NOSSE-NEXT: testl %ebp, %ebp
+; NOSSE-NEXT: testq %r13, %r13
; NOSSE-NEXT: je .LBB1_2
; NOSSE-NEXT: # %bb.1:
; NOSSE-NEXT: movq %r14, %rax
@@ -101,9 +101,9 @@ define fp128 @test_select_cc(fp128, fp128) nounwind {
; NOSSE-NEXT: .LBB1_2: # %BB2
; NOSSE-NEXT: popq %rbx
; NOSSE-NEXT: popq %r12
+; NOSSE-NEXT: popq %r13
; NOSSE-NEXT: popq %r14
; NOSSE-NEXT: popq %r15
-; NOSSE-NEXT: popq %rbp
; NOSSE-NEXT: retq
BB0:
%a = fcmp oeq fp128 %0, %1
diff --git a/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll b/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll
index f2b0a6e186305..21f1558bf5f63 100644
--- a/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll
+++ b/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll
@@ -19,11 +19,11 @@ define fp128 @TestSelect(fp128 %a, fp128 %b) {
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: callq __gttf2 at PLT
-; CHECK-NEXT: movl %eax, %ebx
+; CHECK-NEXT: movq %rax, %rbx
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; CHECK-NEXT: callq __subtf3 at PLT
-; CHECK-NEXT: testl %ebx, %ebx
+; CHECK-NEXT: testq %rbx, %rbx
; CHECK-NEXT: jg .LBB0_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: xorps %xmm0, %xmm0
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