[llvm] [RISCV][llvm] Support widening fadd, fsub and fmul codegen for zvfbfa (PR #192414)

[Brandon Wu via llvm-commits]

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@@ -18428,9 +18428,10 @@ static std::optional<CombineResult>
 canFoldToVWWithSameExtension(SDNode *Root, const NodeExtensionHelper &LHS,
                              const NodeExtensionHelper &RHS, SelectionDAG &DAG,
                              const RISCVSubtarget &Subtarget) {
-  return canFoldToVWWithSameExtensionImpl(
-      Root, LHS, RHS, ExtKind::ZExt | ExtKind::SExt | ExtKind::FPExt, DAG,
-      Subtarget);
+  return canFoldToVWWithSameExtensionImpl(Root, LHS, RHS,
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4vtomat wrote:

Yes, it enables FADD, FSUB and FMUL to be combined. But there's a bug that I just found and need to be resolved😂

https://github.com/llvm/llvm-project/pull/192414