[llvm] [AMDGPU] Add named operands to SI_CALL_ISEL (PR #192196)

[via llvm-commits]

https://github.com/StevenYangCC updated https://github.com/llvm/llvm-project/pull/192196

>From a3c5e2252d20fa51fb4fb1b479edf928ce90cf9c Mon Sep 17 00:00:00 2001
From: "chengcang.yang" <yangchengcang at gmail.com>
Date: Wed, 15 Apr 2026 14:27:41 +0800
Subject: [PATCH 1/2] [AMDGPU] Add named operands to SI_CALL_ISEL

Enable the named operand table for SI_CALL_ISEL so downstream analyses and rewrites can query its callee operand consistently.
---
 llvm/lib/Target/AMDGPU/SIInstructions.td | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 008fdbaddfd22..4096d5e1fec56 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -810,6 +810,7 @@ def SI_CALL_ISEL : SPseudoInstSI <
   [(AMDGPUcall i64:$src0, tglobaladdr:$callee)]> {
   let Size = 4;
   let isCall = 1;
+  let UseNamedOperandTable = 1;
   let SchedRW = [WriteBranch];
   let usesCustomInserter = 1;
   // TODO: Should really base this on the call target

>From ce89276648bcdd0496fd1c4e9cf696278146c624 Mon Sep 17 00:00:00 2001
From: "chengcang.yang" <yangchengcang at gmail.com>
Date: Wed, 15 Apr 2026 15:37:47 +0800
Subject: [PATCH 2/2] [AMDGPU] Add SI_CALL_ISEL named operand regression

Check the generated -gen-instr-info output for SI_CALL_ISEL so the regression covers the named operand tables emitted for downstream lookups.
---
 .../amdgpu-si-call-isel-named-operands.td         | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 llvm/test/TableGen/amdgpu-si-call-isel-named-operands.td

diff --git a/llvm/test/TableGen/amdgpu-si-call-isel-named-operands.td b/llvm/test/TableGen/amdgpu-si-call-isel-named-operands.td
new file mode 100644
index 0000000000000..14d870ad6d11a
--- /dev/null
+++ b/llvm/test/TableGen/amdgpu-si-call-isel-named-operands.td
@@ -0,0 +1,15 @@
+// RUN: llvm-tblgen -gen-instr-info -I %p/../../include -I %p/../../lib/Target/AMDGPU -I %p/../../lib/Target %s | FileCheck %s
+
+include "AMDGPU.td"
+
+// CHECK-LABEL: #ifdef GET_INSTRINFO_OPERAND_ENUM
+// CHECK: namespace llvm::AMDGPU {
+// CHECK: enum class OpName : uint8_t {
+// CHECK: callee =
+// CHECK: LLVM_READONLY int16_t getNamedOperandIdx(uint32_t Opcode, OpName Name);
+// CHECK: LLVM_READONLY OpName getOperandIdxName(uint32_t Opcode, int16_t Idx);
+
+// CHECK-LABEL: #ifdef GET_INSTRINFO_NAMED_OPS
+// CHECK: LLVM_READONLY OpName getOperandIdxName(uint32_t Opcode, int16_t Idx) {
+// CHECK: static constexpr OpName OperandMap[][24] = {
+// CHECK: {OpName::src0, OpName::callee, OpName::NUM_OPERAND_NAMES, OpName::NUM_OPERAND_NAMES,