[llvm] [LV][NFC] Remove "REQUIRES: asserts" line from some tests (PR #191795)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 15 01:53:50 PDT 2026
https://github.com/david-arm updated https://github.com/llvm/llvm-project/pull/191795
>From 91dccf9dc3dc703517ca039eddec9590e440cd41 Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Mon, 13 Apr 2026 10:50:27 +0000
Subject: [PATCH 1/2] [LV][NFC] Remove "REQUIRES: asserts" line from some tests
Several tests seemed to require asserts despite not testing any
debug output so I have removed the line.
---
.../LoopVectorize/AArch64/sve2-histcnt-epilogue.ll | 4 ++--
.../LoopVectorize/LoongArch/loongarch-interleaved.ll | 1 -
llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll | 1 -
llvm/test/Transforms/LoopVectorize/optsize.ll | 1 -
llvm/test/Transforms/LoopVectorize/pr31190.ll | 5 ++---
llvm/test/Transforms/LoopVectorize/tripcount.ll | 1 -
6 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
index 8d77b3c900d96..5eae4aecb28c6 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter-out-after "^for.body:" --version 3
-; RUN: opt < %s -mattr=+sve2 -passes=loop-vectorize,instcombine -enable-histogram-loop-vectorization -sve-gather-overhead=2 -sve-scatter-overhead=2 -epilogue-vectorization-minimum-VF=4 -debug-only=loop-vectorize -force-vector-interleave=1 -S 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; RUN: opt < %s -mattr=+sve2 -passes=loop-vectorize,instcombine -enable-histogram-loop-vectorization -sve-gather-overhead=2 \
+; RUN: -sve-scatter-overhead=2 -epilogue-vectorization-minimum-VF=4 -force-vector-interleave=1 -S 2>&1 | FileCheck %s
target triple = "aarch64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll b/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
index c0e327c5c1289..4fb9a6db4d181 100644
--- a/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
+++ b/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
@@ -1,4 +1,3 @@
-; REQUIRES: asserts
; RUN: opt --passes=loop-vectorize,dce,instcombine --mtriple loongarch64 \
; RUN: -S < %s 2>&1 | FileCheck %s
diff --git a/llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll b/llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
index a1da64350e601..5d7a85c055dea 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
@@ -1,6 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt < %s -passes=loop-vectorize -mtriple=x86_64-unknown-linux -S -mcpu=slm | FileCheck %s
-; REQUIRES: asserts
; This test should not be vectorized in X86\SLM arch
; Vectorizing the 64bit multiply in this case is wrong since
diff --git a/llvm/test/Transforms/LoopVectorize/optsize.ll b/llvm/test/Transforms/LoopVectorize/optsize.ll
index 476dc466fa10e..06e2a9c678d4b 100644
--- a/llvm/test/Transforms/LoopVectorize/optsize.ll
+++ b/llvm/test/Transforms/LoopVectorize/optsize.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; This test verifies that the loop vectorizer will NOT produce a tail
; loop with the optimize for size or the minimize size attributes.
-; REQUIRES: asserts
; RUN: opt < %s -passes='require<profile-summary>,loop-vectorize' -S | FileCheck %s
; RUN: opt < %s -passes='require<profile-summary>,loop-vectorize' -pgso -S | FileCheck %s -check-prefix=PGSO
; RUN: opt < %s -passes='require<profile-summary>,loop-vectorize' -pgso=false -S | FileCheck %s -check-prefix=NPGSO
diff --git a/llvm/test/Transforms/LoopVectorize/pr31190.ll b/llvm/test/Transforms/LoopVectorize/pr31190.ll
index b6d2ca3b7e941..4d9c1bc82a5db 100644
--- a/llvm/test/Transforms/LoopVectorize/pr31190.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr31190.ll
@@ -1,5 +1,4 @@
-; RUN: opt -passes='loop-vectorize' -debug -S < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; RUN: opt -passes='loop-vectorize' -force-vector-width=4 -S < %s | FileCheck %s
; This checks we don't crash when the inner loop we're trying to vectorize
; is a SCEV AddRec with respect to an outer loop.
@@ -32,8 +31,8 @@
; We can vectorize this loop because we are storing an invariant value into an
; invariant address.
-; CHECK: LV: We can vectorize this loop!
; CHECK-LABEL: @test
+; CHECK: vector.body
define void @test() {
entry:
%a.promoted2 = load i32, ptr @a, align 1
diff --git a/llvm/test/Transforms/LoopVectorize/tripcount.ll b/llvm/test/Transforms/LoopVectorize/tripcount.ll
index 7b3ca21367a34..4819f89885ef5 100644
--- a/llvm/test/Transforms/LoopVectorize/tripcount.ll
+++ b/llvm/test/Transforms/LoopVectorize/tripcount.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 6
; This test verifies that the loop vectorizer will not vectorizes low trip count
; loops that require runtime checks (Trip count is computed with profile info).
-; REQUIRES: asserts
; RUN: opt < %s -passes=loop-vectorize -loop-vectorize-with-block-frequency -S | FileCheck %s
target datalayout = "E-m:e-p:32:32-i64:32-f64:32:64-a:0:32-n32-S128"
>From d4114997eb80ce68c860b3f44299ae2076a1e281 Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Mon, 13 Apr 2026 13:37:14 +0000
Subject: [PATCH 2/2] Address review comment
---
llvm/test/Transforms/LoopVectorize/pr31190.ll | 32 +++++++++++++++++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/pr31190.ll b/llvm/test/Transforms/LoopVectorize/pr31190.ll
index 4d9c1bc82a5db..7eb5029e34d9d 100644
--- a/llvm/test/Transforms/LoopVectorize/pr31190.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr31190.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 6
; RUN: opt -passes='loop-vectorize' -force-vector-width=4 -S < %s | FileCheck %s
; This checks we don't crash when the inner loop we're trying to vectorize
@@ -31,9 +32,36 @@
; We can vectorize this loop because we are storing an invariant value into an
; invariant address.
-; CHECK-LABEL: @test
-; CHECK: vector.body
define void @test() {
+; CHECK-LABEL: define void @test() {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: [[A_PROMOTED2:%.*]] = load i32, ptr @a, align 1
+; CHECK-NEXT: [[C_PROMOTED:%.*]] = load i32, ptr @c, align 1
+; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]
+; CHECK: [[FOR_COND1_PREHEADER]]:
+; CHECK-NEXT: [[INC54:%.*]] = phi i32 [ [[INC5:%.*]], %[[FOR_COND1_FOR_INC4_CRIT_EDGE:.*]] ], [ [[C_PROMOTED]], %[[ENTRY]] ]
+; CHECK-NEXT: [[INC_LCSSA3:%.*]] = phi i32 [ [[INC_LCSSA:%.*]], %[[FOR_COND1_FOR_INC4_CRIT_EDGE]] ], [ [[A_PROMOTED2]], %[[ENTRY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[INC_LCSSA3]], -1
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4
+; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[N_MOD_VF]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INC_LCSSA3]], [[N_VEC]]
+; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[INC54]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i32], ptr @b, i64 0, i64 [[TMP2]]
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: store i32 4, ptr [[TMP3]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
+; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND1_FOR_INC4_CRIT_EDGE]], label %[[SCALAR_PH]]
+; CHECK: [[SCALAR_PH]]:
+;
entry:
%a.promoted2 = load i32, ptr @a, align 1
%c.promoted = load i32, ptr @c, align 1
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