[llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)

[John Brawn via llvm-commits]

john-brawn-arm wrote:

I've gone through all of the test changes here to make sure they make sense. My explanation of what's going on in each:
```
Different VL due to previously underestimating the cost:
 llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
 llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
 llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
 llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
 llvm/test/Transforms/LoopVectorize/X86/optsize.ll
 llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
 llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
  In all these the VPlan has a vector cmp where legacy cost model was assuming scalar cmp

Different VL due to previously overestimating the cost:
 llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
  In VPlan loop condition is based on active lane mask and cmp is removed
 llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
  TC is 8, so branch-on-count has cost 0 for VL 8
 llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
  Legacy cost model has scalarized load being used in the loop condition, but VPlan has just branch-on-count
 llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
  Legacy cost model has a sign-extend before the cmp which is eliminated by using branch-on-count

Higher minimum trip count due to counting cmp instructions in middle block
 llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
 llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
 llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
 llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
 llvm/test/Transforms/LoopVectorize/RISCV/transform-narrow-interleave-to-widen-memory.ll
 llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
 llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll

Tests that check the -debug output which has changed
 llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
 llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
 llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
 llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
 llvm/test/Transforms/LoopVectorize/X86/reduction-small-size.ll
```

https://github.com/llvm/llvm-project/pull/156864