[llvm] [AArch64][ISel] Fix interleave3 crash (PR #192046)
Matthew Devereau via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 14 06:56:16 PDT 2026
================
@@ -32322,6 +32322,63 @@ SDValue AArch64TargetLowering::LowerVECTOR_INTERLEAVE(SDValue Op,
return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, Op->getVTList(), Ops);
}
+ if (Op->getNumOperands() == 3 && (OpVT == MVT::v2f64 || OpVT == MVT::v2i64)) {
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MDevereau wrote:
For .d, the element count of a vector is less than the interleave factor which means you only need 1 shuffle per input vector to make a completed interleaved vector part {a0, b0}, {c0, a1}... If we're working with v4f32 each vector needs elements from Op0, Op1, and Op2, {a0, b0, c0, a1}, {b1, c1, a2, b2}... so we need 2 shuffles per vector when VectorNumElements > InterleaveFactor. I'll expand the comments to cover this
https://github.com/llvm/llvm-project/pull/192046
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