[llvm] AMDGPU/GlobalISel: RegBankLegalize rules for returnaddress (PR #191318)

[Petar Avramovic via llvm-commits]

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@@ -1470,6 +1470,8 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
 
   using namespace Intrinsic;
 
+  addRulesForIOpcs({returnaddress}, StandardB).Uni(B64, {{SgprB64}, {}});
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petar-avramovic wrote:

Some rules require type check, for example S32 vs V2S16, in cases like that B32 would not work.
Now for other case we try to be consistent with type list from LLVM-IR instruction.
For example here P0 check would be much more appropriate
but B64 or Prt64 would also work even though Prt64 also accepts P1 and more other types which can't be operand type for this instructions.

https://github.com/llvm/llvm-project/pull/191318