[llvm] [X86] Fix VPMOVPattern folding for extended registers (PR #191760)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 14 00:08:44 PDT 2026
https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/191760
>From 409c83ecbb62e727767df8c3a9ce844f23f34581 Mon Sep 17 00:00:00 2001
From: Qihan Cai <caiqihan021 at hotmail.com>
Date: Mon, 13 Apr 2026 15:25:13 +1000
Subject: [PATCH] [X86] Fix tryCompressVPMOVPattern incorrectly folds extended
registers into VEX Fixes a problem that tryCompressVPMOVPattern incorrectly
folds instruction using extended registers into VEX. Introduced relevant
tests in MIR.
AI Statement: I used AI to write the tests.
Fixes #191304
---
llvm/lib/Target/X86/X86CompressEVEX.cpp | 3 +++
llvm/test/CodeGen/X86/evex-to-vex-compress.mir | 8 ++++++++
2 files changed, 11 insertions(+)
diff --git a/llvm/lib/Target/X86/X86CompressEVEX.cpp b/llvm/lib/Target/X86/X86CompressEVEX.cpp
index 603fe920fad53..33f1fe4aea767 100644
--- a/llvm/lib/Target/X86/X86CompressEVEX.cpp
+++ b/llvm/lib/Target/X86/X86CompressEVEX.cpp
@@ -237,6 +237,9 @@ static bool tryCompressVPMOVPattern(MachineInstr &MI, MachineBasicBlock &MBB,
Opc != X86::VPMOVB2MZ128kr && Opc != X86::VPMOVB2MZ256kr)
return false;
+ if (usesExtendedRegister(MI))
+ return false;
+
Register MaskReg = MI.getOperand(0).getReg();
Register SrcVecReg = MI.getOperand(1).getReg();
diff --git a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
index 142f07ae6e2b2..b33a1d571c818 100644
--- a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
+++ b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
@@ -904,6 +904,10 @@ body: |
; CHECK: $eax = VPMOVMSKBYrr $ymm0
$k0 = VPMOVB2MZ256kr $ymm0
$eax = KMOVDrk $k0
+ ; CHECK: $k3 = VPMOVB2MZ256kr $ymm23
+ ; CHECK: $edx = KMOVDrk $k3
+ $k3 = VPMOVB2MZ256kr $ymm23
+ $edx = KMOVDrk $k3
; CHECK: $k0 = VPMOVD2MZ256kr $ymm0
; CHECK: $eax = KMOVBrk $k0
; CHECK: $ebx = KMOVBrk $k0
@@ -1789,6 +1793,10 @@ body: |
; CHECK: $eax = VPMOVMSKBrr $xmm0
$k0 = VPMOVB2MZ128kr $xmm0
$eax = KMOVWrk $k0
+ ; CHECK: $k3 = VPMOVB2MZ128kr $xmm23
+ ; CHECK: $edx = KMOVWrk $k3
+ $k3 = VPMOVB2MZ128kr $xmm23
+ $edx = KMOVWrk $k3
; CHECK: $k0 = VPMOVD2MZ128kr $xmm0
; CHECK: $eax = KMOVBrk $k0
; CHECK: $ebx = KMOVBrk $k0
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