[llvm] [X86][APX] Reset SubReg of NewMI operand1 (PR #191765)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 13 18:49:52 PDT 2026
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/191765
>From fb49e3ceb6e2dcea0e4482b5669e9a391355c92d Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang at intel.com>
Date: Mon, 13 Apr 2026 15:02:57 +0800
Subject: [PATCH 1/3] [X86][APX] Reset SubReg of NewMI operand1
We have made sure dst operand never has a SubReg.
---
llvm/lib/Target/X86/X86InstrInfo.cpp | 1 +
llvm/test/CodeGen/X86/apx/add.ll | 287 +++++++++++++++++++++++++++
2 files changed, 288 insertions(+)
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index f4c3da1cd63d8..e477c27e3848c 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7629,6 +7629,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
.addDef(NewSrc)
.addReg(SrcReg, {}, SrcSub);
NewMI->getOperand(1).setReg(NewSrc);
+ NewMI->getOperand(1).setSubReg(0);
}
return NewMI;
}
diff --git a/llvm/test/CodeGen/X86/apx/add.ll b/llvm/test/CodeGen/X86/apx/add.ll
index b56036c955024..0cbbbdfbb8715 100644
--- a/llvm/test/CodeGen/X86/apx/add.ll
+++ b/llvm/test/CodeGen/X86/apx/add.ll
@@ -1248,3 +1248,290 @@ entry:
store i64 %add, ptr %a
ret void
}
+
+define i32 @two_address_no_subreg(i32 %arg0, ptr %arg1, i1 %arg2) nounwind {
+; NDD-LABEL: two_address_no_subreg:
+; NDD: # %bb.0: # %entry
+; NDD-NEXT: pushq %rbp # encoding: [0x55]
+; NDD-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; NDD-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; NDD-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; NDD-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; NDD-NEXT: pushq %rbx # encoding: [0x53]
+; NDD-NEXT: pushq %rax # encoding: [0x50]
+; NDD-NEXT: movl %edx, %ebp # encoding: [0x89,0xd5]
+; NDD-NEXT: movq %rsi, %r14 # encoding: [0x49,0x89,0xf6]
+; NDD-NEXT: movl %edi, %ebx # encoding: [0x89,0xfb]
+; NDD-NEXT: movslq %edi, %rax # encoding: [0x48,0x63,0xc7]
+; NDD-NEXT: imulq $715827883, %rax, %r13 # encoding: [0x4c,0x69,0xe8,0xab,0xaa,0xaa,0x2a]
+; NDD-NEXT: # imm = 0x2AAAAAAB
+; NDD-NEXT: shrq $63, %r13, %rax # encoding: [0x62,0xd4,0xfc,0x18,0xc1,0xed,0x3f]
+; NDD-NEXT: movq %rax, (%rsp) # 8-byte Spill
+; NDD-NEXT: # encoding: [0x48,0x89,0x04,0x24]
+; NDD-NEXT: shrq $32, %r13 # EVEX TO LEGACY Compression encoding: [0x49,0xc1,0xed,0x20]
+; NDD-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; NDD-NEXT: movq %rsi, %rdi # encoding: [0x48,0x89,0xf7]
+; NDD-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; NDD-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; NDD-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; NDD-NEXT: movl $1, %r12d # encoding: [0x41,0xbc,0x01,0x00,0x00,0x00]
+; NDD-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; NDD-NEXT: jne .LBB50_2 # encoding: [0x75,A]
+; NDD-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; NDD-NEXT: # %bb.1: # %bb2
+; NDD-NEXT: xorl %r12d, %r12d # encoding: [0x45,0x31,0xe4]
+; NDD-NEXT: .LBB50_2: # %bb1
+; NDD-NEXT: movl %r13d, %esi # encoding: [0x44,0x89,0xee]
+; NDD-NEXT: addl (%rsp), %esi # 4-byte Folded Reload
+; NDD-NEXT: # encoding: [0x03,0x34,0x24]
+; NDD-NEXT: imull %ebx, %ebx, %r13d # encoding: [0x62,0xf4,0x14,0x18,0xaf,0xdb]
+; NDD-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; NDD-NEXT: jne .LBB50_4 # encoding: [0x75,A]
+; NDD-NEXT: # fixup A - offset: 1, value: .LBB50_4, kind: FK_PCRel_1
+; NDD-NEXT: # %bb.3: # %bb4
+; NDD-NEXT: xorl %ebp, %ebp # encoding: [0x31,0xed]
+; NDD-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; NDD-NEXT: movl %esi, %r14d # encoding: [0x41,0x89,0xf6]
+; NDD-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; NDD-NEXT: incl %r12d, %r15d # encoding: [0x62,0xd4,0x04,0x18,0xff,0xc4]
+; NDD-NEXT: xorl %edi, %edi # encoding: [0x31,0xff]
+; NDD-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; NDD-NEXT: movl %r14d, %esi # encoding: [0x44,0x89,0xf6]
+; NDD-NEXT: .LBB50_4: # %bb3
+; NDD-NEXT: orl %r13d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xee]
+; NDD-NEXT: orl %r15d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xfe]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: movl %ebx, %edi # encoding: [0x89,0xdf]
+; NDD-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; NDD-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; NDD-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: addq $8, %rsp # encoding: [0x48,0x83,0xc4,0x08]
+; NDD-NEXT: popq %rbx # encoding: [0x5b]
+; NDD-NEXT: popq %r12 # encoding: [0x41,0x5c]
+; NDD-NEXT: popq %r13 # encoding: [0x41,0x5d]
+; NDD-NEXT: popq %r14 # encoding: [0x41,0x5e]
+; NDD-NEXT: popq %r15 # encoding: [0x41,0x5f]
+; NDD-NEXT: popq %rbp # encoding: [0x5d]
+; NDD-NEXT: retq # encoding: [0xc3]
+;
+; IMMONLY-LABEL: two_address_no_subreg:
+; IMMONLY: # %bb.0: # %entry
+; IMMONLY-NEXT: pushq %rbp # encoding: [0x55]
+; IMMONLY-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; IMMONLY-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; IMMONLY-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; IMMONLY-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; IMMONLY-NEXT: pushq %rbx # encoding: [0x53]
+; IMMONLY-NEXT: pushq %rax # encoding: [0x50]
+; IMMONLY-NEXT: movl %edx, %ebp # encoding: [0x89,0xd5]
+; IMMONLY-NEXT: movq %rsi, %r14 # encoding: [0x49,0x89,0xf6]
+; IMMONLY-NEXT: movl %edi, %ebx # encoding: [0x89,0xfb]
+; IMMONLY-NEXT: movslq %edi, %rax # encoding: [0x48,0x63,0xc7]
+; IMMONLY-NEXT: imulq $715827883, %rax, %r13 # encoding: [0x4c,0x69,0xe8,0xab,0xaa,0xaa,0x2a]
+; IMMONLY-NEXT: # imm = 0x2AAAAAAB
+; IMMONLY-NEXT: shrq $63, %r13, %rax # encoding: [0x62,0xd4,0xfc,0x18,0xc1,0xed,0x3f]
+; IMMONLY-NEXT: movq %rax, (%rsp) # 8-byte Spill
+; IMMONLY-NEXT: # encoding: [0x48,0x89,0x04,0x24]
+; IMMONLY-NEXT: shrq $32, %r13 # EVEX TO LEGACY Compression encoding: [0x49,0xc1,0xed,0x20]
+; IMMONLY-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; IMMONLY-NEXT: movq %rsi, %rdi # encoding: [0x48,0x89,0xf7]
+; IMMONLY-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; IMMONLY-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; IMMONLY-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; IMMONLY-NEXT: movl $1, %r12d # encoding: [0x41,0xbc,0x01,0x00,0x00,0x00]
+; IMMONLY-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; IMMONLY-NEXT: jne .LBB50_2 # encoding: [0x75,A]
+; IMMONLY-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; IMMONLY-NEXT: # %bb.1: # %bb2
+; IMMONLY-NEXT: xorl %r12d, %r12d # encoding: [0x45,0x31,0xe4]
+; IMMONLY-NEXT: .LBB50_2: # %bb1
+; IMMONLY-NEXT: movl %r13d, %esi # encoding: [0x44,0x89,0xee]
+; IMMONLY-NEXT: addl (%rsp), %esi # 4-byte Folded Reload
+; IMMONLY-NEXT: # encoding: [0x03,0x34,0x24]
+; IMMONLY-NEXT: imull %ebx, %ebx, %r13d # encoding: [0x62,0xf4,0x14,0x18,0xaf,0xdb]
+; IMMONLY-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; IMMONLY-NEXT: jne .LBB50_4 # encoding: [0x75,A]
+; IMMONLY-NEXT: # fixup A - offset: 1, value: .LBB50_4, kind: FK_PCRel_1
+; IMMONLY-NEXT: # %bb.3: # %bb4
+; IMMONLY-NEXT: xorl %ebp, %ebp # encoding: [0x31,0xed]
+; IMMONLY-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; IMMONLY-NEXT: movl %esi, %r14d # encoding: [0x41,0x89,0xf6]
+; IMMONLY-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; IMMONLY-NEXT: incl %r12d, %r15d # encoding: [0x62,0xd4,0x04,0x18,0xff,0xc4]
+; IMMONLY-NEXT: xorl %edi, %edi # encoding: [0x31,0xff]
+; IMMONLY-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; IMMONLY-NEXT: movl %r14d, %esi # encoding: [0x44,0x89,0xf6]
+; IMMONLY-NEXT: .LBB50_4: # %bb3
+; IMMONLY-NEXT: orl %r13d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xee]
+; IMMONLY-NEXT: orl %r15d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xfe]
+; IMMONLY-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; IMMONLY-NEXT: movl %ebx, %edi # encoding: [0x89,0xdf]
+; IMMONLY-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; IMMONLY-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; IMMONLY-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; IMMONLY-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; IMMONLY-NEXT: addq $8, %rsp # encoding: [0x48,0x83,0xc4,0x08]
+; IMMONLY-NEXT: popq %rbx # encoding: [0x5b]
+; IMMONLY-NEXT: popq %r12 # encoding: [0x41,0x5c]
+; IMMONLY-NEXT: popq %r13 # encoding: [0x41,0x5d]
+; IMMONLY-NEXT: popq %r14 # encoding: [0x41,0x5e]
+; IMMONLY-NEXT: popq %r15 # encoding: [0x41,0x5f]
+; IMMONLY-NEXT: popq %rbp # encoding: [0x5d]
+; IMMONLY-NEXT: retq # encoding: [0xc3]
+;
+; MEM-LABEL: two_address_no_subreg:
+; MEM: # %bb.0: # %entry
+; MEM-NEXT: pushq %rbp # encoding: [0x55]
+; MEM-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; MEM-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; MEM-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; MEM-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; MEM-NEXT: pushq %rbx # encoding: [0x53]
+; MEM-NEXT: pushq %rax # encoding: [0x50]
+; MEM-NEXT: movl %edx, %ebp # encoding: [0x89,0xd5]
+; MEM-NEXT: movq %rsi, %r14 # encoding: [0x49,0x89,0xf6]
+; MEM-NEXT: movl %edi, %ebx # encoding: [0x89,0xfb]
+; MEM-NEXT: movslq %edi, %rax # encoding: [0x48,0x63,0xc7]
+; MEM-NEXT: imulq $715827883, %rax, %r13 # encoding: [0x4c,0x69,0xe8,0xab,0xaa,0xaa,0x2a]
+; MEM-NEXT: # imm = 0x2AAAAAAB
+; MEM-NEXT: shrq $63, %r13, %rax # encoding: [0x62,0xd4,0xfc,0x18,0xc1,0xed,0x3f]
+; MEM-NEXT: movq %rax, (%rsp) # 8-byte Spill
+; MEM-NEXT: # encoding: [0x48,0x89,0x04,0x24]
+; MEM-NEXT: shrq $32, %r13 # EVEX TO LEGACY Compression encoding: [0x49,0xc1,0xed,0x20]
+; MEM-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; MEM-NEXT: movq %rsi, %rdi # encoding: [0x48,0x89,0xf7]
+; MEM-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; MEM-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; MEM-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; MEM-NEXT: movl $1, %r12d # encoding: [0x41,0xbc,0x01,0x00,0x00,0x00]
+; MEM-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; MEM-NEXT: jne .LBB50_2 # encoding: [0x75,A]
+; MEM-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; MEM-NEXT: # %bb.1: # %bb2
+; MEM-NEXT: xorl %r12d, %r12d # encoding: [0x45,0x31,0xe4]
+; MEM-NEXT: .LBB50_2: # %bb1
+; MEM-NEXT: addl (%rsp), %r13d, %esi # 4-byte Folded Reload
+; MEM-NEXT: # encoding: [0x62,0x74,0x4c,0x18,0x03,0x2c,0x24]
+; MEM-NEXT: imull %ebx, %ebx, %r13d # encoding: [0x62,0xf4,0x14,0x18,0xaf,0xdb]
+; MEM-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; MEM-NEXT: jne .LBB50_4 # encoding: [0x75,A]
+; MEM-NEXT: # fixup A - offset: 1, value: .LBB50_4, kind: FK_PCRel_1
+; MEM-NEXT: # %bb.3: # %bb4
+; MEM-NEXT: xorl %ebp, %ebp # encoding: [0x31,0xed]
+; MEM-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; MEM-NEXT: movl %esi, %r14d # encoding: [0x41,0x89,0xf6]
+; MEM-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; MEM-NEXT: incl %r12d, %r15d # encoding: [0x62,0xd4,0x04,0x18,0xff,0xc4]
+; MEM-NEXT: xorl %edi, %edi # encoding: [0x31,0xff]
+; MEM-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; MEM-NEXT: movl %r14d, %esi # encoding: [0x44,0x89,0xf6]
+; MEM-NEXT: .LBB50_4: # %bb3
+; MEM-NEXT: orl %r13d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xee]
+; MEM-NEXT: orl %r15d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xfe]
+; MEM-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; MEM-NEXT: movl %ebx, %edi # encoding: [0x89,0xdf]
+; MEM-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; MEM-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; MEM-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; MEM-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; MEM-NEXT: addq $8, %rsp # encoding: [0x48,0x83,0xc4,0x08]
+; MEM-NEXT: popq %rbx # encoding: [0x5b]
+; MEM-NEXT: popq %r12 # encoding: [0x41,0x5c]
+; MEM-NEXT: popq %r13 # encoding: [0x41,0x5d]
+; MEM-NEXT: popq %r14 # encoding: [0x41,0x5e]
+; MEM-NEXT: popq %r15 # encoding: [0x41,0x5f]
+; MEM-NEXT: popq %rbp # encoding: [0x5d]
+; MEM-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: two_address_no_subreg:
+; NF: # %bb.0: # %entry
+; NF-NEXT: pushq %rbp # encoding: [0x55]
+; NF-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; NF-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; NF-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; NF-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; NF-NEXT: pushq %rbx # encoding: [0x53]
+; NF-NEXT: pushq %rax # encoding: [0x50]
+; NF-NEXT: movl %edx, %ebp # encoding: [0x89,0xd5]
+; NF-NEXT: movq %rsi, %r14 # encoding: [0x49,0x89,0xf6]
+; NF-NEXT: movl %edi, %ebx # encoding: [0x89,0xfb]
+; NF-NEXT: movslq %edi, %rax # encoding: [0x48,0x63,0xc7]
+; NF-NEXT: imulq $715827883, %rax, %r13 # encoding: [0x4c,0x69,0xe8,0xab,0xaa,0xaa,0x2a]
+; NF-NEXT: # imm = 0x2AAAAAAB
+; NF-NEXT: {nf} shrq $63, %r13, %rax # EVEX TO EVEX Compression encoding: [0x62,0xd4,0xfc,0x1c,0xc1,0xed,0x3f]
+; NF-NEXT: movq %rax, (%rsp) # 8-byte Spill
+; NF-NEXT: # encoding: [0x48,0x89,0x04,0x24]
+; NF-NEXT: shrq $32, %r13 # EVEX TO LEGACY Compression encoding: [0x49,0xc1,0xed,0x20]
+; NF-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; NF-NEXT: movq %rsi, %rdi # encoding: [0x48,0x89,0xf7]
+; NF-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; NF-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; NF-NEXT: callq *%r15 # encoding: [0x41,0xff,0xd7]
+; NF-NEXT: movl $1, %r12d # encoding: [0x41,0xbc,0x01,0x00,0x00,0x00]
+; NF-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; NF-NEXT: jne .LBB50_2 # encoding: [0x75,A]
+; NF-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; NF-NEXT: # %bb.1: # %bb2
+; NF-NEXT: xorl %r12d, %r12d # encoding: [0x45,0x31,0xe4]
+; NF-NEXT: .LBB50_2: # %bb1
+; NF-NEXT: movl %r13d, %esi # encoding: [0x44,0x89,0xee]
+; NF-NEXT: addl (%rsp), %esi # 4-byte Folded Reload
+; NF-NEXT: # encoding: [0x03,0x34,0x24]
+; NF-NEXT: {nf} imull %ebx, %ebx, %r13d # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x14,0x1c,0xaf,0xdb]
+; NF-NEXT: testb $1, %bpl # encoding: [0x40,0xf6,0xc5,0x01]
+; NF-NEXT: jne .LBB50_4 # encoding: [0x75,A]
+; NF-NEXT: # fixup A - offset: 1, value: .LBB50_4, kind: FK_PCRel_1
+; NF-NEXT: # %bb.3: # %bb4
+; NF-NEXT: xorl %ebp, %ebp # encoding: [0x31,0xed]
+; NF-NEXT: movq %r14, %rdi # encoding: [0x4c,0x89,0xf7]
+; NF-NEXT: movl %esi, %r14d # encoding: [0x41,0x89,0xf6]
+; NF-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; NF-NEXT: {nf} incl %r12d, %r15d # EVEX TO EVEX Compression encoding: [0x62,0xd4,0x04,0x1c,0xff,0xc4]
+; NF-NEXT: xorl %edi, %edi # encoding: [0x31,0xff]
+; NF-NEXT: callq *%rbp # encoding: [0xff,0xd5]
+; NF-NEXT: movl %r14d, %esi # encoding: [0x44,0x89,0xf6]
+; NF-NEXT: .LBB50_4: # %bb3
+; NF-NEXT: orl %r13d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xee]
+; NF-NEXT: orl %r15d, %esi # EVEX TO LEGACY Compression encoding: [0x44,0x09,0xfe]
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: movl %ebx, %edi # encoding: [0x89,0xdf]
+; NF-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; NF-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; NF-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: addq $8, %rsp # encoding: [0x48,0x83,0xc4,0x08]
+; NF-NEXT: popq %rbx # encoding: [0x5b]
+; NF-NEXT: popq %r12 # encoding: [0x41,0x5c]
+; NF-NEXT: popq %r13 # encoding: [0x41,0x5d]
+; NF-NEXT: popq %r14 # encoding: [0x41,0x5e]
+; NF-NEXT: popq %r15 # encoding: [0x41,0x5f]
+; NF-NEXT: popq %rbp # encoding: [0x5d]
+; NF-NEXT: retq # encoding: [0xc3]
+entry:
+ %v0 = sdiv i32 %arg0, 6
+ %v1 = tail call i32 null(ptr %arg1)
+ %v2 = tail call i32 null(ptr %arg1)
+ br i1 %arg2, label %bb1, label %bb2
+
+bb2: ; preds = %entry
+ br label %bb1
+
+bb1: ; preds = %bb2, %entry
+ %v3 = phi i32 [ 0, %bb2 ], [ 1, %entry ]
+ %v4 = mul i32 %arg0, %arg0
+ br i1 %arg2, label %bb3, label %bb4
+
+bb4: ; preds = %bb1
+ %v5 = tail call i32 null(ptr %arg1)
+ %v6 = add i32 %v3, 1
+ %v7 = tail call i32 null(ptr null)
+ br label %bb3
+
+bb3: ; preds = %bb4, %bb1
+ %v8 = phi i32 [ %v6, %bb4 ], [ 0, %bb1 ]
+ %v9 = or i32 %v0, %v4
+ %v10 = or i32 %v9, %v8
+ tail call void null(i32 %arg0, i32 %v10, i32 0, i32 0)
+ ret i32 0
+}
>From 886fa90c6f03a603c3f656245951a5bd380f66c4 Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang at intel.com>
Date: Mon, 13 Apr 2026 21:05:19 +0800
Subject: [PATCH 2/3] Check isVirtual before getPhys
---
llvm/lib/Target/X86/X86InstrInfo.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index e477c27e3848c..d5899f0a36304 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7558,8 +7558,9 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
// Bail out if dst has been assigned a physical register. Otherwise, we
// cannot update LiveRegMatrix properly.
- if (VRM && VRM->getPhys(MI.getOperand(0).getReg()) &&
- MI.getOperand(0).getReg() != MI.getOperand(1).getReg())
+ Register Dst = MI.getOperand(0).getReg();
+ if (VRM && Dst != MI.getOperand(1).getReg() &&
+ (!Dst.isVirtual() || VRM->getPhys(Dst)))
return nullptr;
}
>From b44fe2f572162e02702cc7edf47b1f920d21c025 Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang at intel.com>
Date: Tue, 14 Apr 2026 09:49:36 +0800
Subject: [PATCH 3/3] Fix crash for physical register
---
llvm/lib/CodeGen/InlineSpiller.cpp | 7 +-
llvm/lib/CodeGen/LiveRangeEdit.cpp | 7 +-
llvm/lib/Target/X86/X86InstrInfo.cpp | 8 +-
llvm/test/CodeGen/X86/apx/sub.ll | 219 +++++++++++++++++++++++++++
4 files changed, 234 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index 352e1961332ad..ea062282b97b2 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -1106,8 +1106,11 @@ foldMemoryOperand(ArrayRef<std::pair<MachineInstr *, unsigned>> Ops,
LIS.InsertMachineInstrInMaps(MI);
if (CopyMI) {
- LiveInterval &LI = LIS.getInterval(CopyMI->getOperand(1).getReg());
- LIS.shrinkToUses(&LI);
+ Register R = CopyMI->getOperand(1).getReg();
+ if (R.isVirtual()) {
+ LiveInterval &LI = LIS.getInterval(R);
+ LIS.shrinkToUses(&LI);
+ }
}
// TII.foldMemoryOperand may have left some implicit operands on the
diff --git a/llvm/lib/CodeGen/LiveRangeEdit.cpp b/llvm/lib/CodeGen/LiveRangeEdit.cpp
index 0141d940d498f..edff8c8600188 100644
--- a/llvm/lib/CodeGen/LiveRangeEdit.cpp
+++ b/llvm/lib/CodeGen/LiveRangeEdit.cpp
@@ -170,8 +170,11 @@ bool LiveRangeEdit::foldAsLoad(LiveInterval *LI,
LiveInterval &LI = LIS.getInterval(CopyMI->getOperand(0).getReg());
VNInfo *VNI = LI.getNextValue(CopyIdx, LIS.getVNInfoAllocator());
LI.addSegment(LiveRange::Segment(CopyIdx, FoldIdx.getRegSlot(), VNI));
- LiveInterval &SrcLI = LIS.getInterval(CopyMI->getOperand(1).getReg());
- LIS.shrinkToUses(&SrcLI);
+ Register R = CopyMI->getOperand(1).getReg();
+ if (R.isVirtual()) {
+ LiveInterval &SrcLI = LIS.getInterval(R);
+ LIS.shrinkToUses(&SrcLI);
+ }
}
return true;
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index d5899f0a36304..3656f9ba68c53 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7621,9 +7621,11 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
MI.getOperand(0).getReg() == SrcReg)
return NewMI;
- const TargetRegisterClass &RC = *MF.getRegInfo().getRegClass(SrcReg);
- Register NewSrc = MRI.isSSA() ? MRI.createVirtualRegister(&RC)
- : MI.getOperand(0).getReg();
+ Register NewSrc = MI.getOperand(0).getReg();
+ if (MRI.isSSA()) {
+ const TargetRegisterClass &RC = *MF.getRegInfo().getRegClass(SrcReg);
+ NewSrc = MRI.createVirtualRegister(&RC);
+ }
CopyMI = BuildMI(*NewMI->getParent(), *NewMI, MI.getDebugLoc(),
get(TargetOpcode::COPY))
diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll
index d7c19734eb308..7ae41c63ed9fe 100644
--- a/llvm/test/CodeGen/X86/apx/sub.ll
+++ b/llvm/test/CodeGen/X86/apx/sub.ll
@@ -1259,3 +1259,222 @@ entry:
store i64 %sub, ptr %a
ret void
}
+
+define fastcc void @fold_with_physical_reg(ptr %arg0, i64 %arg1, ptr %arg2, i1 %arg3) nounwind {
+; NDD-LABEL: fold_with_physical_reg:
+; NDD: # %bb.0: # %entry
+; NDD-NEXT: pushq %rbp # encoding: [0x55]
+; NDD-NEXT: movq %rsp, %rbp # encoding: [0x48,0x89,0xe5]
+; NDD-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; NDD-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; NDD-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; NDD-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; NDD-NEXT: pushq %rbx # encoding: [0x53]
+; NDD-NEXT: subq $24, %rsp # encoding: [0x48,0x83,0xec,0x18]
+; NDD-NEXT: movl %ecx, %r14d # encoding: [0x41,0x89,0xce]
+; NDD-NEXT: movq %rdx, %rbx # encoding: [0x48,0x89,0xd3]
+; NDD-NEXT: movq %rsi, %r12 # encoding: [0x49,0x89,0xf4]
+; NDD-NEXT: movq %rdi, %r13 # encoding: [0x49,0x89,0xfd]
+; NDD-NEXT: leaq 15(%rsi), %rax # encoding: [0x48,0x8d,0x46,0x0f]
+; NDD-NEXT: andq $-16, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xe0,0xf0]
+; NDD-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; NDD-NEXT: # encoding: [0x48,0x89,0x45,0xd0]
+; NDD-NEXT: .p2align 4
+; NDD-NEXT: .LBB50_1: # %bb1
+; NDD-NEXT: # =>This Loop Header: Depth=1
+; NDD-NEXT: # Child Loop BB50_2 Depth 2
+; NDD-NEXT: movq %rsp, %rax # encoding: [0x48,0x89,0xe0]
+; NDD-NEXT: subq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
+; NDD-NEXT: # encoding: [0x48,0x2b,0x45,0xd0]
+; NDD-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; NDD-NEXT: # encoding: [0x48,0x89,0x45,0xc8]
+; NDD-NEXT: movq %rax, %rsp # encoding: [0x48,0x89,0xc4]
+; NDD-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; NDD-NEXT: .p2align 4
+; NDD-NEXT: .LBB50_2: # %bb2
+; NDD-NEXT: # Parent Loop BB50_1 Depth=1
+; NDD-NEXT: # => This Inner Loop Header: Depth=2
+; NDD-NEXT: xorps %xmm0, %xmm0 # encoding: [0x0f,0x57,0xc0]
+; NDD-NEXT: movq %r13, %rdi # encoding: [0x4c,0x89,0xef]
+; NDD-NEXT: xorl %esi, %esi # encoding: [0x31,0xf6]
+; NDD-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; NDD-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; NDD-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
+; NDD-NEXT: # encoding: [0x48,0x8b,0x45,0xc8]
+; NDD-NEXT: movq $0, (%rax,%r15,8) # encoding: [0x4a,0xc7,0x04,0xf8,0x00,0x00,0x00,0x00]
+; NDD-NEXT: movq $0, (%rbx) # encoding: [0x48,0xc7,0x03,0x00,0x00,0x00,0x00]
+; NDD-NEXT: testb $1, %r14b # encoding: [0x41,0xf6,0xc6,0x01]
+; NDD-NEXT: movq %r12, %r15 # encoding: [0x4d,0x89,0xe7]
+; NDD-NEXT: je .LBB50_2 # encoding: [0x74,A]
+; NDD-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; NDD-NEXT: jmp .LBB50_1 # encoding: [0xeb,A]
+; NDD-NEXT: # fixup A - offset: 1, value: .LBB50_1, kind: FK_PCRel_1
+;
+; IMMONLY-LABEL: fold_with_physical_reg:
+; IMMONLY: # %bb.0: # %entry
+; IMMONLY-NEXT: pushq %rbp # encoding: [0x55]
+; IMMONLY-NEXT: movq %rsp, %rbp # encoding: [0x48,0x89,0xe5]
+; IMMONLY-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; IMMONLY-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; IMMONLY-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; IMMONLY-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; IMMONLY-NEXT: pushq %rbx # encoding: [0x53]
+; IMMONLY-NEXT: subq $24, %rsp # encoding: [0x48,0x83,0xec,0x18]
+; IMMONLY-NEXT: movl %ecx, %r14d # encoding: [0x41,0x89,0xce]
+; IMMONLY-NEXT: movq %rdx, %rbx # encoding: [0x48,0x89,0xd3]
+; IMMONLY-NEXT: movq %rsi, %r12 # encoding: [0x49,0x89,0xf4]
+; IMMONLY-NEXT: movq %rdi, %r13 # encoding: [0x49,0x89,0xfd]
+; IMMONLY-NEXT: leaq 15(%rsi), %rax # encoding: [0x48,0x8d,0x46,0x0f]
+; IMMONLY-NEXT: andq $-16, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xe0,0xf0]
+; IMMONLY-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; IMMONLY-NEXT: # encoding: [0x48,0x89,0x45,0xd0]
+; IMMONLY-NEXT: .p2align 4
+; IMMONLY-NEXT: .LBB50_1: # %bb1
+; IMMONLY-NEXT: # =>This Loop Header: Depth=1
+; IMMONLY-NEXT: # Child Loop BB50_2 Depth 2
+; IMMONLY-NEXT: movq %rsp, %rax # encoding: [0x48,0x89,0xe0]
+; IMMONLY-NEXT: subq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
+; IMMONLY-NEXT: # encoding: [0x48,0x2b,0x45,0xd0]
+; IMMONLY-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; IMMONLY-NEXT: # encoding: [0x48,0x89,0x45,0xc8]
+; IMMONLY-NEXT: movq %rax, %rsp # encoding: [0x48,0x89,0xc4]
+; IMMONLY-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; IMMONLY-NEXT: .p2align 4
+; IMMONLY-NEXT: .LBB50_2: # %bb2
+; IMMONLY-NEXT: # Parent Loop BB50_1 Depth=1
+; IMMONLY-NEXT: # => This Inner Loop Header: Depth=2
+; IMMONLY-NEXT: xorps %xmm0, %xmm0 # encoding: [0x0f,0x57,0xc0]
+; IMMONLY-NEXT: movq %r13, %rdi # encoding: [0x4c,0x89,0xef]
+; IMMONLY-NEXT: xorl %esi, %esi # encoding: [0x31,0xf6]
+; IMMONLY-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; IMMONLY-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; IMMONLY-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; IMMONLY-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; IMMONLY-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
+; IMMONLY-NEXT: # encoding: [0x48,0x8b,0x45,0xc8]
+; IMMONLY-NEXT: movq $0, (%rax,%r15,8) # encoding: [0x4a,0xc7,0x04,0xf8,0x00,0x00,0x00,0x00]
+; IMMONLY-NEXT: movq $0, (%rbx) # encoding: [0x48,0xc7,0x03,0x00,0x00,0x00,0x00]
+; IMMONLY-NEXT: testb $1, %r14b # encoding: [0x41,0xf6,0xc6,0x01]
+; IMMONLY-NEXT: movq %r12, %r15 # encoding: [0x4d,0x89,0xe7]
+; IMMONLY-NEXT: je .LBB50_2 # encoding: [0x74,A]
+; IMMONLY-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; IMMONLY-NEXT: jmp .LBB50_1 # encoding: [0xeb,A]
+; IMMONLY-NEXT: # fixup A - offset: 1, value: .LBB50_1, kind: FK_PCRel_1
+;
+; MEM-LABEL: fold_with_physical_reg:
+; MEM: # %bb.0: # %entry
+; MEM-NEXT: pushq %rbp # encoding: [0x55]
+; MEM-NEXT: movq %rsp, %rbp # encoding: [0x48,0x89,0xe5]
+; MEM-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; MEM-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; MEM-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; MEM-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; MEM-NEXT: pushq %rbx # encoding: [0x53]
+; MEM-NEXT: subq $24, %rsp # encoding: [0x48,0x83,0xec,0x18]
+; MEM-NEXT: movl %ecx, %r14d # encoding: [0x41,0x89,0xce]
+; MEM-NEXT: movq %rdx, %rbx # encoding: [0x48,0x89,0xd3]
+; MEM-NEXT: movq %rsi, %r12 # encoding: [0x49,0x89,0xf4]
+; MEM-NEXT: movq %rdi, %r13 # encoding: [0x49,0x89,0xfd]
+; MEM-NEXT: leaq 15(%rsi), %rax # encoding: [0x48,0x8d,0x46,0x0f]
+; MEM-NEXT: andq $-16, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xe0,0xf0]
+; MEM-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; MEM-NEXT: # encoding: [0x48,0x89,0x45,0xd0]
+; MEM-NEXT: .p2align 4
+; MEM-NEXT: .LBB50_1: # %bb1
+; MEM-NEXT: # =>This Loop Header: Depth=1
+; MEM-NEXT: # Child Loop BB50_2 Depth 2
+; MEM-NEXT: subq {{[-0-9]+}}(%r{{[sb]}}p), %rsp, %rax # 8-byte Folded Reload
+; MEM-NEXT: # encoding: [0x62,0xf4,0xfc,0x18,0x2b,0x65,0xd0]
+; MEM-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; MEM-NEXT: # encoding: [0x48,0x89,0x45,0xc8]
+; MEM-NEXT: movq %rax, %rsp # encoding: [0x48,0x89,0xc4]
+; MEM-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; MEM-NEXT: .p2align 4
+; MEM-NEXT: .LBB50_2: # %bb2
+; MEM-NEXT: # Parent Loop BB50_1 Depth=1
+; MEM-NEXT: # => This Inner Loop Header: Depth=2
+; MEM-NEXT: xorps %xmm0, %xmm0 # encoding: [0x0f,0x57,0xc0]
+; MEM-NEXT: movq %r13, %rdi # encoding: [0x4c,0x89,0xef]
+; MEM-NEXT: xorl %esi, %esi # encoding: [0x31,0xf6]
+; MEM-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; MEM-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; MEM-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; MEM-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; MEM-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
+; MEM-NEXT: # encoding: [0x48,0x8b,0x45,0xc8]
+; MEM-NEXT: movq $0, (%rax,%r15,8) # encoding: [0x4a,0xc7,0x04,0xf8,0x00,0x00,0x00,0x00]
+; MEM-NEXT: movq $0, (%rbx) # encoding: [0x48,0xc7,0x03,0x00,0x00,0x00,0x00]
+; MEM-NEXT: testb $1, %r14b # encoding: [0x41,0xf6,0xc6,0x01]
+; MEM-NEXT: movq %r12, %r15 # encoding: [0x4d,0x89,0xe7]
+; MEM-NEXT: je .LBB50_2 # encoding: [0x74,A]
+; MEM-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; MEM-NEXT: jmp .LBB50_1 # encoding: [0xeb,A]
+; MEM-NEXT: # fixup A - offset: 1, value: .LBB50_1, kind: FK_PCRel_1
+;
+; NF-LABEL: fold_with_physical_reg:
+; NF: # %bb.0: # %entry
+; NF-NEXT: pushq %rbp # encoding: [0x55]
+; NF-NEXT: movq %rsp, %rbp # encoding: [0x48,0x89,0xe5]
+; NF-NEXT: pushq %r15 # encoding: [0x41,0x57]
+; NF-NEXT: pushq %r14 # encoding: [0x41,0x56]
+; NF-NEXT: pushq %r13 # encoding: [0x41,0x55]
+; NF-NEXT: pushq %r12 # encoding: [0x41,0x54]
+; NF-NEXT: pushq %rbx # encoding: [0x53]
+; NF-NEXT: subq $24, %rsp # encoding: [0x48,0x83,0xec,0x18]
+; NF-NEXT: movl %ecx, %r14d # encoding: [0x41,0x89,0xce]
+; NF-NEXT: movq %rdx, %rbx # encoding: [0x48,0x89,0xd3]
+; NF-NEXT: movq %rsi, %r12 # encoding: [0x49,0x89,0xf4]
+; NF-NEXT: movq %rdi, %r13 # encoding: [0x49,0x89,0xfd]
+; NF-NEXT: leaq 15(%rsi), %rax # encoding: [0x48,0x8d,0x46,0x0f]
+; NF-NEXT: andq $-16, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xe0,0xf0]
+; NF-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; NF-NEXT: # encoding: [0x48,0x89,0x45,0xd0]
+; NF-NEXT: .p2align 4
+; NF-NEXT: .LBB50_1: # %bb1
+; NF-NEXT: # =>This Loop Header: Depth=1
+; NF-NEXT: # Child Loop BB50_2 Depth 2
+; NF-NEXT: movq %rsp, %rax # encoding: [0x48,0x89,0xe0]
+; NF-NEXT: subq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
+; NF-NEXT: # encoding: [0x48,0x2b,0x45,0xd0]
+; NF-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; NF-NEXT: # encoding: [0x48,0x89,0x45,0xc8]
+; NF-NEXT: movq %rax, %rsp # encoding: [0x48,0x89,0xc4]
+; NF-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
+; NF-NEXT: .p2align 4
+; NF-NEXT: .LBB50_2: # %bb2
+; NF-NEXT: # Parent Loop BB50_1 Depth=1
+; NF-NEXT: # => This Inner Loop Header: Depth=2
+; NF-NEXT: xorps %xmm0, %xmm0 # encoding: [0x0f,0x57,0xc0]
+; NF-NEXT: movq %r13, %rdi # encoding: [0x4c,0x89,0xef]
+; NF-NEXT: xorl %esi, %esi # encoding: [0x31,0xf6]
+; NF-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
+; NF-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: callq *%rax # encoding: [0xff,0xd0]
+; NF-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
+; NF-NEXT: # encoding: [0x48,0x8b,0x45,0xc8]
+; NF-NEXT: movq $0, (%rax,%r15,8) # encoding: [0x4a,0xc7,0x04,0xf8,0x00,0x00,0x00,0x00]
+; NF-NEXT: movq $0, (%rbx) # encoding: [0x48,0xc7,0x03,0x00,0x00,0x00,0x00]
+; NF-NEXT: testb $1, %r14b # encoding: [0x41,0xf6,0xc6,0x01]
+; NF-NEXT: movq %r12, %r15 # encoding: [0x4d,0x89,0xe7]
+; NF-NEXT: je .LBB50_2 # encoding: [0x74,A]
+; NF-NEXT: # fixup A - offset: 1, value: .LBB50_2, kind: FK_PCRel_1
+; NF-NEXT: jmp .LBB50_1 # encoding: [0xeb,A]
+; NF-NEXT: # fixup A - offset: 1, value: .LBB50_1, kind: FK_PCRel_1
+entry:
+ br label %bb1
+
+bb1: ; preds = %bb2, %entry
+ %alloc = alloca i8, i64 %arg1, align 16
+ br label %bb2
+
+bb2: ; preds = %bb2, %bb1
+ %phi = phi i64 [ 0, %bb1 ], [ %arg1, %bb2 ]
+ %call = call fastcc ptr null(ptr %arg0, ptr null, ptr null, ptr null, float 0.000000e+00)
+ %gep = getelementptr ptr, ptr %alloc, i64 %phi
+ store ptr null, ptr %gep, align 8
+ store ptr null, ptr %arg2, align 8
+ br i1 %arg3, label %bb1, label %bb2
+}
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