[llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)
Frederick Vu via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 13 13:54:09 PDT 2026
https://github.com/FrederickVu updated https://github.com/llvm/llvm-project/pull/181412
>From 1bb9769d34dd5474848305a1b2d03ff793a14688 Mon Sep 17 00:00:00 2001
From: Frederick Vu <100011202+FrederickVu at users.noreply.github.com>
Date: Wed, 25 Feb 2026 23:14:02 +0000
Subject: [PATCH 1/3] Fold srl of build_vector(.., x) to zext
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 26 +
.../CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll | 9057 ++++++++---------
.../CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll | 532 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll | 1610 ++-
.../CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll | 3519 ++++---
.../CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll | 157 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll | 315 +-
.../AMDGPU/buffer-fat-pointers-memcpy.ll | 208 +-
.../CodeGen/AMDGPU/extract_vector_dynelt.ll | 15 +-
llvm/test/CodeGen/AMDGPU/load-constant-i16.ll | 498 +-
llvm/test/CodeGen/AMDGPU/load-constant-i8.ll | 626 +-
llvm/test/CodeGen/AMDGPU/load-global-i8.ll | 846 +-
...er-buffer-fat-pointers-lastuse-metadata.ll | 108 +-
...uffer-fat-pointers-nontemporal-metadata.ll | 684 +-
.../CodeGen/AMDGPU/move-to-valu-lshl_add.ll | 54 +-
llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll | 71 +
.../test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 34 +-
llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 6 -
.../test/CodeGen/NVPTX/f32x2-convert-i32x2.ll | 21 +-
llvm/test/CodeGen/NVPTX/i32x2-instructions.ll | 5 +-
llvm/test/CodeGen/NVPTX/srl-bitcast-bv.ll | 44 +
21 files changed, 9019 insertions(+), 9417 deletions(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
create mode 100644 llvm/test/CodeGen/NVPTX/srl-bitcast-bv.ll
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 32da9c91476ea..a98bfd62688ca 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11565,6 +11565,32 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
DAG.getNode(ISD::SRL, SDLoc(N0), VT, X, N1), ZExtY);
}
+ // fold (srl (bitcast (build_vector e0, ..., eN)), (N-1) * eltsize)
+ // -> (zext eN)
+ if (N1C && VT.isScalarInteger()) {
+ SDValue BV = peekThroughBitcasts(N0);
+ if (BV.getOpcode() == ISD::BUILD_VECTOR) {
+ EVT BVVT = BV.getValueType();
+ unsigned EltSizeInBits = BVVT.getScalarSizeInBits();
+ unsigned NumElts = BVVT.getVectorNumElements();
+ if (N1C->getZExtValue() == (NumElts - 1) * EltSizeInBits) {
+ SDValue LastElt = BV.getOperand(NumElts - 1);
+ if (!LastElt.isUndef()) {
+ EVT IntEltVT = EVT::getIntegerVT(*DAG.getContext(), EltSizeInBits);
+ EVT LastEltVT = LastElt.getValueType();
+ if (LastEltVT.isFloatingPoint())
+ LastElt = DAG.getBitcast(LastEltVT.changeTypeToInteger(), LastElt);
+ // BUILD_VECTOR integer operands may be implicitly promoted wider
+ // than the declared element type (e.g. i16 operands in a v4i8
+ // BUILD_VECTOR on targets that promote i8). Truncate to the
+ // element size, then zero-extend to the result type.
+ return DAG.getZExtOrTrunc(DAG.getZExtOrTrunc(LastElt, DL, IntEltVT),
+ DL, VT);
+ }
+ }
+ }
+ }
+
// fold operands of srl based on knowledge that the low bits are not
// demanded.
if (SimplifyDemandedBits(SDValue(N, 0)))
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index 1b1f7fcadc540..16dfd6d37c3cb 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -147321,418 +147321,411 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32
-; GFX9-NEXT: v_mov_b32_e32 v54, v0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: v_mov_b32_e32 v45, v0
; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: v_mov_b32_e32 v56, v15
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: v_mov_b32_e32 v57, v16
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr16
+; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; kill: killed $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr50
-; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; kill: killed $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(33)
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(29)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[56:57]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[11:12]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[9:10]
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX9-NEXT: s_waitcnt vmcnt(45)
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[60:61]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v56
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v19
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v14
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v61
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v59, v36
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v61
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v61
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v13
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v60
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v60
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v12
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v10
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v9
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v8
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v6
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v2
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v58
-; GFX9-NEXT: s_waitcnt vmcnt(62)
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[57:58]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v30
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v29
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v28
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v26
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v23
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v24
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v6
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v20
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v17
+; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB90_2: ; %Flow
-; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; GFX9-NEXT: v_mov_b32_e32 v34, v52
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
+; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v18
@@ -147745,75 +147738,83 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v34, v32, v33, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v32, v33, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v17
; GFX9-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v48, v31, v32, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v49, v31, v32, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v15, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v31, vcc
-; GFX9-NEXT: v_perm_b32 v32, v17, v49, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v20
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_perm_b32 v33, v48, v34, s7
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v20
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v33, v18, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v62, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v19
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v38, v18, v20, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v19
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v37, v18, v20, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v31, v17, v37, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v22
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v62, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v22
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v59, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v43, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v0, v15, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -147821,23 +147822,27 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v60, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v44, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v60, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v24
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v43, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v24
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v0, v59, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v0, v44, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -147855,34 +147860,35 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v23
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v20, v15, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v19, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v26
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_mov_b32_e32 v36, v20
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_mov_b32_e32 v35, v19
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v26
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v25
+; GFX9-NEXT: v_mov_b32_e32 v51, v16
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v50, v15
; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -147890,217 +147896,205 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v25
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v26, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v27
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v28, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v27
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v25, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v25, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v27, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v42, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v54, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v24, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v39, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_perm_b32 v16, v28, v26, s7
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v24, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v58
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v61
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: v_cndmask_b32_e32 v55, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v58
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v61
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_waitcnt vmcnt(48)
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v57
+; GFX9-NEXT: s_waitcnt vmcnt(57)
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v60
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v58, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v53, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v57
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v60
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v23, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_perm_b32 v16, v30, v27, s7
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v23, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v2
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v52, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v57, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v21, v17, v18, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v27, v17, v18, vcc
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v22, v17, v18, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v28, v17, v18, vcc
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_perm_b32 v16, v58, v29, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v17, vcc
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v61, v1, v22, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: v_cndmask_b32_e32 v26, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v17, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v25, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v23, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v24, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_perm_b32 v39, v1, v19, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v22, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v5
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_perm_b32 v41, v1, v4, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
@@ -148114,55 +148108,50 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v7, vcc
-; GFX9-NEXT: v_perm_b32 v43, v1, v3, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v10
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v2, v7, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v9
-; GFX9-NEXT: v_perm_b32 v32, v38, v33, s7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_mov_b32_e32 v51, v32
-; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v10, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_mov_b32_e32 v50, v31
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v31, vcc
-; GFX9-NEXT: v_add3_u32 v9, v9, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v9, v31, vcc
-; GFX9-NEXT: v_perm_b32 v45, v1, v2, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v12
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v9, v9, v1, s6
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v2, v9, vcc
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v12
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_bfe_u32 v12, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v9, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v31, vcc
; GFX9-NEXT: v_add3_u32 v12, v12, v1, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
@@ -148175,649 +148164,708 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v31, v32, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v11, 16, 1
; GFX9-NEXT: v_add3_u32 v31, v31, v11, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc
-; GFX9-NEXT: v_perm_b32 v55, v11, v1, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v14
-; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX9-NEXT: v_bfe_u32 v31, v11, 16, 1
+; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v14
+; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX9-NEXT: v_add3_u32 v31, v31, v11, s6
-; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
+; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc
+; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
+; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v31
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v14, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v48, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v14, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v14
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
; GFX9-NEXT: v_cndmask_b32_e32 v14, v31, v32, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v13
+; GFX9-NEXT: v_mov_b32_e32 v34, v16
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX9-NEXT: v_bfe_u32 v52, v31, 16, 1
+; GFX9-NEXT: v_mov_b32_e32 v33, v15
+; GFX9-NEXT: v_perm_b32 v16, v54, v42, s7
+; GFX9-NEXT: v_perm_b32 v15, v55, v39, s7
+; GFX9-NEXT: v_bfe_u32 v48, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: v_add3_u32 v52, v52, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v53, 0x400000, v31
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add3_u32 v48, v48, v31, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v52, v53, vcc
+; GFX9-NEXT: v_perm_b32 v16, v53, v0, s7
+; GFX9-NEXT: v_mov_b32_e32 v61, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v48, v49, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v52, 0x400000, v13
+; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v13
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v31, v52, vcc
+; GFX9-NEXT: v_perm_b32 v32, v14, v1, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v31, v48, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; GFX9-NEXT: v_perm_b32 v31, v13, v0, s7
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v16
-; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: v_bfe_u32 v52, v13, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX9-NEXT: v_add3_u32 v52, v52, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v53, 0x400000, v13
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v52, v53, vcc
-; GFX9-NEXT: v_bfe_u32 v52, v16, 16, 1
-; GFX9-NEXT: v_add3_u32 v52, v52, v16, s6
-; GFX9-NEXT: v_or_b32_e32 v53, 0x400000, v16
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v16, v52, v53, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; GFX9-NEXT: v_add_f32_e32 v52, 0x40c00000, v52
-; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX9-NEXT: v_bfe_u32 v47, v52, 16, 1
-; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX9-NEXT: v_add3_u32 v47, v47, v52, s6
-; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v52
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v52, v52
-; GFX9-NEXT: v_bfe_u32 v52, v15, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v47, v47, v63, vcc
-; GFX9-NEXT: v_add3_u32 v52, v52, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v15
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v52, v63, vcc
-; GFX9-NEXT: v_perm_b32 v53, v16, v13, s7
-; GFX9-NEXT: v_perm_b32 v52, v15, v47, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v19
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v22
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v25
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v47
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v23
-; GFX9-NEXT: v_perm_b32 v62, v21, v57, s7
-; GFX9-NEXT: v_perm_b32 v56, v12, v9, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v57
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v40, v18, v20, s7
-; GFX9-NEXT: v_perm_b32 v42, v6, v17, s7
-; GFX9-NEXT: v_perm_b32 v46, v10, v7, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
-; GFX9-NEXT: v_perm_b32 v44, v8, v5, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v32, v14, v11, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v60
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[52:53]
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(11)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v52, v30, s7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[55:56]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[45:46]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v26, v28, s7
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v28
+; GFX9-NEXT: v_perm_b32 v16, v27, v29, s7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[43:44]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v23, v25, s7
+; GFX9-NEXT: v_perm_b32 v15, v22, v24, s7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[41:42]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[57:58]
-; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, v56
+; GFX9-NEXT: v_mov_b32_e32 v16, v57
+; GFX9-NEXT: v_perm_b32 v56, v9, v4, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v25
+; GFX9-NEXT: v_perm_b32 v59, v12, v3, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v24
+; GFX9-NEXT: v_perm_b32 v38, v19, v21, s7
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v16
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v16, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v63, v49, v63, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v16, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v16
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
+; GFX9-NEXT: v_cndmask_b32_e32 v16, v48, v49, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v15
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_bfe_u32 v47, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_add3_u32 v47, v47, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v60, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v15, 16, 1
+; GFX9-NEXT: v_perm_b32 v36, v8, v17, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v46, v47, v60, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v15, s6
+; GFX9-NEXT: v_or_b32_e32 v47, 0x400000, v15
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
+; GFX9-NEXT: v_perm_b32 v37, v18, v20, s7
+; GFX9-NEXT: v_perm_b32 v35, v7, v6, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v48, v47, vcc
+; GFX9-NEXT: v_mov_b32_e32 v49, v36
+; GFX9-NEXT: v_mov_b32_e32 v48, v35
+; GFX9-NEXT: v_mov_b32_e32 v35, v37
+; GFX9-NEXT: v_mov_b32_e32 v36, v38
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v41, v16, v63, s7
+; GFX9-NEXT: v_perm_b32 v40, v15, v46, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v46
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[40:41]
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v42
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v43
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v63
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32]
+; GFX9-NEXT: v_perm_b32 v58, v11, v2, s7
+; GFX9-NEXT: v_perm_b32 v57, v10, v5, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v29
+; GFX9-NEXT: s_waitcnt vmcnt(23)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v62
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v61
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v38
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v38
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v37
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[37:38]
+; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[58:59]
; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[39:40]
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34]
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[61:62]
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34]
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[50:51]
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[37:38]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[33:34]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[62:63]
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v62
; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[47:48]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[35:36]
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[56:57]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v52
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[54:55]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[42:43]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[50:51]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v55
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v40
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v56
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v55
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v45
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v44
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v44
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v42
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v40
-; GFX9-NEXT: v_mov_b32_e32 v45, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v49
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v49
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v62
-; GFX9-NEXT: v_mov_b32_e32 v46, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v45
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v61
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v61
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v34
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v34
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v47
-; GFX9-NEXT: v_mov_b32_e32 v34, v48
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(39)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[35:36]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[50:51]
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v62
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v34
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v39
-; GFX9-NEXT: v_mov_b32_e32 v58, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX9-NEXT: v_mov_b32_e32 v57, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35
+; GFX9-NEXT: v_mov_b32_e32 v35, v52
+; GFX9-NEXT: v_mov_b32_e32 v36, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v35
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v49
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[49:50]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v35
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[52:53]
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v56
+; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v53, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v63
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v42
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v36
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v62
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v62
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v61
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v61
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v50
-; GFX9-NEXT: v_mov_b32_e32 v50, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v49
-; GFX9-NEXT: v_mov_b32_e32 v49, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v39
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v35, v50
+; GFX9-NEXT: v_mov_b32_e32 v36, v51
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v63
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v35
+; GFX9-NEXT: v_mov_b32_e32 v36, v16
+; GFX9-NEXT: v_mov_b32_e32 v35, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34
+; GFX9-NEXT: v_mov_b32_e32 v16, v46
+; GFX9-NEXT: v_mov_b32_e32 v46, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v35
; GFX9-NEXT: .LBB90_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v7, v7, v31, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v3, v3, v41, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v40, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v32, s4
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v2, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v1, v44, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v43, s4
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v17, v17, v39, s4
-; GFX9-NEXT: v_perm_b32 v0, v18, v0, s4
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v9, v9, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v1, v1, v55, s4
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v3, v54, s4
+; GFX9-NEXT: v_perm_b32 v0, v5, v0, s4
+; GFX9-NEXT: v_perm_b32 v5, v6, v49, s4
; GFX9-NEXT: v_perm_b32 v8, v8, v31, s4
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v32, v32, v40, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v51, v53, v51, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v42, v42, v61, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v42, 16, v1
+; GFX9-NEXT: v_perm_b32 v10, v10, v47, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v32, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v16, s4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v40, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4
+; GFX9-NEXT: v_perm_b32 v17, v17, v42, s4
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v10, v10, v33, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v31, v31, v40, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v53, v56, v52, s4
+; GFX9-NEXT: v_perm_b32 v55, v55, v35, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v54, v54, v35, s4
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshl_or_b32 v0, v54, 16, v0
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v49, v49, v15, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v52, v33, v40, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v11, v11, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v13, v13, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v14, v35, s4
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v40, v33, v40, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v47, v47, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v56, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v43, v43, v50, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v43, 16, v1
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v16, v57, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v41, v33, v43, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v15, v15, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v43, v63, v43, s4
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v16, v16, v33, s4
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v18, v45, v62, s4
+; GFX9-NEXT: v_perm_b32 v56, v35, v50, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v3
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:8
+; GFX9-NEXT: v_perm_b32 v37, v35, v36, s4
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v5
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v32, 16, v7
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:12
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:16
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v31, 16, v9
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v5
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_lshl_or_b32 v0, v6, 16, v7
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:24
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v11
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v8
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_lshl_or_b32 v0, v31, 16, v9
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:32
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v0, v59, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v10
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:36
+; GFX9-NEXT: v_lshl_or_b32 v0, v32, 16, v11
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v40, 16, v13
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v12
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:44
+; GFX9-NEXT: v_lshl_or_b32 v0, v49, 16, v13
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v15
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v14
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_lshl_or_b32 v0, v47, 16, v15
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:56
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v43, 16, v17
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:60
+; GFX9-NEXT: v_lshl_or_b32 v0, v56, 16, v17
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:64
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v0, v19, v46, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v18, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v20, v37, s4
+; GFX9-NEXT: v_perm_b32 v0, v0, v48, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v18
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:68
+; GFX9-NEXT: v_perm_b32 v0, v19, v38, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v37, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:72
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v20, v63, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v36, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v41, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v21, v59, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v21, v62, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v38, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v22, v60, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:80
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v22, v44, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v48, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v39, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v23, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:84
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v23, v52, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v24, v50, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:88
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v0, v24, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v49, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v25, v34, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v55, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v25, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v26, v47, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:96
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v26, v34, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:100
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v27, v46, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:104
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v28, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:112
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v30, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v57, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v60, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:120
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v0, v58, v0, s4
+; GFX9-NEXT: v_perm_b32 v0, v61, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:124
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -148842,8 +148890,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v81, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v80, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v71, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v70, off, s32
; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:232
@@ -148926,9 +148974,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr109_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr95_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr94_hi16
@@ -149002,7 +149050,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_hi16
@@ -149055,11 +149103,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v141, 8, v1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v81
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v71
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v80
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v29
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v28
@@ -149083,7 +149131,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[80:81]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[70:71]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[19:20]
@@ -149101,9 +149149,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v6.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v62.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v45.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.h, v8.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v7.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v44.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v8.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v94.h, v9.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v9.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v63.h, v10.l
@@ -149148,10 +149196,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v29.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v165.h, v30.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v30.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v80.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v81.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v70.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v71.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
@@ -149167,7 +149215,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71
; GFX11-TRUE16-NEXT: .LBB90_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_4
@@ -149385,14 +149433,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v81
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v71
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v51
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v51
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v165, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v81
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v71
; GFX11-TRUE16-NEXT: v_dual_add_f32 v22, 0x40c00000, v22 :: v_dual_cndmask_b32 v53, v17, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
@@ -149401,14 +149449,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v80
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v70
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v160.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v165.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v166, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v80
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v70
; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_cndmask_b32 v52, v19, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -149417,9 +149465,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v160.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v53
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v37
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
@@ -149434,9 +149482,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v167.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v37
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v176, v17, v22, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
@@ -149549,13 +149596,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v10
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v68.l, v182.h
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_cndmask_b32 v45, v3, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v44, v3, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v71, v1, v8
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v81, v1, v8
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -149565,8 +149612,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v166.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.l, v45.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v70, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v44.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v80, v1, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
@@ -149579,7 +149626,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.l, v62.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v62.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v63, v1, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
@@ -149597,13 +149644,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v63.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.l, v176.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[52:53]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[68:69]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v84, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[52:53]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[48:49]
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v94, v2, v3, vcc_lo
@@ -149628,7 +149675,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v105.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[70:71]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[80:81]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v114, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
@@ -149638,7 +149685,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[33:34]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v178.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v127, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
@@ -149668,7 +149715,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v66.l, v180.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v178.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v127.h
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v142, v4, v6, vcc_lo
@@ -149685,23 +149732,23 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v127.h
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[99:100], 24, v[128:129]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[50:51]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v152, v7, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[50:51]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[133:134], 24, v[66:67]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[101:102], 24, v[37:38]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[114:115]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v145, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v143.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[68:69]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[114:115]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[35:36]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v144, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v152.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[35:36]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[33:34]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[131:132], 24, v[31:32]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v145
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v145
@@ -149716,9 +149763,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 24, v85
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v85
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v84
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v71
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v71
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v80
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v69
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 8, v68
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v136, 8, v66
@@ -149751,15 +149798,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v122, 0xc0c0004
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v181.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v69.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v71.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v81.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v4, 16, v3
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v6, 16, v5
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v8, 16, v7
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v9, v111, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v10, v109, 0xc0c0004
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v62.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v70.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v45.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v44.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v84.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v7, 16, v6
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v8, v104, 0xc0c0004
@@ -149880,7 +149927,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v57, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v45, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v43, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004
@@ -149990,98 +150037,98 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:20
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:16
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:12
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr102
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr112
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr99
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr100
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
@@ -150099,98 +150146,98 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 24, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 8, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 24, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v32
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v30
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v29
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v25
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v23
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v21
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[19:20]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
; GFX11-FAKE16-NEXT: .LBB90_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB90_4
@@ -150209,638 +150256,639 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v35, 16, 1
; GFX11-FAKE16-NEXT: v_add3_u32 v17, v17, v33, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v34
; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v34, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v17, v17, v36 :: v_dual_add_f32 v18, 0x40c00000, v18
; GFX11-FAKE16-NEXT: v_add3_u32 v36, v48, v35, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v18, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v18
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v18, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v34
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v58, v37, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v37, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v68, v58, v17, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v67, v18, v17, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 24, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v68
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v36, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v72, v36, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v20
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
-; GFX11-FAKE16-NEXT: v_perm_b32 v67, v34, v33, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v36
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v19
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v37
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v34, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v34
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v67
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v36, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v67
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v18, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v35, v37, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v38, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v22
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v36 :: v_dual_add_f32 v39, 0x40c00000, v19
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v34, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v33, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v67
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v36, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v39, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v35, v38, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v66
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v49, v36, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v38, v34, v39, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v39
; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v20
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_add3_u32 v34, v34, v20, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v39, v36, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v34, v19, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v36
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v20, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v37, v48, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-FAKE16-NEXT: v_perm_b32 v70, v19, v18, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v19
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v20, v34, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v37
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v35, v39, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v37, 0x40c00000, v37
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v36, v20, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v69, v35, v34, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v37, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v22, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v36, v38, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add3_u32 v22, v48, v37, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v39, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v39
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v35, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v37
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v36, v39, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v70
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v35, v22, v35 :: v_dual_add_f32 v22, 0x40c00000, v38
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v71, v20, v19, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v35, v37, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v23
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v81, v21, v20, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v36, v48, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v36, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v71
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v38, v49, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v21
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
+; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v36, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v38, 0x40c00000, v38 :: v_dual_add_f32 v49, 0x40c00000, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v35
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v37, v48 :: v_dual_add_f32 v22, 0x40c00000, v22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v38, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v49, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v71
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v22
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v22, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v69
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v69
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v37, v39, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v48, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v39, 16, v26
-; GFX11-FAKE16-NEXT: v_perm_b32 v80, v36, v35, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v38, 16, 1
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
-; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v48, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v37, v51, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v48, v36, v49, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v22, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v49
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v39, v50, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[69:70]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v81
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v80
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
+; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v37, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
+; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v38, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v38
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v48, v51, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v23
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v24, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v48, 0x40c00000, v48 :: v_dual_add_f32 v51, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v39, v50, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v36, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v24, v49, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v48, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v51, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v49, v52, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v26
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v53, v48, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v48
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v36, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, 0x400000, v38
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v23
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v24, v36, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v39
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v39, 16, v25
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v52
+; GFX11-FAKE16-NEXT: v_add3_u32 v50, v38, v51, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v51
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v39, v49, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v48
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v26
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v50, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v25
; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; GFX11-FAKE16-NEXT: v_perm_b32 v83, v23, v22, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v37, v49, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v39
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v82, v37, v36, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v26, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v25
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v39, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v38, v48, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v26, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v48, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v26, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v50, 0x40c00000, v50 :: v_dual_add_f32 v53, 0x40c00000, v25
+; GFX11-FAKE16-NEXT: v_perm_b32 v80, v37, v36, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v49, v52, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v26, v50, v39, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v28
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v49
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v37, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v39
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
-; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v49, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v50, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v53, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v51, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v28
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v50, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v50
; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v83
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v37, v26, v37 :: v_dual_add_f32 v26, 0x40c00000, v48
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v54
+; GFX11-FAKE16-NEXT: v_add3_u32 v52, v48, v53, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v53
; GFX11-FAKE16-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v27
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v49, v51, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v50, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v50
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v28, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v28
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v52, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v26, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v38, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v26
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v26, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v84, v38, v37, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v28, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v48, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v39, v49, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v28, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v50, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v28, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v52, 0x40c00000, v52 :: v_dual_add_f32 v55, 0x40c00000, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v83, v24, v23, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v51, v54, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v50, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v28, v51, v48, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v49, 16, v30
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v50
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v38, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v48
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v50, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v55, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v53, v64, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v30
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v65, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v36
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v27
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v28, v38, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v28, 0x40c00000, v49
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v30, 0x40c00000, v30 :: v_dual_lshlrev_b32 v49, 16, v29
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v54, v50, v55, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v55
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v51, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v54, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v28, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v39, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v28, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v86, v39, v38, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v30, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v48, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v30, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v54, 0x40c00000, v54 :: v_dual_add_f32 v65, 0x40c00000, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v85, v26, v25, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v53, v64, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v51, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v52, v49, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v54, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v65, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v55, v68, vcc_lo
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v32
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v51
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v39, v29, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v49
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
-; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v51, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v32
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v69, v54, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v54
; GFX11-FAKE16-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
-; GFX11-FAKE16-NEXT: v_perm_b32 v85, v25, v24, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v37
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v39, v30, v39 :: v_dual_add_f32 v30, 0x40c00000, v50
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v68
+; GFX11-FAKE16-NEXT: v_add3_u32 v64, v52, v65, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v65
; GFX11-FAKE16-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v53, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v54, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v54
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v32, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, 0x400000, v32
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v31
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v53, v64, v69 :: v_dual_lshlrev_b32 v64, 16, v31
; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v30, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v48, v52, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v30, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v96, v48, v39, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v32, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v31
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v32
-; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v50, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v49, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v32, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v54, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v32, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v64, 0x40c00000, v64 :: v_dual_add_f32 v69, 0x40c00000, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v82, v39, v38, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v55, v68, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v32, v53, v50, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v51, 16, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v48, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v50
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v99, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v69, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v53
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v65, v98, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v98, 16, v2
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v99, v64, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v64
; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v87, v27, v26, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v31
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v32, v48, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v32, 0x40c00000, v51
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v51, 16, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v64, 0x40c00000, v98
+; GFX11-FAKE16-NEXT: v_add3_u32 v68, v54, v69, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, 0x400000, v69
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v54, v55, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, 0x400000, v64
+; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v102, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v55, v68, v99 :: v_dual_lshlrev_b32 v68, 16, v1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v32, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v49, v53, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v32
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v51
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v50, v32, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v98, v49, v48, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v2, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v53, 0x40c00000, v1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v2
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v51, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v50, v52, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v2, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v64, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v2, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v68, 0x40c00000, v68 :: v_dual_add_f32 v101, 0x40c00000, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v49, v48, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v65, v100, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v53, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v51
-; GFX11-FAKE16-NEXT: v_perm_b32 v97, v29, v28, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v38
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v49, v54, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v51, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v4
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v32, v53, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v53
+; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v68, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v101, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v69, v102, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v4
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v103, v68, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v68
; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v29
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v49, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v54
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v68, 0x40c00000, v102
+; GFX11-FAKE16-NEXT: v_add3_u32 v100, v64, v101, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v101
; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v97
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v52, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v65, v69, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v101, v101
+; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v68, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v3
; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v49
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v49, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v50, v32, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v4, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v52
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v50, v4, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v51, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v68
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v100, v103, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v68, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v102, 0x40c00000, v102
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v113, 0x40c00000, v3
+; GFX11-FAKE16-NEXT: v_add3_u32 v103, v103, v4, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v102, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v69, v112, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v3, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v100
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v100
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v50, v54, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v55, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v6
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v3, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_bfe_u32 v68, v113, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v112, 16, v6
+; GFX11-FAKE16-NEXT: v_add3_u32 v69, v115, v102, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v54
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v50, v53, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_lshlrev_b32 v53, 16, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v103, v114, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v102
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v102, v102
+; GFX11-FAKE16-NEXT: v_add3_u32 v68, v68, v113, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v113
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v112, 0x40c00000, v112
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v69, v69, v103
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v113, v113
+; GFX11-FAKE16-NEXT: v_perm_b32 v87, v28, v27, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v113, v112, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v112
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v68, v68, v114, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v5
; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v51, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v53, 0x40c00000, v53
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v3, v50, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v53, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v51, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v113, v113, v112, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v112, v112
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v6, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v114, 0x40c00000, v114 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v135, v113, v116, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v6, v64, v53, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v53
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v5, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v55, 16, v8
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
+; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v114, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v5, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v99, v31, v30, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v113, v3, v51, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v48
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v53, v6, v54 :: v_dual_add_f32 v6, 0x40c00000, v55
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v115, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v113, v118, v114, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v114
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v114, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_add3_u32 v112, v112, v5, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v5
; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v144, v113, v115, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v114, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v7
; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v52, v64, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v54
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v114
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v112, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v114, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114
; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v53, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v54, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302
-; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v52, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v8, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v133, v115, v118, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v8, v65, v54, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v54
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v5, v64 :: v_dual_lshlrev_b32 v64, 16, v10
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v128, v116, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v54, v8, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v64
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v117, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v118
+; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v134, v115, v117, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v10, 0x40c00000, v10 :: v_dual_lshlrev_b32 v55, 16, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v9
; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v52, v65, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v55, 0x40c00000, v55
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v114, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v118
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-FAKE16-NEXT: v_perm_b32 v179, v7, v54, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v66, v55, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v49, 0x7060302
-; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v52, v64, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v10, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v118, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v131, v117, v128, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v10, v66, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v55
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v65, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v118, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v55, v10, v64 :: v_dual_add_f32 v10, 0x40c00000, v65
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v119, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v118
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v9
; GFX11-FAKE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v52, v66 :: v_dual_lshlrev_b32 v52, 16, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v102, v68, v69, 0x7060302
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v132, v117, v119 :: v_dual_add_f32 v117, 0x40c00000, v128
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v6, v135, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v144, 0x7060302
+; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v117, 16, 1
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v116, v129 :: v_dual_lshlrev_b32 v116, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v117
; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_perm_b32 v176, v9, v55, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v52
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v64, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v12, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v9, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v11, 0x40c00000, v11 :: v_dual_cndmask_b32 v10, v52, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v12, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v145, v118, v128, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v116, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v71, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v177, v7, v8, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v24
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v65, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v66, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v11, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v58, v10, v131, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v119, v129 :: v_dual_lshlrev_b32 v119, 16, v14
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v52, v64 :: v_dual_add_f32 v52, 0x40c00000, v65
-; GFX11-FAKE16-NEXT: v_add3_u32 v64, v66, v11, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v57, v9, v132, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v182, v12, v145, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v130, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v128, v11, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v119, 16, v13
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v180, v5, v6, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v11, v64, v65 :: v_dual_add_f32 v64, 0x40c00000, v66
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v71, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v97, v30, v29, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v128, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v117, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v64
-; GFX11-FAKE16-NEXT: v_perm_b32 v162, v11, v9, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v65, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v71, v14, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add3_u32 v71, v114, v64, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v128, v14, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v119, v118, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add3_u32 v128, v129, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v129, 16, v16
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v13, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v65, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v65, 0x40c00000, v114
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
-; GFX11-FAKE16-NEXT: v_add3_u32 v66, v116, v13, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v181, v11, v130, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v96, v53, v52, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v116, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v129
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v147, v13, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v13
; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX11-FAKE16-NEXT: v_perm_b32 v150, v14, v52, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v65, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v71, v115, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v71, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v115, 16, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v128, v128, v146, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v146, 16, v15
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v163, v12, v10, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v49
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v66, v71, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v66, 0x40c00000, v115
-; GFX11-FAKE16-NEXT: v_add3_u32 v71, v114, v65, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v65
-; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v16, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v179, v14, v119, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v146
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v129, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v146, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v66, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v66
-; GFX11-FAKE16-NEXT: v_perm_b32 v149, v13, v64, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v71, v114, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v114, v115, v16, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v117, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v148, 0x400000, v117
+; GFX11-FAKE16-NEXT: v_perm_b32 v178, v13, v128, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v118, v118, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v129, v146, v16, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v16
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v66, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v64
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v114, v115, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v66, v66
-; GFX11-FAKE16-NEXT: v_add3_u32 v71, v71, v15, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v52
-; GFX11-FAKE16-NEXT: v_perm_b32 v135, v16, v65, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v66, v116, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v147, v147, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v149, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v100, v65, v64, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v129, v146, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v15, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v8, v133, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v114, v7, v134, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v164, v16, v118, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v129, v147, v148, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v53
+; GFX11-FAKE16-NEXT: v_perm_b32 v86, v51, v50, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v99, v32, v31, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v98, v55, v54, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[112:113]
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v116, v149, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v52
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[102:103]
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v71, v118, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v163, v15, v129, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v118
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v129
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[163:164]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[178:179]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[181:182]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[57:58]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v119
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v128
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v145
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v130
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v131
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v132
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v133
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v134
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v135
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v144
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v68
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[114:115]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[100:101]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v134, v15, v66, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v66
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v54
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[134:135]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[149:150]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[162:163]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[176:177]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[179:180]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[96:97]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[84:85]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[80:81]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v55
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[80:81]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v39
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[98:99]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[86:87]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[82:83]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[67:68]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 24, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 8, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v150
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v150
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v149
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v149
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 24, v163
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v163
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 8, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v177
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v177
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v176
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v176
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v113
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[70:71]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[66:67]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v164
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 8, v164
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v163
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 24, v179
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v179
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v178
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v58
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v58
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v57
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v114
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v113
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v113
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v112
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v112
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v103
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v103
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v103
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v102
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v102
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v101
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v100
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v99
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v99
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v98
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v98
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v97
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v97
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v96
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v96
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v87
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v87
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v87
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v86
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v85
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v84
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v82
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v82
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v80
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v58
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v72
; GFX11-FAKE16-NEXT: .LBB90_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v43, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v41, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v129, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v150, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v51, v148, v58, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v183, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v146, v52, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v103, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v119, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v179, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v177, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v144, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v114, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v133, v37, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v112, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v181, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v135, v48, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v113, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v118, v180, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v176, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v117, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v51, v134, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v132, v44, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v165, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v164, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v163, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v162, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v160, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v151, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v150, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v115, v149, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v131, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v130, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v128, v178, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8
@@ -150851,62 +150899,62 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v147, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v146, v34, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v145, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v114, v135, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v134, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v133, v33, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v132, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v71, v131, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v119, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v166, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v118, v164, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v163, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v117, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v161, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v116, v160, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v78, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v77, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v67, v65, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v76, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v68, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v74, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v73, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v178, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v77, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v56, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v76, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v47, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v75, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v45, v74, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v80, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v62, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v43, v68, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v81, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v166, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v42, v73, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v82, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v60, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v183, v54, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v161, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v180, v63, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v84, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v57, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v177, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v85, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v148, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v176, v62, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v23, v27, v86, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v47, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v165, v50, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v18, 16, v17
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v20, 16, v19
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v22, 16, v21
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v28, v87, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v144, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v162, v61, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23
; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v96, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v45, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v151, v49, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v97, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v25, v130, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v149, v101, 0xc0c0004
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v98, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v101, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v147, v38, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v99, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v128, v100, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v145, v100, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v23, 16, v22
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v25, 16, v24
@@ -154808,13 +154856,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_mov_b32_e32 v3, s16
; GFX9-NEXT: v_readfirstlane_b32 s57, v4
; GFX9-NEXT: v_mov_b32_e32 v4, s17
-; GFX9-NEXT: v_readfirstlane_b32 s46, v5
+; GFX9-NEXT: v_readfirstlane_b32 s44, v5
; GFX9-NEXT: v_mov_b32_e32 v5, s18
-; GFX9-NEXT: v_readfirstlane_b32 s47, v6
+; GFX9-NEXT: v_readfirstlane_b32 s45, v6
; GFX9-NEXT: v_mov_b32_e32 v6, s19
-; GFX9-NEXT: v_readfirstlane_b32 s44, v7
+; GFX9-NEXT: v_readfirstlane_b32 s46, v7
; GFX9-NEXT: v_mov_b32_e32 v7, s20
-; GFX9-NEXT: v_readfirstlane_b32 s45, v8
+; GFX9-NEXT: v_readfirstlane_b32 s47, v8
; GFX9-NEXT: v_mov_b32_e32 v8, s21
; GFX9-NEXT: v_readfirstlane_b32 s42, v9
; GFX9-NEXT: v_mov_b32_e32 v9, s22
@@ -154871,134 +154919,134 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: s_cbranch_scc0 .LBB91_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s26, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 10
+; GFX9-NEXT: v_writelane_b32 v62, s26, 17
; GFX9-NEXT: s_lshr_b32 s26, s5, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 0
+; GFX9-NEXT: v_writelane_b32 v62, s26, 1
; GFX9-NEXT: s_lshr_b32 s26, s5, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 11
+; GFX9-NEXT: v_writelane_b32 v62, s26, 18
; GFX9-NEXT: s_lshr_b32 s26, s4, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 8
+; GFX9-NEXT: v_writelane_b32 v62, s26, 0
; GFX9-NEXT: s_lshr_b32 s26, s4, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 9
+; GFX9-NEXT: v_writelane_b32 v62, s26, 16
; GFX9-NEXT: s_lshr_b32 s26, s7, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 14
+; GFX9-NEXT: v_writelane_b32 v62, s26, 20
; GFX9-NEXT: s_lshr_b32 s26, s7, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 1
+; GFX9-NEXT: v_writelane_b32 v62, s26, 3
; GFX9-NEXT: s_lshr_b32 s26, s7, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 15
+; GFX9-NEXT: v_writelane_b32 v62, s26, 21
; GFX9-NEXT: s_lshr_b32 s26, s6, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 12
+; GFX9-NEXT: v_writelane_b32 v62, s26, 2
; GFX9-NEXT: s_lshr_b32 s26, s6, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 13
+; GFX9-NEXT: v_writelane_b32 v62, s26, 19
; GFX9-NEXT: s_lshr_b32 s26, s9, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 18
+; GFX9-NEXT: v_writelane_b32 v62, s26, 23
; GFX9-NEXT: s_lshr_b32 s26, s9, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 2
+; GFX9-NEXT: v_writelane_b32 v62, s26, 5
; GFX9-NEXT: s_lshr_b32 s26, s9, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 19
+; GFX9-NEXT: v_writelane_b32 v62, s26, 24
; GFX9-NEXT: s_lshr_b32 s26, s8, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 16
+; GFX9-NEXT: v_writelane_b32 v62, s26, 4
; GFX9-NEXT: s_lshr_b32 s26, s8, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 17
-; GFX9-NEXT: s_lshr_b32 s26, s11, 24
; GFX9-NEXT: v_writelane_b32 v62, s26, 22
+; GFX9-NEXT: s_lshr_b32 s26, s11, 24
+; GFX9-NEXT: v_writelane_b32 v62, s26, 26
; GFX9-NEXT: s_lshr_b32 s26, s11, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 3
+; GFX9-NEXT: v_writelane_b32 v62, s26, 7
; GFX9-NEXT: s_lshr_b32 s26, s11, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 23
+; GFX9-NEXT: v_writelane_b32 v62, s26, 27
; GFX9-NEXT: s_lshr_b32 s26, s10, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 20
+; GFX9-NEXT: v_writelane_b32 v62, s26, 6
; GFX9-NEXT: s_lshr_b32 s26, s10, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 21
+; GFX9-NEXT: v_writelane_b32 v62, s26, 25
; GFX9-NEXT: s_lshr_b32 s26, s13, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 26
+; GFX9-NEXT: v_writelane_b32 v62, s26, 29
; GFX9-NEXT: s_lshr_b32 s26, s13, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 4
+; GFX9-NEXT: v_writelane_b32 v62, s26, 9
; GFX9-NEXT: s_lshr_b32 s26, s13, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 27
+; GFX9-NEXT: v_writelane_b32 v62, s26, 30
; GFX9-NEXT: s_lshr_b32 s26, s12, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 24
+; GFX9-NEXT: v_writelane_b32 v62, s26, 8
; GFX9-NEXT: s_lshr_b32 s26, s12, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 25
+; GFX9-NEXT: v_writelane_b32 v62, s26, 28
; GFX9-NEXT: s_lshr_b32 s26, s15, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 30
+; GFX9-NEXT: v_writelane_b32 v62, s26, 32
; GFX9-NEXT: s_lshr_b32 s26, s15, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 5
+; GFX9-NEXT: v_writelane_b32 v62, s26, 11
; GFX9-NEXT: s_lshr_b32 s26, s15, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 31
+; GFX9-NEXT: v_writelane_b32 v62, s26, 33
; GFX9-NEXT: s_lshr_b32 s26, s14, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 28
+; GFX9-NEXT: v_writelane_b32 v62, s26, 10
; GFX9-NEXT: s_lshr_b32 s26, s14, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 29
+; GFX9-NEXT: v_writelane_b32 v62, s26, 31
; GFX9-NEXT: s_lshr_b32 s26, s17, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 34
+; GFX9-NEXT: v_writelane_b32 v62, s26, 35
; GFX9-NEXT: s_lshr_b32 s26, s17, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 6
+; GFX9-NEXT: v_writelane_b32 v62, s26, 13
; GFX9-NEXT: s_lshr_b32 s26, s17, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 35
+; GFX9-NEXT: v_writelane_b32 v62, s26, 36
; GFX9-NEXT: s_lshr_b32 s26, s16, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 32
+; GFX9-NEXT: v_writelane_b32 v62, s26, 12
; GFX9-NEXT: s_lshr_b32 s26, s16, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 33
+; GFX9-NEXT: v_writelane_b32 v62, s26, 34
; GFX9-NEXT: s_lshr_b32 s26, s19, 24
; GFX9-NEXT: v_writelane_b32 v62, s26, 38
; GFX9-NEXT: s_lshr_b32 s26, s19, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 7
+; GFX9-NEXT: v_writelane_b32 v62, s26, 15
; GFX9-NEXT: s_lshr_b32 s26, s19, 8
; GFX9-NEXT: v_writelane_b32 v62, s26, 39
; GFX9-NEXT: s_lshr_b32 s26, s18, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 36
+; GFX9-NEXT: v_writelane_b32 v62, s26, 14
; GFX9-NEXT: s_lshr_b32 s26, s18, 8
; GFX9-NEXT: v_writelane_b32 v62, s26, 37
-; GFX9-NEXT: s_lshr_b32 s26, s45, 24
+; GFX9-NEXT: s_lshr_b32 s26, s43, 24
; GFX9-NEXT: v_writelane_b32 v62, s26, 40
-; GFX9-NEXT: s_lshr_b32 s26, s45, 8
+; GFX9-NEXT: s_lshr_b32 s26, s43, 8
; GFX9-NEXT: v_writelane_b32 v62, s26, 41
; GFX9-NEXT: s_lshr_b32 s26, s47, 24
-; GFX9-NEXT: v_writelane_b32 v62, s26, 44
-; GFX9-NEXT: s_lshr_b32 s26, s47, 8
-; GFX9-NEXT: v_writelane_b32 v62, s26, 45
-; GFX9-NEXT: s_lshr_b32 s26, s46, 16
; GFX9-NEXT: v_writelane_b32 v62, s26, 42
-; GFX9-NEXT: s_lshr_b32 s26, s46, 8
+; GFX9-NEXT: s_lshr_b32 s26, s47, 8
; GFX9-NEXT: v_writelane_b32 v62, s26, 43
+; GFX9-NEXT: s_lshr_b32 s26, s45, 24
+; GFX9-NEXT: v_writelane_b32 v62, s26, 45
+; GFX9-NEXT: s_lshr_b32 s26, s45, 8
+; GFX9-NEXT: v_writelane_b32 v62, s26, 46
+; GFX9-NEXT: s_lshr_b32 s26, s44, 8
+; GFX9-NEXT: v_writelane_b32 v62, s26, 44
; GFX9-NEXT: s_lshr_b32 s26, s57, 24
; GFX9-NEXT: v_writelane_b32 v62, s26, 48
; GFX9-NEXT: s_lshr_b32 s26, s57, 8
; GFX9-NEXT: v_writelane_b32 v62, s26, 49
-; GFX9-NEXT: s_lshr_b32 s26, s56, 16
-; GFX9-NEXT: v_writelane_b32 v62, s26, 46
; GFX9-NEXT: s_lshr_b32 s26, s56, 8
-; GFX9-NEXT: s_lshr_b32 s52, s21, 24
+; GFX9-NEXT: s_lshr_b32 s97, s21, 24
; GFX9-NEXT: s_lshr_b32 s67, s21, 16
-; GFX9-NEXT: s_lshr_b32 s55, s21, 8
-; GFX9-NEXT: s_lshr_b32 s65, s20, 16
-; GFX9-NEXT: s_lshr_b32 s64, s20, 8
-; GFX9-NEXT: s_lshr_b32 s48, s23, 24
-; GFX9-NEXT: s_lshr_b32 s68, s23, 16
-; GFX9-NEXT: s_lshr_b32 s51, s23, 8
-; GFX9-NEXT: s_lshr_b32 s54, s22, 16
-; GFX9-NEXT: s_lshr_b32 s53, s22, 8
-; GFX9-NEXT: s_lshr_b32 s98, s25, 24
-; GFX9-NEXT: s_lshr_b32 s69, s25, 16
+; GFX9-NEXT: s_lshr_b32 s99, s21, 8
+; GFX9-NEXT: s_lshr_b32 s81, s20, 16
+; GFX9-NEXT: s_lshr_b32 s49, s20, 8
+; GFX9-NEXT: s_lshr_b32 s86, s23, 24
+; GFX9-NEXT: s_lshr_b32 s66, s23, 16
+; GFX9-NEXT: s_lshr_b32 s96, s23, 8
+; GFX9-NEXT: s_lshr_b32 s80, s22, 16
+; GFX9-NEXT: s_lshr_b32 s48, s22, 8
+; GFX9-NEXT: s_lshr_b32 s85, s25, 24
+; GFX9-NEXT: s_lshr_b32 s65, s25, 16
; GFX9-NEXT: s_lshr_b32 s39, s25, 8
-; GFX9-NEXT: s_lshr_b32 s50, s24, 16
-; GFX9-NEXT: s_lshr_b32 s49, s24, 8
-; GFX9-NEXT: s_lshr_b32 s86, s41, 24
-; GFX9-NEXT: s_lshr_b32 s70, s41, 16
-; GFX9-NEXT: s_lshr_b32 s97, s41, 8
-; GFX9-NEXT: s_lshr_b32 s38, s40, 16
-; GFX9-NEXT: s_lshr_b32 s99, s40, 8
-; GFX9-NEXT: s_lshr_b32 s82, s43, 24
-; GFX9-NEXT: s_lshr_b32 s71, s43, 16
-; GFX9-NEXT: s_lshr_b32 s85, s43, 8
-; GFX9-NEXT: s_lshr_b32 s96, s42, 16
-; GFX9-NEXT: s_lshr_b32 s87, s42, 8
-; GFX9-NEXT: s_lshr_b32 s80, s45, 16
-; GFX9-NEXT: s_lshr_b32 s84, s44, 16
-; GFX9-NEXT: s_lshr_b32 s83, s44, 8
-; GFX9-NEXT: s_lshr_b32 s81, s47, 16
-; GFX9-NEXT: s_lshr_b32 s66, s57, 16
+; GFX9-NEXT: s_lshr_b32 s71, s24, 16
+; GFX9-NEXT: s_lshr_b32 s98, s24, 8
+; GFX9-NEXT: s_lshr_b32 s82, s41, 24
+; GFX9-NEXT: s_lshr_b32 s64, s41, 16
+; GFX9-NEXT: s_lshr_b32 s84, s41, 8
+; GFX9-NEXT: s_lshr_b32 s70, s40, 16
+; GFX9-NEXT: s_lshr_b32 s87, s40, 8
+; GFX9-NEXT: s_lshr_b32 s55, s43, 16
+; GFX9-NEXT: s_lshr_b32 s69, s42, 16
+; GFX9-NEXT: s_lshr_b32 s38, s42, 8
+; GFX9-NEXT: s_lshr_b32 s54, s47, 16
+; GFX9-NEXT: s_lshr_b32 s68, s46, 16
+; GFX9-NEXT: s_lshr_b32 s83, s46, 8
+; GFX9-NEXT: s_lshr_b32 s52, s45, 16
+; GFX9-NEXT: s_lshr_b32 s53, s44, 16
+; GFX9-NEXT: s_lshr_b32 s50, s57, 16
+; GFX9-NEXT: s_lshr_b32 s51, s56, 16
; GFX9-NEXT: v_writelane_b32 v62, s26, 47
; GFX9-NEXT: s_lshr_b64 s[26:27], s[4:5], 24
; GFX9-NEXT: s_lshr_b64 s[28:29], s[6:7], 24
@@ -155013,14 +155061,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: s_lshr_b64 s[90:91], s[24:25], 24
; GFX9-NEXT: s_lshr_b64 s[92:93], s[40:41], 24
; GFX9-NEXT: s_lshr_b64 s[94:95], s[42:43], 24
-; GFX9-NEXT: s_lshr_b64 s[30:31], s[44:45], 24
-; GFX9-NEXT: s_lshr_b64 s[34:35], s[46:47], 24
+; GFX9-NEXT: s_lshr_b64 s[30:31], s[46:47], 24
+; GFX9-NEXT: s_lshr_b64 s[34:35], s[44:45], 24
; GFX9-NEXT: s_lshr_b64 s[36:37], s[56:57], 24
; GFX9-NEXT: s_cbranch_execnz .LBB91_4
; GFX9-NEXT: .LBB91_2: ; %cmp.true
; GFX9-NEXT: s_and_b32 s26, s57, 0xffff0000
-; GFX9-NEXT: v_mov_b32_e32 v8, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v1, s26, v8
+; GFX9-NEXT: v_mov_b32_e32 v13, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v1, s26, v13
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -155029,7 +155077,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s26, s57, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s26, v8
+; GFX9-NEXT: v_add_f32_e32 v1, s26, v13
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -155037,42 +155085,43 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX9-NEXT: s_and_b32 s26, s56, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v2, v4, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s26, v8
+; GFX9-NEXT: v_add_f32_e32 v1, s26, v13
; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s26, s56, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s26, v13
+; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: s_and_b32 s26, s45, 0xffff0000
; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s26, v8
-; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s26, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX9-NEXT: s_and_b32 s26, s47, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s26, v8
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v1, v5, 16, v1
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; GFX9-NEXT: s_lshl_b32 s26, s47, 16
+; GFX9-NEXT: s_lshl_b32 s26, s45, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s26, v8
+; GFX9-NEXT: v_add_f32_e32 v3, s26, v13
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
@@ -155080,42 +155129,43 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX9-NEXT: s_and_b32 s26, s46, 0xffff0000
+; GFX9-NEXT: s_and_b32 s26, s44, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v4, v6, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s26, v8
+; GFX9-NEXT: v_add_f32_e32 v3, s26, v13
; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: s_lshl_b32 s26, s46, 16
; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: s_lshl_b32 s26, s44, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s26, v13
+; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: s_and_b32 s26, s47, 0xffff0000
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
+; GFX9-NEXT: v_add_f32_e32 v5, s26, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX9-NEXT: s_and_b32 s26, s45, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v3, v3, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v3, v7, 16, v3
; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: s_lshl_b32 s26, s45, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
+; GFX9-NEXT: s_lshl_b32 s26, s47, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s26, v13
; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
@@ -155125,735 +155175,716 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX9-NEXT: s_and_b32 s26, s44, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v12, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: s_lshl_b32 s26, s44, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s26, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: s_and_b32 s26, s46, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v6, v8, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s26, v13
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX9-NEXT: s_and_b32 s26, s43, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v11, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: s_lshl_b32 s26, s43, 16
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: s_lshl_b32 s26, s46, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s26, v13
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: s_and_b32 s26, s43, 0xffff0000
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v5, v9, 16, v5
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: s_lshl_b32 s26, s43, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s26, s42, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v14, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s26, s42, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s26, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s26, s41, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v13, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v10, v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s26, s41, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s26, s40, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v16, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v17, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s26, s40, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s26, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s26, s25, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v15, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s26, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v16, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s26, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s25, s25, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s25, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s25, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s25, s24, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v20, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s25, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v19, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s25, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s24, s24, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s24, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s24, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s24, s23, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v19, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s24, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v18, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s24, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s23, s23, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s23, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s23, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s23, s22, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v22, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s23, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v23, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s23, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s22, s22, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s22, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s22, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s22, s21, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v21, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s22, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v22, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s22, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s21, s21, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s21, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s21, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s21, s20, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v24, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s21, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v25, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s21, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s20, s20, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s20, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s20, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s20, s19, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v23, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s20, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v24, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s20, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s19, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s19, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s19, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s19, s18, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s19, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v27, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s19, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s18, s18, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s18, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s18, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s18, s17, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v30, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s18, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v26, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s18, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s17, s17, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s17, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s17, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s17, s16, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v49, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s17, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v29, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s17, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s16, s16, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s16, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s16, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s16, s15, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v48, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s16, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v28, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s16, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s15, s15, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s15, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s15, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s15, s14, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v53, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s15, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v53, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s15, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s14, s14, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s14, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s14, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v52, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s14, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v52, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s14, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s13, s13, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s13, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s13, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v55, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s13, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v55, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s13, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s12, s12, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s12, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v54, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s12, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v54, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s12, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s11, s11, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s11, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s11, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v41, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s11, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v41, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s11, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s10, s10, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s10, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v40, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s10, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v40, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s9, s9, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s9, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s9, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v43, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s9, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v43, v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s9, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s8, s8, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s8, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s8, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v42, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s8, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v42, v57, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s8, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s7, s7, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s7, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s7, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v45, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s7, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v45, v56, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s7, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s6, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v44, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v44, v15, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s5, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s5, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v61
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v47, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s5, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v47, v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s5, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s4, s4, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s4, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v8
-; GFX9-NEXT: v_lshl_or_b32 v46, v5, 16, v6
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[19:20]
-; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[42:43]
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[40:41]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[54:55]
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[15:16]
-; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[52:53]
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v52
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v52
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s4, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v7
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v13
+; GFX9-NEXT: v_lshl_or_b32 v46, v58, 16, v7
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[24:25]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[22:23]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[18:19]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[16:17]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[10:11]
+; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[42:43]
+; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[52:53]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[46:47]
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[44:45]
+; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[40:41]
+; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[28:29]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v22
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
-; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[46:47]
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX9-NEXT: v_lshrrev_b64 v[28:29], 24, v[44:45]
-; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[48:49]
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[30:31]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[32:33], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v45
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[54:55]
+; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[26:27]
+; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v25
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v23
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 24, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v55
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v54
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v53
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v53
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v26
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: s_branch .LBB91_5
; GFX9-NEXT: .LBB91_3:
; GFX9-NEXT: ; implicit-def: $sgpr26
; GFX9-NEXT: ; kill: killed $sgpr26
; GFX9-NEXT: ; implicit-def: $sgpr26
; GFX9-NEXT: ; kill: killed $sgpr26
-; GFX9-NEXT: ; implicit-def: $sgpr66
-; GFX9-NEXT: ; implicit-def: $sgpr81
-; GFX9-NEXT: ; implicit-def: $sgpr83
-; GFX9-NEXT: ; implicit-def: $sgpr84
-; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr87
-; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr82
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr97
-; GFX9-NEXT: ; implicit-def: $sgpr70
-; GFX9-NEXT: ; implicit-def: $sgpr86
-; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr51
; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr69
-; GFX9-NEXT: ; implicit-def: $sgpr98
; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr83
; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr55
+; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr70
+; GFX9-NEXT: ; implicit-def: $sgpr84
; GFX9-NEXT: ; implicit-def: $sgpr64
+; GFX9-NEXT: ; implicit-def: $sgpr82
+; GFX9-NEXT: ; implicit-def: $sgpr98
+; GFX9-NEXT: ; implicit-def: $sgpr71
+; GFX9-NEXT: ; implicit-def: $sgpr39
; GFX9-NEXT: ; implicit-def: $sgpr65
-; GFX9-NEXT: ; implicit-def: $sgpr55
+; GFX9-NEXT: ; implicit-def: $sgpr85
+; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr80
+; GFX9-NEXT: ; implicit-def: $sgpr96
+; GFX9-NEXT: ; implicit-def: $sgpr66
+; GFX9-NEXT: ; implicit-def: $sgpr86
+; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr99
; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr72
@@ -155968,279 +155999,270 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: ; implicit-def: $sgpr26
; GFX9-NEXT: s_branch .LBB91_2
; GFX9-NEXT: .LBB91_4:
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s8
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s9
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s10
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s11
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s12
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s13
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s14
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s15
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s16
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s18
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s20
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s21
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s22
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s23
+; GFX9-NEXT: v_mov_b32_e32 v1, s22
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s23
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s24
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s25
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v13, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s40
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_readlane_b32 s4, v62, 0
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s41
+; GFX9-NEXT: v_mov_b32_e32 v58, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 1
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s42
+; GFX9-NEXT: v_mov_b32_e32 v14, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 2
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s43
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 3
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s44
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s45
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s46
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s47
-; GFX9-NEXT: v_mov_b32_e32 v8, s4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s56
-; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s57
-; GFX9-NEXT: v_mov_b32_e32 v9, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v56, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s47
+; GFX9-NEXT: v_mov_b32_e32 v57, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v12, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: v_mov_b32_e32 v46, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: v_mov_b32_e32 v57, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: v_mov_b32_e32 v47, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
-; GFX9-NEXT: v_mov_b32_e32 v29, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: v_mov_b32_e32 v44, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: v_mov_b32_e32 v58, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: v_mov_b32_e32 v56, s4
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: v_mov_b32_e32 v35, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: v_mov_b32_e32 v59, s4
+; GFX9-NEXT: v_mov_b32_e32 v39, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: v_mov_b32_e32 v43, s4
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
-; GFX9-NEXT: v_mov_b32_e32 v6, s4
+; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: v_mov_b32_e32 v45, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
-; GFX9-NEXT: v_mov_b32_e32 v10, s4
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: v_mov_b32_e32 v61, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: v_mov_b32_e32 v54, s4
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
-; GFX9-NEXT: v_mov_b32_e32 v27, s4
-; GFX9-NEXT: v_mov_b32_e32 v26, s78
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s88
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s67
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s68
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s69
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s70
-; GFX9-NEXT: v_mov_b32_e32 v55, s4
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s90
+; GFX9-NEXT: v_mov_b32_e32 v41, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s71
-; GFX9-NEXT: v_mov_b32_e32 v7, s4
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s80
-; GFX9-NEXT: v_mov_b32_e32 v60, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v21, s4
+; GFX9-NEXT: v_mov_b32_e32 v20, s78
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s92
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v20, s88
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s81
-; GFX9-NEXT: v_mov_b32_e32 v5, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 31
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s67
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s66
-; GFX9-NEXT: v_mov_b32_e32 v53, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 32
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v20, s90
+; GFX9-NEXT: v_mov_b32_e32 v1, s80
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v49, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s66
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s71
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s94
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v20, s92
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s65
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s70
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s64
-; GFX9-NEXT: v_mov_b32_e32 v33, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s69
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s55
+; GFX9-NEXT: v_readlane_b32 s4, v62, 30
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s68
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 31
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s54
+; GFX9-NEXT: v_mov_b32_e32 v52, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 32
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s44
+; GFX9-NEXT: v_mov_b32_e32 v60, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 33
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s53
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 34
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s45
+; GFX9-NEXT: v_mov_b32_e32 v9, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s52
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v7, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s55
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s56
+; GFX9-NEXT: v_mov_b32_e32 v8, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s54
-; GFX9-NEXT: v_mov_b32_e32 v30, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s51
+; GFX9-NEXT: v_mov_b32_e32 v26, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s53
-; GFX9-NEXT: v_mov_b32_e32 v48, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s57
+; GFX9-NEXT: v_mov_b32_e32 v28, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
-; GFX9-NEXT: v_mov_b32_e32 v31, s4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s51
-; GFX9-NEXT: v_readlane_b32 s4, v62, 40
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s50
-; GFX9-NEXT: v_mov_b32_e32 v16, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 41
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 40
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s49
-; GFX9-NEXT: v_mov_b32_e32 v12, s4
+; GFX9-NEXT: v_mov_b32_e32 v29, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 41
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s97
+; GFX9-NEXT: v_mov_b32_e32 v11, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s98
-; GFX9-NEXT: v_mov_b32_e32 v23, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s99
+; GFX9-NEXT: v_mov_b32_e32 v32, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s39
-; GFX9-NEXT: v_mov_b32_e32 v3, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s48
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s38
-; GFX9-NEXT: v_mov_b32_e32 v21, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s86
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 45
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s96
+; GFX9-NEXT: v_mov_b32_e32 v25, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s97
-; GFX9-NEXT: v_mov_b32_e32 v22, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s85
+; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: v_mov_b32_e32 v26, s30
-; GFX9-NEXT: v_mov_b32_e32 v20, s4
+; GFX9-NEXT: v_mov_b32_e32 v20, s94
+; GFX9-NEXT: v_mov_b32_e32 v22, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s99
-; GFX9-NEXT: v_mov_b32_e32 v19, s96
-; GFX9-NEXT: v_mov_b32_e32 v13, s87
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v61, s5
+; GFX9-NEXT: v_mov_b32_e32 v18, s98
+; GFX9-NEXT: v_mov_b32_e32 v19, s39
+; GFX9-NEXT: v_mov_b32_e32 v16, s87
; GFX9-NEXT: v_mov_b32_e32 v24, s82
-; GFX9-NEXT: v_mov_b32_e32 v14, s85
-; GFX9-NEXT: v_mov_b32_e32 v52, s84
-; GFX9-NEXT: v_mov_b32_e32 v11, s83
+; GFX9-NEXT: v_mov_b32_e32 v17, s84
+; GFX9-NEXT: v_mov_b32_e32 v10, s38
+; GFX9-NEXT: v_mov_b32_e32 v5, s83
; GFX9-NEXT: v_mov_b32_e32 v2, s4
-; GFX9-NEXT: v_mov_b32_e32 v25, s26
-; GFX9-NEXT: v_mov_b32_e32 v28, s28
-; GFX9-NEXT: v_mov_b32_e32 v34, s58
-; GFX9-NEXT: v_mov_b32_e32 v35, s60
-; GFX9-NEXT: v_mov_b32_e32 v36, s62
-; GFX9-NEXT: v_mov_b32_e32 v37, s72
-; GFX9-NEXT: v_mov_b32_e32 v38, s74
+; GFX9-NEXT: v_mov_b32_e32 v30, s26
+; GFX9-NEXT: v_mov_b32_e32 v33, s28
+; GFX9-NEXT: v_mov_b32_e32 v36, s58
+; GFX9-NEXT: v_mov_b32_e32 v37, s60
+; GFX9-NEXT: v_mov_b32_e32 v38, s62
+; GFX9-NEXT: v_mov_b32_e32 v48, s72
+; GFX9-NEXT: v_mov_b32_e32 v49, s74
; GFX9-NEXT: v_mov_b32_e32 v50, s76
-; GFX9-NEXT: v_mov_b32_e32 v26, s34
-; GFX9-NEXT: v_mov_b32_e32 v32, s36
+; GFX9-NEXT: v_mov_b32_e32 v20, s30
+; GFX9-NEXT: v_mov_b32_e32 v31, s34
+; GFX9-NEXT: v_mov_b32_e32 v34, s36
; GFX9-NEXT: .LBB91_5: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v18, v18, v25, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v50, v51, v50, s4
-; GFX9-NEXT: v_perm_b32 v23, v23, v26, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v50
-; GFX9-NEXT: v_perm_b32 v38, v49, v38, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v37, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX9-NEXT: v_perm_b32 v36, v61, v36, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_perm_b32 v34, v56, v34, s4
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: v_perm_b32 v22, v22, v32, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v33, s4
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v37, s4
+; GFX9-NEXT: v_perm_b32 v36, v57, v36, s4
+; GFX9-NEXT: v_perm_b32 v30, v58, v30, s4
; GFX9-NEXT: v_readlane_b32 s99, v63, 35
; GFX9-NEXT: v_readlane_b32 s98, v63, 34
; GFX9-NEXT: v_readlane_b32 s97, v63, 33
@@ -156277,288 +156299,297 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_readlane_b32 s34, v63, 2
; GFX9-NEXT: v_readlane_b32 s31, v63, 1
; GFX9-NEXT: v_readlane_b32 s30, v63, 0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v30, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v25, v26
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v25, v25, v31, s4
+; GFX9-NEXT: v_perm_b32 v50, v23, v50, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v33, v33, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v49, v23, v49, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v31, v34, v31, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v48, v23, v48, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v34, v26, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v34, 16, v50
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v34
+; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v38, v23, v38, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v48, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX9-NEXT: v_or_b32_e32 v25, v25, v26
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v38
+; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v39, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v25, v26
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v27
+; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v25, v17, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v49
+; GFX9-NEXT: v_or_b32_e32 v9, v9, v26
+; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v33, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX9-NEXT: v_or_b32_e32 v17, v17, v25
-; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v9, v8, s4
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v7, v9, v7, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v48
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v60, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v17, v7
+; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v17, v5, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: v_or_b32_e32 v5, v7, v5
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v36
+; GFX9-NEXT: v_perm_b32 v8, v8, v60, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v38
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v54, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v54, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v55, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v55, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v27, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v8, v21, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:28
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v12
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v40, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v41, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v10, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v34
+; GFX9-NEXT: v_perm_b32 v8, v8, v59, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v36
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v42, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v43, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v59, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v28
+; GFX9-NEXT: v_perm_b32 v7, v7, v43, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v44, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v45, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v47, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v15
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v58, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v5, v8, v46, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v18
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v6, v9, v57, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v56, v46, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v47, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v45, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_perm_b32 v7, v13, v51, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v30
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: v_perm_b32 v8, v14, v35, s4
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:56
+; GFX9-NEXT: v_perm_b32 v7, v61, v39, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:60
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v5, v1, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v22
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
+; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v33
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v20, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v4, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v21, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v25, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v52, v2, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v12, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v6, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v16, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v32, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v19, v2, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v13, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v10, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v14, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v24, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v15, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v17, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v19, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -156628,7 +156659,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s38, 6
; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s102, 6
; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-TRUE16-NEXT: s_mov_b32 s97, 0
+; GFX11-TRUE16-NEXT: s_mov_b32 vcc_hi, 0
; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s39, 7
; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s103, 7
@@ -156682,151 +156713,152 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 19
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s5, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s5, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s5, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s5, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s4, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s4, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s7, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 20
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s7, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s7, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s7, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s7, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s6, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s6, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s9, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s9, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 18
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s9, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s8, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s8, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 22
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s8, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s11, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s11, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s11, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s11, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s11, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s10, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s10, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s13, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 23
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s13, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s13, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s13, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s13, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s12, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s12, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s15, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s12, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s15, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 21
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s15, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s14, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 20
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s15, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s14, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s14, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 25
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s29, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s29, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s29, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 7
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s29, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s28, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 21
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s28, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s41, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 26
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s41, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s41, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s40, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s40, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s40, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s40, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 19
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 28
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16
; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 9
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 29
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[40:41], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 27
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 31
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 11
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 10
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 30
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 13
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 12
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 31
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 15
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 14
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 17
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 8
; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s74, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s74, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s75, 1
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s41, 16
-; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s97
+; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_hi
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB91_4
; GFX11-TRUE16-NEXT: .LBB91_2: ; %cmp.true
; GFX11-TRUE16-NEXT: s_lshl_b32 s42, s41, 16
@@ -156835,7 +156867,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s41
; GFX11-TRUE16-NEXT: s_and_b32 s42, s40, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s40, s40, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s41, s29, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s40
@@ -156844,20 +156876,20 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s41, s29, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s41
-; GFX11-TRUE16-NEXT: s_lshl_b32 s29, s29, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_lshl_b32 s29, s29, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s29
@@ -156870,690 +156902,664 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s28, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v2
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s28
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v5, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s29
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v50.l
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s29
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s28, s15, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s15, s15, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-TRUE16-NEXT: s_and_b32 s15, s14, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s14, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
-; GFX11-TRUE16-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, v10, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s13, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s13, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX11-TRUE16-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s12, s12, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s11, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: s_lshl_b32 s11, s11, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v12, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v51.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v11, v12
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v11.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s11
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s11, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v13, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: s_and_b32 s11, s10, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s10, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v11
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s9, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v8
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v12
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s9, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v15, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s9, s9, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v11
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v14, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v53.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v13.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s8, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v13
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s7, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v10
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s7, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v13
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v16, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v15, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v17, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v65.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v16, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v15.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s7, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v17, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-TRUE16-NEXT: s_and_b32 s7, s6, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s6, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v15
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v14, v18, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v68.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v14, v17, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v55.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v17.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v19
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v18, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v18, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v20, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s4
; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v13.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v19, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v22, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v21 :: v_dual_add_nc_u32 v16, v19, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v22, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v21 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v20, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v99.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v24, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v112.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v102.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v113.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v87.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v13.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v24
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v24
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v24, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v101.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v98.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v103.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v13.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v71.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v116.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.h, v129.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v24, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v13.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v23
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v118.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.h, v132.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v82.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v24, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v97.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v23 :: v_dual_add_nc_u32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v19, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v86.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v19 :: v_dual_add_nc_u32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v19, v24
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v29, v28, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v14
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v24 :: v_dual_add_nc_u32 v14, v18, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v18, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, v29, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v16
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v22 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v25, v18
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v22, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v20
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x7fff, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v84.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v24 :: v_dual_add_nc_u32 v14, v18, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v131.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v18, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v19 :: v_dual_add_nc_u32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v24, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v26, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v25 :: v_dual_add_nc_u32 v18, v18, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v24, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x7fff, v25
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v18, v18, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v24, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.l, v117.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v18 :: v_dual_add_nc_u32 v18, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v25, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v130.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v166.l, v128.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v18, v18, v19 :: v_dual_add_nc_u32 v19, v23, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v20, v25
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v16 :: v_dual_add_nc_u32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v22
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v23
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v166.h, v14.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v19, v23, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v25
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v96.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, v26, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v20, v23, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v18, v23, v24 :: v_dual_add_nc_u32 v23, v25, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v147.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v22, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v15
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, v24, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v23, v25, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v26, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x7fff, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v27, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, v23, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v24, v32, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v26
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v27
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v23, v23, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x7fff, v25
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v86.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v115.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v24, v29, v32, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v119.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v118.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.l, v135.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v24
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v25, v25, v33, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.h, v146.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.l, v144.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v25
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v85.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v112.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.l, v132.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.h, v134.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.l, v145.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v39.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v54.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v16, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v161.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v19, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v18, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v150.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v164.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v25, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.l, v134.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.h, v149.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.l, v146.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v18, v27, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.h, v160.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v145.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.l, v135.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.h, v148.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v100.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v114.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v117.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v115.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v119.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.h, v133.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v130.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.h, v144.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v162.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v176.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v163.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v177.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v52.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v64.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v65.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v66.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v98.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v97.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v99.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v100.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v101.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v113.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.l, v103.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.l, v129.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.h, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.l, v131.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.h, v17.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[166:167]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[147:148]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[178:179]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[161:162]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[50:51]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v179
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v179
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 8, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v85.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v96.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.l, v151.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v165.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v166.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v167.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[40:41]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[46:47]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[20:21]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[44:45]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[35:36]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[178:179]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[28:29]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[163:164]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[37:38]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[30:31]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[182:183]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v179
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 8, v179
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v183
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v47
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v47
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v46
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v44
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 24, v148
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v148
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v147
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 8, v147
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 24, v162
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 8, v162
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v161
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v161
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 24, v164
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v164
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v163
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 8, v163
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 24, v167
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v167
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v166
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 8, v166
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v178
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v178
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v50
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v50
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v38
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v38
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 24, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v178
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 24, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 16, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
; GFX11-TRUE16-NEXT: s_branch .LBB91_5
; GFX11-TRUE16-NEXT: .LBB91_3:
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
-; GFX11-TRUE16-NEXT: s_mov_b32 s97, -1
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
@@ -157561,45 +157567,45 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
@@ -157691,290 +157697,289 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: s_branch .LBB91_2
; GFX11-TRUE16-NEXT: .LBB91_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s2 :: v_dual_mov_b32 v100, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s2 :: v_dual_mov_b32 v115, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v53, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s1 :: v_dual_mov_b32 v84, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v144, s26 :: v_dual_mov_b32 v135, s27
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v86, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s1 :: v_dual_mov_b32 v87, s7
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v163, s26 :: v_dual_mov_b32 v162, s27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v145, s24 :: v_dual_mov_b32 v132, s25
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v131, s22 :: v_dual_mov_b32 v128, s20
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v134, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s24 :: v_dual_mov_b32 v151, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s22 :: v_dual_mov_b32 v147, s23
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v129, s23 :: v_dual_mov_b32 v118, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s21 :: v_dual_mov_b32 v114, s16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v135, s18
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s21 :: v_dual_mov_b32 v131, s19
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s19 :: v_dual_mov_b32 v112, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s3 :: v_dual_mov_b32 v86, s6
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v130, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s16 :: v_dual_mov_b32 v119, s17
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s3 :: v_dual_mov_b32 v99, s5
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s4 :: v_dual_mov_b32 v80, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s5 :: v_dual_mov_b32 v70, s11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s4 :: v_dual_mov_b32 v83, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v71, s12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s8 :: v_dual_mov_b32 v68, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s9 :: v_dual_mov_b32 v66, s14
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v116, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s100 :: v_dual_mov_b32 v101, s99
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s103 :: v_dual_mov_b32 v97, s98
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s12 :: v_dual_mov_b32 v64, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s28 :: v_dual_mov_b32 v52, s40
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s102 :: v_dual_mov_b32 v85, s97
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s101 :: v_dual_mov_b32 v81, s96
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v113, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s99 :: v_dual_mov_b32 v85, s101
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s100 :: v_dual_mov_b32 v71, s103
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v102, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s14 :: v_dual_mov_b32 v70, s87
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v64, s28
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s102 :: v_dual_mov_b32 v67, s104
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, vcc_hi :: v_dual_mov_b32 v54, s42
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s86 :: v_dual_mov_b32 v66, s85
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s29 :: v_dual_mov_b32 v55, s84
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s84 :: v_dual_mov_b32 v14, s87
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s86 :: v_dual_mov_b32 v16, s83
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s40 :: v_dual_mov_b32 v53, s83
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s82
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s85 :: v_dual_mov_b32 v30, s68
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s80 :: v_dual_mov_b32 v12, s71
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s42 :: v_dual_mov_b32 v20, s81
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s71 :: v_dual_mov_b32 v24, s69
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s80 :: v_dual_mov_b32 v144, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s82 :: v_dual_mov_b32 v38, s70
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s81 :: v_dual_mov_b32 v10, s67
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v36, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s66 :: v_dual_mov_b32 v14, s68
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v103, s104
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s70 :: v_dual_mov_b32 v12, s65
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s69 :: v_dual_mov_b32 v50, s52
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s64 :: v_dual_mov_b32 v8, s55
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s55 :: v_dual_mov_b32 v28, s52
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s67 :: v_dual_mov_b32 v10, s54
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v132, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s66 :: v_dual_mov_b32 v178, s54
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s65 :: v_dual_mov_b32 v166, s48
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s64 :: v_dual_mov_b32 v8, s51
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s49 :: v_dual_mov_b32 v6, s48
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v6, s51
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s50 :: v_dual_mov_b32 v180, s36
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v48, s36
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s38 :: v_dual_mov_b32 v36, s37
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v151, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v183, s49 :: v_dual_mov_b32 v46, s38
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v179, s39 :: v_dual_mov_b32 v44, s37
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s50 :: v_dual_mov_b32 v44, s39
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, s34 :: v_dual_mov_b32 v4, s35
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v43, s34 :: v_dual_mov_b32 v4, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s62 :: v_dual_mov_b32 v26, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 19
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s60 :: v_dual_mov_b32 v33, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s58 :: v_dual_mov_b32 v35, s44
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s74 :: v_dual_mov_b32 v16, s76
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s46 :: v_dual_mov_b32 v13, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v19, s88
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s78 :: v_dual_mov_b32 v18, s88
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v23, s92
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 21
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s90 :: v_dual_mov_b32 v24, s92
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s30
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s30 :: v_dual_mov_b32 v180, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 22
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s43
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v22, s98
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s96 :: v_dual_mov_b32 v17, s76
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 23
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 25
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 26
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 27
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 28
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 29
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 30
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 31
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 4
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 7
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s43 :: v_dual_mov_b32 v72, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s44
; GFX11-TRUE16-NEXT: v_readlane_b32 s1, v77, 1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v48, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v38, s0
; GFX11-TRUE16-NEXT: .LBB91_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v72, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v100, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v100, v102, v62, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v102, v99, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v99, v113, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v128, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v115, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v115, v117, v63, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v117, v114, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v114, v129, v62, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v61, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v103, v103, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v42, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v58, 16, v99
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v99, v48, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v57, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v114, v56, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v113, v101, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v112, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v132, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v144, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v116, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v130, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v148, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, v103, v35
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v116, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v114, v118, v181, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v112, v34, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v177, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v114, v33
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v130, v176, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v128, v167, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v164, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v117, v115
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v118, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v128, v129
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v133, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v119, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v119, v135, v46, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v33, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v160, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v149, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v119, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v146, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v164, v30, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v103, v119, v40, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v100, v102, v100
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v102, v113, v58
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v113, v48, v35
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v117, v165, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v32
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v131, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v33, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v133, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v115, v115, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v160, v27, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v34, v35
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, v48, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v129, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v145, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v38, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v134, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v32, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v161, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v167, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v147, v182, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v35, v134, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v148, v26, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v103
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v145, v150, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v178, v24, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v19, 0xc0c0004
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[99:102], off
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:16
-; GFX11-TRUE16-NEXT: v_perm_b32 v100, v132, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v35
-; GFX11-TRUE16-NEXT: v_perm_b32 v102, v144, v147, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v177, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v118
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v37, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v166, v180, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, v28, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v146, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v99, v48, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v54, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v66, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v51, v23, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v80, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v31, v18, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v100, v100, v101
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, v102, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v135, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v69, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v70, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v96, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
+; GFX11-TRUE16-NEXT: v_perm_b32 v116, v163, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v33, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v176, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v51, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v69, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v71, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v83, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v83, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v100, v17, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v85, v30, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v46, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v41, v3, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v102, v26, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v65, v180, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v67, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v23
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v82, v37, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v68, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v29, v17, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v96, v21, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v22, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v98, v25, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v52, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v165, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v116, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v162, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v50, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v71, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v81, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v115, v151, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v53, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v66, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v25, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v55, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v67, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v85, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v103, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v101, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v113, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v112, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v52, v44, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v36, v55, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v64, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v53, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v65, v6, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v64, v6, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v70, v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v81, v12, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v86, v15, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v84, v16, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v97, v20, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v87, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v68, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v80, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v82, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v98, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v87, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v102, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v99, v19, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v28, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v36, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v26
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v27
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v23, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v34, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v37, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v21
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[99:102], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off offset:48
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
@@ -158092,7 +158097,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 6
; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 6
; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14
-; GFX11-FAKE16-NEXT: s_mov_b32 s97, 0
+; GFX11-FAKE16-NEXT: s_mov_b32 vcc_hi, 0
; GFX11-FAKE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 7
; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 7
@@ -158146,151 +158151,152 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[0:1], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 19
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s5, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s5, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s5, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s5, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s4, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s4, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s7, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 20
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s7, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s7, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s7, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s7, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s6, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s6, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s6, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s9, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s9, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 18
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s9, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s9, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s8, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s8, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 22
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s8, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s11, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s11, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s11, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s11, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s10, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s10, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s13, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 23
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s13, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s13, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s13, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s13, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s12, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s12, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s12, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s15, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s12, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s15, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 21
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s15, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s15, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s14, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 20
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s15, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s14, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s14, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s29, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s29, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s29, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s29, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s28, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s28, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 21
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s28, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s41, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s41, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s41, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s40, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s40, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 28
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16
; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 9
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 29
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 16
; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[28:29], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[40:41], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 27
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 31
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 11
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 10
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 30
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 13
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 12
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 15
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 14
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 17
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s74, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s4, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s74, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s75, 1
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s41, 16
-; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s97
+; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_hi
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB91_4
; GFX11-FAKE16-NEXT: .LBB91_2: ; %cmp.true
; GFX11-FAKE16-NEXT: s_lshl_b32 s42, s41, 16
@@ -158320,8 +158326,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s29
; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
@@ -158335,693 +158341,683 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_lshl_b32 s28, s28, 16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s29
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s29
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-FAKE16-NEXT: s_lshl_b32 s28, s28, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v9, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s28, s15, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v4
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v11, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v49
; GFX11-FAKE16-NEXT: s_lshl_b32 s15, s15, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s28
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v5
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v50
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v5, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s15, s14, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s14, s14, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v5
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v4, v11 :: v_dual_add_nc_u32 v5, v7, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v9, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v11, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-FAKE16-NEXT: s_lshl_b32 s13, s13, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v48
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v6, v7
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v4, v11 :: v_dual_add_nc_u32 v6, v10, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v9, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v54, 16, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v52
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v3, 16, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v6
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v10, v12
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v6, v8, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v7, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s13
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v53
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-FAKE16-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s12, s12, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v12, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v11, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v6, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
; GFX11-FAKE16-NEXT: s_lshl_b32 s11, s11, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v6, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v13, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v11, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v11
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v55
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v3
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v13, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v5, 16, v11
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v12, v14
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v8, v10, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v14 :: v_dual_add_nc_u32 v8, v9, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v12, v13
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s11
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v65
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v8, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v68, 16, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v14, v12
; GFX11-FAKE16-NEXT: s_and_b32 s11, s10, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v66
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s10, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s10
-; GFX11-FAKE16-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v7, 16, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s10
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v65
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v13, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v15, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v8, v15, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: s_and_b32 s10, s9, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v70, 16, v7
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v10, v12, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v67
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v11, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-FAKE16-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s8, s8, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v11
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v10, v17, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v71, 16, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s8
-; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v13, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v69
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s9
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v9, 16, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s8
-; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v15, v16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v16, v14
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v17, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v12, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v12
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v10, v17, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v82, 16, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v12, v14, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_and_b32 v9, 0xffff, v80
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v85, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v17
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v17
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v16, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s6, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v15
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v17, v12, v19 :: v_dual_add_nc_u32 v14, v18, v16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s6
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v12, v19 :: v_dual_add_nc_u32 v14, v17, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s6, s5, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v13, v13, v21 :: v_dual_add_nc_u32 v14, v16, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s5
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v82, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v17
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v80
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v11, 16, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v20, v21
; GFX11-FAKE16-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s4
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v81
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v85, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v83
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v19, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v21, v22
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v15
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v16, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v19, v20
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s4, s1, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v13, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v49
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v20, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v15
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v15, v16, v19
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-FAKE16-NEXT: s_and_b32 s1, s0, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v84
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v50, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v98, 16, v13
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v84
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v15
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v87
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v23, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v87, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v18, v20, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v21, v23
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v13, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v100, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v96
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v51
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v101, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v99
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v96
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v23, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v33, v99, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v23, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v97
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v18, v20, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v21, v23
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v32, v13, 16, v14
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v102, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v103
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v114, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v112
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v98
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v117, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v113
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v39, v102, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v118, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v15
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v22
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v19 :: v_dual_add_nc_u32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v100
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v24, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v27, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v115
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v21, vcc_lo
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v14, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v13
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v130, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v19
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v26
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v19, 16, 1
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v101
-; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v22, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v19
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v22, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v15, v20
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v116
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v53
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v128
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v131, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v15, v19, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v112
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v179, v113, 16, v21
; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v14
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v134, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v178, v13, 16, v23
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v119
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v14
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v103
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v15
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v116, 16, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v133, 16, v20
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v21, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v22, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v23, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v22, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v25, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v181
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v26, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v181
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v15
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v22, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v115
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v21, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v86, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v21, v28, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v132
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v83
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v129
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v18
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v14, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v114
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v19, v14
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v165, v118, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v145, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v13
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v23, v21
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v19, v24 :: v_dual_add_nc_u32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v27, v22
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v22, v20
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v26, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v27, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v19, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v117
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v18
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v135
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v144
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v183, v149, 16, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v162, v129, 16, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v23, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v119
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v19, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v147, 16, v19
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v21, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v66
; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v28, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v25, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v26, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v27, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v18, v21, v23 :: v_dual_add_nc_u32 v21, v27, v24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v28, v19
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v29, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v27, v29
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v30, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v26, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v29
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v30, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v164, v14, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v15, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v27, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v27, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v26
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
+; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v25, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v29, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v21, v28 :: v_dual_add_nc_u32 v28, v31, v27
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v34, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, 0x400000, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v31, v35, v29
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v28
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v24, v24, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v34, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v31, 0x7fff, v31
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v29
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v28, v36, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v24, 0x7fff, v24
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v30, v30, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v21
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v31, v37, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v30
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v29
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v24, v35, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v128
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v28, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v130
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v131
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v167, v133, 16, v23
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v166, v19, 16, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v24
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff, v132
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v161, v15, 16, v28
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v13, 16, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v146, v135, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[166:167]
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v145, v21, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[161:162]
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v27, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v29, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v18, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v28, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v22, v32 :: v_dual_add_nc_u32 v18, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v26, v26, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v27, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v68
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v18, v29, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v146
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v148
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v160
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v22, v26, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v151
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v97, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v163, 16, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v182, v162, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v161
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v177, v165, 16, v14
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v55, 16, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v81, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v176, v166, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v164, 16, v18
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v150, 16, v13
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v67, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[45:46]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[176:177]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[43:44]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[180:181]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[37:38]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[164:165]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[178:179]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[182:183]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[30:31]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[180:181]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[38:39]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[25:26]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[40:41]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[23:24]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 8, v180
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v183
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v40
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v43
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[145:146]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[32:33]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v46
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v46
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v44
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v44
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 24, v146
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 8, v146
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v145
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v145
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 24, v167
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v167
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v166
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 8, v166
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v161
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v161
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 24, v165
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v165
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v164
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v164
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v178
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v178
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 24, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v33
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v33
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 24, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v176
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v12
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 24, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
; GFX11-FAKE16-NEXT: s_branch .LBB91_5
; GFX11-FAKE16-NEXT: .LBB91_3:
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
-; GFX11-FAKE16-NEXT: s_mov_b32 s97, -1
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
@@ -159029,45 +159025,45 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
@@ -159159,290 +159155,287 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: s_branch .LBB91_2
; GFX11-FAKE16-NEXT: .LBB91_4:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s2 :: v_dual_mov_b32 v97, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v103, s1
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v50, s29
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s1 :: v_dual_mov_b32 v81, s7
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s26 :: v_dual_mov_b32 v131, s27
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v135, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s11 :: v_dual_mov_b32 v160, s26
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v151, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s24 :: v_dual_mov_b32 v146, s25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v48, s41
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v134, s24 :: v_dual_mov_b32 v117, s23
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v128, s25 :: v_dual_mov_b32 v119, s20
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v133, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v148, s22 :: v_dual_mov_b32 v135, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s20 :: v_dual_mov_b32 v129, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v130, s22 :: v_dual_mov_b32 v115, s18
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s21 :: v_dual_mov_b32 v103, s19
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s13 :: v_dual_mov_b32 v132, s18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v119, s19 :: v_dual_mov_b32 v128, s16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v129, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s2 :: v_dual_mov_b32 v164, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s16 :: v_dual_mov_b32 v101, s17
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v98, s3 :: v_dual_mov_b32 v83, s6
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s17 :: v_dual_mov_b32 v113, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s4 :: v_dual_mov_b32 v96, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s4 :: v_dual_mov_b32 v69, s10
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s5 :: v_dual_mov_b32 v67, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s6 :: v_dual_mov_b32 v84, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s8 :: v_dual_mov_b32 v80, s10
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v116, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s8 :: v_dual_mov_b32 v65, s13
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v70, s9 :: v_dual_mov_b32 v55, s14
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v113, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s9 :: v_dual_mov_b32 v68, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v101, s100 :: v_dual_mov_b32 v98, s99
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 8
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s12 :: v_dual_mov_b32 v53, s15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s28 :: v_dual_mov_b32 v49, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s103 :: v_dual_mov_b32 v86, s98
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s102 :: v_dual_mov_b32 v82, s97
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v102, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 9
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s99 :: v_dual_mov_b32 v82, s101
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s100 :: v_dual_mov_b32 v68, s103
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v99, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s101 :: v_dual_mov_b32 v70, s96
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s14 :: v_dual_mov_b32 v67, s87
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 10
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s102 :: v_dual_mov_b32 v64, s104
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, vcc_hi :: v_dual_mov_b32 v51, s42
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v53, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s86 :: v_dual_mov_b32 v55, s85
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 11
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s84 :: v_dual_mov_b32 v15, s87
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s86 :: v_dual_mov_b32 v16, s85
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s29 :: v_dual_mov_b32 v52, s84
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v102, s42 :: v_dual_mov_b32 v49, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s83 :: v_dual_mov_b32 v133, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 12
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s80 :: v_dual_mov_b32 v32, s68
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s83 :: v_dual_mov_b32 v12, s71
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s41 :: v_dual_mov_b32 v48, s82
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s81 :: v_dual_mov_b32 v29, s69
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v144, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v134, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 13
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s82 :: v_dual_mov_b32 v38, s64
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s81 :: v_dual_mov_b32 v10, s67
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v37, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s71 :: v_dual_mov_b32 v16, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s66 :: v_dual_mov_b32 v24, s55
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v131, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 14
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s70 :: v_dual_mov_b32 v164, s66
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s69 :: v_dual_mov_b32 v8, s55
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s104 :: v_dual_mov_b32 v17, s68
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s65 :: v_dual_mov_b32 v11, s70
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v30, s52
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v130, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s65 :: v_dual_mov_b32 v178, s54
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s52 :: v_dual_mov_b32 v166, s48
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s67 :: v_dual_mov_b32 v10, s54
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s64 :: v_dual_mov_b32 v8, s51
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 16
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v6, s51
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s50 :: v_dual_mov_b32 v180, s36
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s49 :: v_dual_mov_b32 v6, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v40, s36
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v117, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 17
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v183, s49 :: v_dual_mov_b32 v46, s38
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v179, s39 :: v_dual_mov_b32 v44, s37
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s38 :: v_dual_mov_b32 v38, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v43, s50 :: v_dual_mov_b32 v44, s39
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v114, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 18
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v43, s34 :: v_dual_mov_b32 v4, s35
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s62 :: v_dual_mov_b32 v28, s60
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v45, s34 :: v_dual_mov_b32 v4, s35
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s62 :: v_dual_mov_b32 v26, s72
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s72 :: v_dual_mov_b32 v30, s56
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s58 :: v_dual_mov_b32 v34, s46
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s60 :: v_dual_mov_b32 v28, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 20
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s74 :: v_dual_mov_b32 v14, s76
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v19, s88
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v160, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 21
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v21, s92
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, s30
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v151, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s30 :: v_dual_mov_b32 v178, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 22
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s43
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v26, s98
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s96 :: v_dual_mov_b32 v177, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 23
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v177, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 25
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 26
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 27
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 28
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 29
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 30
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 31
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v63, s43 :: v_dual_mov_b32 v72, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v35, s44
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v34, s44
; GFX11-FAKE16-NEXT: v_readlane_b32 s1, v77, 1
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v35, s0
; GFX11-FAKE16-NEXT: .LBB91_5: ; %end
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v72, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v97, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v97, v99, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v99, v96, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v61, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v117, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v112, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v114, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v130, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v103, v72, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v96, v102, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v100, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v98, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v58, 16, v96
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v96, v36, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v57, v34, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, v100, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v112, v56, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v30, v42, v30, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v116, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v114, v118, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v112
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v115, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, v35, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v134, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v113, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v130, 16, v114
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v113, v103, v117
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, v115, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v33, v128, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v131, v58, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v113, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v97, v99, v97
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, v102, v58
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v115, v181, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v112, 16, v100
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, v34, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v177, v29, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v101, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v103, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v102, v102, v30
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v118, v176, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v30, v119, v167, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v163, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v32, v147, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v133, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v118, v130
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v116, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v132, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v32
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v119, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v33, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v150, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v145, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v35, v34
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v116, v117
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v118, v103
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v144, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v162, v27, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v101, v36, v35
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, v103, v112
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v114, v165, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v130, v162, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v129, v183, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[96:99], off
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[100:103], off offset:16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v96, v30, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v129, v160, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v97, v34, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, v35, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v117, v151, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v150, v27, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v133, v149, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v146, v23, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v178, v21, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v30, v134, v148, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v67, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v117, v148, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v128, v147, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v132, v145, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, v28, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v135, v144, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v55, v5, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v164, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v103, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v149, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v116, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v164, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v163, v179, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v66, v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v81, v20, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v39, v19, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v46, v1, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v30, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v34, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v35, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v131, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v85, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v117, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v135, v180, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v30, v51, v43, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v66, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v161, v178, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v166, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v146, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v50, v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v68, v7, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v68, v161, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v69, v9, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v33, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v70, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v80, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v97, v18, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v49, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v27, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v103, v26
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v165, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v112, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v151, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v48, v45, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v49, v44, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v48, v4, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v30
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v23, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v54, v180, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v20
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v65, v8, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v71, v38, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v80, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v82, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v83, v11, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v82, v32, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v41, v3, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v34, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v64, v166, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v50, v179, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v67, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v55, v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v48, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v52, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v64, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v69, v10, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v18
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v31, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v100, v14, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v85, v25, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v26, v13, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v87, v24, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v52, v183, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v102, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v101, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v160, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v53, v43, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v53, v6, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v12, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v28, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v36
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v51, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v48
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v54, v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v71, v12, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v83, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v87, v16, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v81, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v84, v17, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v86, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v99, v22, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v84, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v96, v15, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v36, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v34
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v113, v114
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v39, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v37
; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v17, v19
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v22
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v23, v20
; GFX11-FAKE16-NEXT: s_clause 0x5
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[96:99], off offset:32
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:48
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
index 96be2a0deb9b4..5d3c9016ac125 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
@@ -24080,62 +24080,62 @@ define <16 x i8> @bitcast_v8bf16_to_v16i8(<8 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_add3_u32 v4, v4, v0, s6
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v18
-; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add3_u32 v5, v5, v4, s6
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v17
-; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add3_u32 v6, v6, v5, s6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v17
+; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v18
+; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc
+; GFX9-NEXT: v_bfe_u32 v5, v0, 16, 1
+; GFX9-NEXT: v_add3_u32 v5, v5, v0, s6
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v0
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc
+; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v17
; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
; GFX9-NEXT: v_add3_u32 v7, v7, v6, s6
; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v16
-; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v7, v8, vcc
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add3_u32 v7, v7, v6, s6
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v10, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v16
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v17
+; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add3_u32 v8, v8, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v16
; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX9-NEXT: v_bfe_u32 v10, v7, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc
; GFX9-NEXT: v_add3_u32 v10, v10, v7, s6
; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v16
+; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX9-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc
+; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1
+; GFX9-NEXT: v_add3_u32 v11, v11, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc
; GFX9-NEXT: v_perm_b32 v1, v2, v3, s7
-; GFX9-NEXT: v_perm_b32 v0, v0, v4, s7
-; GFX9-NEXT: v_perm_b32 v8, v5, v9, s7
-; GFX9-NEXT: v_perm_b32 v7, v6, v10, s7
+; GFX9-NEXT: v_perm_b32 v0, v4, v5, s7
+; GFX9-NEXT: v_perm_b32 v8, v6, v9, s7
+; GFX9-NEXT: v_perm_b32 v7, v10, v11, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v4
; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[7:8]
; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v8
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: .LBB108_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -24390,21 +24390,21 @@ define <16 x i8> @bitcast_v8bf16_to_v16i8(<8 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v5, v12, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v0, v13, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v0, v13, vcc_lo
; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v9, 0x7060302
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v9, v11, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -24687,138 +24687,136 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX9-NEXT: s_cbranch_scc0 .LBB109_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s12, s19, 24
-; GFX9-NEXT: s_lshr_b32 s23, s19, 16
-; GFX9-NEXT: s_lshr_b32 s15, s19, 8
-; GFX9-NEXT: s_lshr_b32 s21, s18, 16
-; GFX9-NEXT: s_lshr_b32 s20, s18, 8
+; GFX9-NEXT: s_lshr_b32 s22, s19, 16
+; GFX9-NEXT: s_lshr_b32 s13, s19, 8
+; GFX9-NEXT: s_lshr_b32 s23, s18, 16
+; GFX9-NEXT: s_lshr_b32 s15, s18, 8
; GFX9-NEXT: s_lshr_b32 s10, s17, 24
-; GFX9-NEXT: s_lshr_b32 s22, s17, 16
+; GFX9-NEXT: s_lshr_b32 s20, s17, 16
; GFX9-NEXT: s_lshr_b32 s11, s17, 8
-; GFX9-NEXT: s_lshr_b32 s14, s16, 16
-; GFX9-NEXT: s_lshr_b32 s13, s16, 8
+; GFX9-NEXT: s_lshr_b32 s21, s16, 16
+; GFX9-NEXT: s_lshr_b32 s14, s16, 8
; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24
; GFX9-NEXT: s_cbranch_execnz .LBB109_4
; GFX9-NEXT: .LBB109_2: ; %cmp.true
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s17
-; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX9-NEXT: v_mov_b32_e32 v1, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s4, s17, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v17
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s16
-; GFX9-NEXT: v_lshl_or_b32 v2, v6, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0
+; GFX9-NEXT: v_lshl_or_b32 v19, v6, 16, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s4, s16, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v0
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v0
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v0
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v0
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s19
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s4, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v18, v2, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s4, v1
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: s_lshl_b32 s4, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s4, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v4
-; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s4, v1
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v3
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v16
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s18
-; GFX9-NEXT: v_lshl_or_b32 v10, v14, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s4, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: s_lshl_b32 s4, s18, 16
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_add_f32_e32 v3, s4, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc
-; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v3
+; GFX9-NEXT: v_lshl_or_b32 v21, v14, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s4, v1
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v8
-; GFX9-NEXT: v_lshl_or_b32 v9, v4, 16, v3
-; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX9-NEXT: s_lshl_b32 s4, s18, 16
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
+; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v1
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v8
+; GFX9-NEXT: v_lshl_or_b32 v20, v10, 16, v1
+; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[20:21]
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v18
; GFX9-NEXT: s_branch .LBB109_5
; GFX9-NEXT: .LBB109_3:
-; GFX9-NEXT: ; implicit-def: $sgpr13
; GFX9-NEXT: ; implicit-def: $sgpr14
+; GFX9-NEXT: ; implicit-def: $sgpr21
; GFX9-NEXT: ; implicit-def: $sgpr4
; GFX9-NEXT: ; implicit-def: $sgpr11
-; GFX9-NEXT: ; implicit-def: $sgpr22
-; GFX9-NEXT: ; implicit-def: $sgpr10
; GFX9-NEXT: ; implicit-def: $sgpr20
-; GFX9-NEXT: ; implicit-def: $sgpr21
-; GFX9-NEXT: ; implicit-def: $sgpr6
+; GFX9-NEXT: ; implicit-def: $sgpr10
; GFX9-NEXT: ; implicit-def: $sgpr15
; GFX9-NEXT: ; implicit-def: $sgpr23
+; GFX9-NEXT: ; implicit-def: $sgpr6
+; GFX9-NEXT: ; implicit-def: $sgpr13
+; GFX9-NEXT: ; implicit-def: $sgpr22
; GFX9-NEXT: ; implicit-def: $sgpr12
; GFX9-NEXT: s_branch .LBB109_2
; GFX9-NEXT: .LBB109_4:
; GFX9-NEXT: v_mov_b32_e32 v8, s18
+; GFX9-NEXT: v_mov_b32_e32 v10, s23
; GFX9-NEXT: v_mov_b32_e32 v16, s19
-; GFX9-NEXT: v_mov_b32_e32 v14, s23
+; GFX9-NEXT: v_mov_b32_e32 v14, s22
; GFX9-NEXT: v_mov_b32_e32 v0, s16
+; GFX9-NEXT: v_mov_b32_e32 v2, s21
; GFX9-NEXT: v_mov_b32_e32 v17, s17
-; GFX9-NEXT: v_mov_b32_e32 v6, s22
-; GFX9-NEXT: v_mov_b32_e32 v10, s21
-; GFX9-NEXT: v_mov_b32_e32 v9, s20
+; GFX9-NEXT: v_mov_b32_e32 v6, s20
+; GFX9-NEXT: v_mov_b32_e32 v9, s15
; GFX9-NEXT: v_mov_b32_e32 v15, s12
-; GFX9-NEXT: v_mov_b32_e32 v13, s15
-; GFX9-NEXT: v_mov_b32_e32 v2, s14
-; GFX9-NEXT: v_mov_b32_e32 v1, s13
+; GFX9-NEXT: v_mov_b32_e32 v13, s13
+; GFX9-NEXT: v_mov_b32_e32 v1, s14
; GFX9-NEXT: v_mov_b32_e32 v7, s10
; GFX9-NEXT: v_mov_b32_e32 v5, s11
; GFX9-NEXT: v_mov_b32_e32 v11, s6
@@ -24836,15 +24834,15 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s18, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s18, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s0, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s8
@@ -24854,120 +24852,124 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s0
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s4, 0, s3
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s1, 0, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s3, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v10, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v4
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v4
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v10
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v17.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v9, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v3, v2 :: v_dual_add_nc_u32 v1, v8, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v8, v5
; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s0, 0, s2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v6.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v2.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v14.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v11, v12, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v16.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v14.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v16.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v21
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v8.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v3.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v8.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v10.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[20:21]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v20
; GFX11-TRUE16-NEXT: s_branch .LBB109_5
; GFX11-TRUE16-NEXT: .LBB109_3:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr16
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr17
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr16
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr18
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr17
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
; GFX11-TRUE16-NEXT: s_branch .LBB109_2
; GFX11-TRUE16-NEXT: .LBB109_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v17, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v9, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v13, s14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s17 :: v_dual_mov_b32 v1, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v7, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v5, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s18 :: v_dual_mov_b32 v9, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v13, s12
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v7, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v5, s10
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s6
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s4
; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
@@ -24983,15 +24985,15 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s3, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s3, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s3, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s2, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s2, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s1, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s1, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s0, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s0, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s8
@@ -25028,8 +25030,8 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v2, v5
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v7, v9, vcc_lo
@@ -25044,77 +25046,77 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3
; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v9, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v9
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v10, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v2
-; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v3, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v17
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v12, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v4, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v6, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v4
; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v11
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v5
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v10, v14, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v17
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v12, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v2, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v19
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v9
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v6, 16, v1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v4, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v14, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v10
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v3, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v14, 16, v3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v10, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[18:19]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v21
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[20:21]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v20
; GFX11-FAKE16-NEXT: s_branch .LBB109_5
; GFX11-FAKE16-NEXT: .LBB109_3:
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr16
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr18
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr17
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
; GFX11-FAKE16-NEXT: s_branch .LBB109_2
; GFX11-FAKE16-NEXT: .LBB109_4:
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v17, s1
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v9, s15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s11
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v13, s14
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s17 :: v_dual_mov_b32 v1, s12
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v7, s9
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v5, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s18 :: v_dual_mov_b32 v9, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v13, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s16 :: v_dual_mov_b32 v7, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s15 :: v_dual_mov_b32 v5, s10
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s4
; GFX11-FAKE16-NEXT: .LBB109_5: ; %end
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
index 4437990317bd6..8b7a5bbb900b2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
@@ -39640,14 +39640,14 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) {
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v33, v5
; GFX9-NEXT: v_mov_b32_e32 v32, v4
-; GFX9-NEXT: v_mov_b32_e32 v35, v3
-; GFX9-NEXT: v_mov_b32_e32 v34, v2
+; GFX9-NEXT: v_mov_b32_e32 v36, v3
+; GFX9-NEXT: v_mov_b32_e32 v35, v2
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8
; GFX9-NEXT: ; implicit-def: $vgpr38
; GFX9-NEXT: ; implicit-def: $vgpr2
; GFX9-NEXT: ; implicit-def: $vgpr5
+; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr36
; GFX9-NEXT: ; implicit-def: $vgpr9
; GFX9-NEXT: ; implicit-def: $vgpr10
; GFX9-NEXT: ; implicit-def: $vgpr13
@@ -39681,19 +39681,19 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0
; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33]
-; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35]
+; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[35:36]
; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
; GFX9-NEXT: .LBB108_2: ; %Flow
; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -39701,170 +39701,170 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) {
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
; GFX9-NEXT: s_movk_i32 s6, 0x7fff
-; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_add3_u32 v3, v3, v2, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v3, v3, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc
+; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v0
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v8, v3, v4, vcc
-; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v3, vcc
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; GFX9-NEXT: v_add3_u32 v3, v3, v1, s6
+; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v3, v5, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v5, vcc
; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
+; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc
-; GFX9-NEXT: v_perm_b32 v3, v0, v5, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v35
+; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v36
; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc
; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v0
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v9, vcc
-; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v35
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v8, vcc
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v36
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v9, v9, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v1
+; GFX9-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v8, v8, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v9, v10, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v34
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v10, v10, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v34
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v10, v11, vcc
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v10, v10, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; GFX9-NEXT: v_perm_b32 v11, v9, v13, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v33
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v10, v10, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v33
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v14, v10, v14, vcc
-; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v10, v10, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v32
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v10, v15, vcc
-; GFX9-NEXT: v_bfe_u32 v15, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v15, v15, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v32
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v18, v15, v16, vcc
-; GFX9-NEXT: v_bfe_u32 v15, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v15, v15, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v15, v16, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v10, v8, v9, vcc
+; GFX9-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v8, v8, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v8, v9, vcc
+; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v35
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v9, v9, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v33
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v9, v11, vcc
+; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v9, v9, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v33
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v14, v9, v11, vcc
+; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v9, v9, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v32
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v9, v11, vcc
+; GFX9-NEXT: v_bfe_u32 v11, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v11, v11, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v32
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v16, v11, v12, vcc
+; GFX9-NEXT: v_bfe_u32 v11, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v11, v11, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v11, v12, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX9-NEXT: v_bfe_u32 v16, v15, 16, 1
+; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1
; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX9-NEXT: v_add3_u32 v16, v16, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v15
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_bfe_u32 v15, v7, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v19, v16, v19, vcc
-; GFX9-NEXT: v_add3_u32 v15, v15, v7, s6
-; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v7
+; GFX9-NEXT: v_add3_u32 v12, v12, v11, s6
+; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v11
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
+; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v18, v12, v18, vcc
+; GFX9-NEXT: v_add3_u32 v11, v11, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v15, v16, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v6
+; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX9-NEXT: v_bfe_u32 v16, v15, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v19, v11, v12, vcc
+; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1
; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX9-NEXT: v_add3_u32 v16, v16, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v15
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_bfe_u32 v15, v6, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v20, v16, v20, vcc
-; GFX9-NEXT: v_add3_u32 v15, v15, v6, s6
-; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v6
+; GFX9-NEXT: v_add3_u32 v11, v11, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v20, v11, v12, vcc
+; GFX9-NEXT: v_add3_u32 v7, v7, v6, s6
+; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v6
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v15, v16, vcc
-; GFX9-NEXT: v_perm_b32 v4, v8, v2, s7
-; GFX9-NEXT: v_perm_b32 v12, v1, v0, s7
-; GFX9-NEXT: v_perm_b32 v10, v17, v14, s7
-; GFX9-NEXT: v_perm_b32 v9, v9, v18, s7
-; GFX9-NEXT: v_perm_b32 v16, v7, v19, s7
-; GFX9-NEXT: v_perm_b32 v15, v6, v20, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v19
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: v_cndmask_b32_e32 v21, v7, v11, vcc
+; GFX9-NEXT: v_perm_b32 v9, v15, v14, s7
+; GFX9-NEXT: v_perm_b32 v8, v17, v16, s7
+; GFX9-NEXT: v_perm_b32 v12, v19, v18, s7
+; GFX9-NEXT: v_perm_b32 v11, v21, v20, s7
+; GFX9-NEXT: v_perm_b32 v38, v10, v0, s7
+; GFX9-NEXT: v_perm_b32 v37, v13, v1, s7
+; GFX9-NEXT: v_perm_b32 v49, v3, v4, s7
+; GFX9-NEXT: v_perm_b32 v48, v2, v5, s7
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v11
+; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[11:12]
+; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[8:9]
+; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[37:38]
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[48:49]
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v18
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v15
-; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[15:16]
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v9
-; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v11
-; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX9-NEXT: .LBB108_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: v_mov_b32_e32 v4, v1
-; GFX9-NEXT: v_mov_b32_e32 v8, v34
-; GFX9-NEXT: v_mov_b32_e32 v12, v35
+; GFX9-NEXT: v_mov_b32_e32 v8, v35
+; GFX9-NEXT: v_mov_b32_e32 v12, v36
; GFX9-NEXT: v_mov_b32_e32 v16, v32
; GFX9-NEXT: v_mov_b32_e32 v20, v33
; GFX9-NEXT: v_mov_b32_e32 v24, v6
; GFX9-NEXT: v_mov_b32_e32 v28, v7
; GFX9-NEXT: v_mov_b32_e32 v1, v38
-; GFX9-NEXT: v_mov_b32_e32 v6, v37
-; GFX9-NEXT: v_mov_b32_e32 v7, v36
+; GFX9-NEXT: v_mov_b32_e32 v6, v34
+; GFX9-NEXT: v_mov_b32_e32 v7, v37
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v32i8:
@@ -40181,13 +40181,12 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v39
; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v38
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v38
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v34
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v36
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v0, 0x40c00000, v0
; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v36
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v34
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v34
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v1, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v0, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
@@ -40206,135 +40205,135 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v6, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v2, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, 0x400000, v2
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v37
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v37
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v37
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v2, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v11, v7, v0 :: v_dual_lshlrev_b32 v6, 16, v37
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v7, v0, vcc_lo
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v8 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v6 :: v_dual_lshlrev_b32 v7, 16, v36
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v36
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v9, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v9, v9, v7, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v3, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v5, v4, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v0, v0, v2, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v8, v10, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v9, v11, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v9, v12, v3, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v1, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v8, v8, v2, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v6
; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v11, v6, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v9, v10, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v12
-; GFX11-FAKE16-NEXT: v_add3_u32 v12, v13, v7, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_add3_u32 v9, v9, v6, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v5, v4, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v8, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add3_u32 v10, v13, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v35
+; GFX11-FAKE16-NEXT: v_perm_b32 v0, v3, v11, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v9, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v7
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v14
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v6, v2, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v10, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v9, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v35
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v12, v13 :: v_dual_add_f32 v12, 0x40c00000, v14
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-FAKE16-NEXT: v_add3_u32 v13, v15, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v13
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX11-FAKE16-NEXT: v_add3_u32 v13, v14, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v7, 16, 1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v13, v13, v14 :: v_dual_add_f32 v14, 0x40c00000, v16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add3_u32 v16, v17, v12, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v33
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v13
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add3_u32 v9, v15, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_add3_u32 v10, v19, v14, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v20, v9, v15 :: v_dual_add_f32 v9, 0x40c00000, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v16, v18 :: v_dual_and_b32 v17, 0xffff0000, v33
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v32
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v10, v15 :: v_dual_add_f32 v15, 0x40c00000, v17
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v17, 0x40c00000, v18
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v13, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v15
+; GFX11-FAKE16-NEXT: v_add3_u32 v14, v16, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v34
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v13, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_add3_u32 v7, v16, v10, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v15 :: v_dual_add_f32 v15, 0x40c00000, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add3_u32 v17, v18, v13, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v33
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v7, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v14
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add3_u32 v16, v16, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v17, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v16, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v16, v19, v15, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_add3_u32 v16, v20, v15, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v13, v17, v19 :: v_dual_lshlrev_b32 v20, 16, v32
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v33
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v18
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v17, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v16, v19, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v32
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v19, v18, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v17, v21, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v17, v16, v17 :: v_dual_add_f32 v16, 0x40c00000, v19
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v19, 0x40c00000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v18, v18, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v17
-; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add3_u32 v9, v9, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v20, v13, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v20, v21, v16, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v32
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v19, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v10, v14, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v20, v20, v21 :: v_dual_add_f32 v15, 0x40c00000, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v22, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v10
+; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v15, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v17, v13, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v9, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v14, v12, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v7, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v9, v12, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v20, v18, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v21, v19, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v17, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[15:16]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[23:24]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX11-FAKE16-NEXT: .LBB108_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
@@ -40861,26 +40860,26 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX9-NEXT: s_cmp_lg_u32 s24, 0
; GFX9-NEXT: s_cbranch_scc0 .LBB109_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s42, s23, 24
-; GFX9-NEXT: s_lshr_b32 s59, s23, 16
-; GFX9-NEXT: s_lshr_b32 s45, s23, 8
-; GFX9-NEXT: s_lshr_b32 s47, s22, 16
-; GFX9-NEXT: s_lshr_b32 s46, s22, 8
-; GFX9-NEXT: s_lshr_b32 s28, s21, 24
-; GFX9-NEXT: s_lshr_b32 s58, s21, 16
-; GFX9-NEXT: s_lshr_b32 s41, s21, 8
-; GFX9-NEXT: s_lshr_b32 s44, s20, 16
-; GFX9-NEXT: s_lshr_b32 s43, s20, 8
+; GFX9-NEXT: s_lshr_b32 s29, s23, 24
+; GFX9-NEXT: s_lshr_b32 s58, s23, 16
+; GFX9-NEXT: s_lshr_b32 s41, s23, 8
+; GFX9-NEXT: s_lshr_b32 s59, s22, 16
+; GFX9-NEXT: s_lshr_b32 s43, s22, 8
+; GFX9-NEXT: s_lshr_b32 s26, s21, 24
+; GFX9-NEXT: s_lshr_b32 s56, s21, 16
+; GFX9-NEXT: s_lshr_b32 s28, s21, 8
+; GFX9-NEXT: s_lshr_b32 s57, s20, 16
+; GFX9-NEXT: s_lshr_b32 s42, s20, 8
; GFX9-NEXT: s_lshr_b32 s24, s19, 24
-; GFX9-NEXT: s_lshr_b32 s57, s19, 16
-; GFX9-NEXT: s_lshr_b32 s27, s19, 8
-; GFX9-NEXT: s_lshr_b32 s40, s18, 16
-; GFX9-NEXT: s_lshr_b32 s29, s18, 8
+; GFX9-NEXT: s_lshr_b32 s46, s19, 16
+; GFX9-NEXT: s_lshr_b32 s25, s19, 8
+; GFX9-NEXT: s_lshr_b32 s47, s18, 16
+; GFX9-NEXT: s_lshr_b32 s40, s18, 8
; GFX9-NEXT: s_lshr_b32 s14, s17, 24
-; GFX9-NEXT: s_lshr_b32 s56, s17, 16
+; GFX9-NEXT: s_lshr_b32 s44, s17, 16
; GFX9-NEXT: s_lshr_b32 s15, s17, 8
-; GFX9-NEXT: s_lshr_b32 s26, s16, 16
-; GFX9-NEXT: s_lshr_b32 s25, s16, 8
+; GFX9-NEXT: s_lshr_b32 s45, s16, 16
+; GFX9-NEXT: s_lshr_b32 s27, s16, 8
; GFX9-NEXT: s_lshr_b64 s[10:11], s[22:23], 24
; GFX9-NEXT: s_lshr_b64 s[8:9], s[20:21], 24
; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
@@ -40888,240 +40887,236 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX9-NEXT: s_cbranch_execnz .LBB109_4
; GFX9-NEXT: .LBB109_2: ; %cmp.true
; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000
-; GFX9-NEXT: v_mov_b32_e32 v5, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v5
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX9-NEXT: v_mov_b32_e32 v1, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s4, s17, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v5
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0
; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v35
; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v4, v6, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v5
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
-; GFX9-NEXT: s_lshl_b32 s4, s16, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v5
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v0
+; GFX9-NEXT: s_lshl_b32 s4, s16, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v0
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v3, v1, 16, v2
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v5
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
-; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v7, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s4, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v5
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
-; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5
+; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v34
; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v2, v14, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v5
-; GFX9-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v1
+; GFX9-NEXT: v_lshl_or_b32 v12, v14, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
; GFX9-NEXT: s_lshl_b32 s4, s18, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v5
-; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
-; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
+; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v8
; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v5
-; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v9, v9, v7
-; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v10, vcc
+; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
; GFX9-NEXT: s_lshl_b32 s4, s21, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v5
-; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v9, v9, v7
-; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v10, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5
+; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v33
; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v10, v22, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v5
-; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v9, v9, v7
-; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
-; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_lshl_or_b32 v20, v22, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
; GFX9-NEXT: s_lshl_b32 s4, s20, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc
-; GFX9-NEXT: v_add_f32_e32 v9, s4, v5
-; GFX9-NEXT: v_bfe_u32 v11, v9, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v11, v11, v9
-; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11
-; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v11, v12, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v5
+; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v16
; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v9, v7, 16, v9
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v5
-; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v11, v11, v7
-; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11
-; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v11, v12, vcc
+; GFX9-NEXT: v_lshl_or_b32 v19, v18, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s4, v1
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; GFX9-NEXT: s_lshl_b32 s4, s23, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX9-NEXT: v_add_f32_e32 v7, s4, v5
-; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v11, v11, v7
-; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11
-; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc
+; GFX9-NEXT: v_add_f32_e32 v7, s4, v1
+; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v9, v9, v7
+; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9
+; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v7
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v11, v12, vcc
-; GFX9-NEXT: v_add_f32_e32 v11, s4, v5
-; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v12, v12, v11
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v13, vcc
+; GFX9-NEXT: v_add_f32_e32 v9, s4, v1
+; GFX9-NEXT: v_bfe_u32 v13, v9, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v13, v13, v9
; GFX9-NEXT: s_lshl_b32 s4, s22, 16
-; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12
-; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; GFX9-NEXT: v_add_f32_e32 v5, s4, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc
-; GFX9-NEXT: v_bfe_u32 v12, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v12, v12, v5
-; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12
-; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v12, v13, vcc
+; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13
+; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v9
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
+; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v13, v15, vcc
+; GFX9-NEXT: v_bfe_u32 v13, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v13, v13, v1
+; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13
+; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v13, v15, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v5
-; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v24
-; GFX9-NEXT: v_lshl_or_b32 v11, v11, 16, v5
-; GFX9-NEXT: v_lshl_or_b32 v12, v30, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v11
-; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v9
-; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v1
-; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v1
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v32
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9
+; GFX9-NEXT: v_lshl_or_b32 v28, v30, 16, v1
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v24
+; GFX9-NEXT: v_lshl_or_b32 v3, v2, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v27, v26, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v27
+; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[27:28]
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[19:20]
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v11
+; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v3
; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
; GFX9-NEXT: s_branch .LBB109_5
; GFX9-NEXT: .LBB109_3:
-; GFX9-NEXT: ; implicit-def: $sgpr25
-; GFX9-NEXT: ; implicit-def: $sgpr26
+; GFX9-NEXT: ; implicit-def: $sgpr27
+; GFX9-NEXT: ; implicit-def: $sgpr45
; GFX9-NEXT: ; implicit-def: $sgpr4
; GFX9-NEXT: ; implicit-def: $sgpr15
-; GFX9-NEXT: ; implicit-def: $sgpr56
+; GFX9-NEXT: ; implicit-def: $sgpr44
; GFX9-NEXT: ; implicit-def: $sgpr14
-; GFX9-NEXT: ; implicit-def: $sgpr29
; GFX9-NEXT: ; implicit-def: $sgpr40
+; GFX9-NEXT: ; implicit-def: $sgpr47
; GFX9-NEXT: ; implicit-def: $sgpr6
-; GFX9-NEXT: ; implicit-def: $sgpr27
-; GFX9-NEXT: ; implicit-def: $sgpr57
+; GFX9-NEXT: ; implicit-def: $sgpr25
+; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr24
-; GFX9-NEXT: ; implicit-def: $sgpr43
-; GFX9-NEXT: ; implicit-def: $sgpr44
+; GFX9-NEXT: ; implicit-def: $sgpr42
+; GFX9-NEXT: ; implicit-def: $sgpr57
; GFX9-NEXT: ; implicit-def: $sgpr8
-; GFX9-NEXT: ; implicit-def: $sgpr41
-; GFX9-NEXT: ; implicit-def: $sgpr58
; GFX9-NEXT: ; implicit-def: $sgpr28
-; GFX9-NEXT: ; implicit-def: $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr47
-; GFX9-NEXT: ; implicit-def: $sgpr10
-; GFX9-NEXT: ; implicit-def: $sgpr45
+; GFX9-NEXT: ; implicit-def: $sgpr56
+; GFX9-NEXT: ; implicit-def: $sgpr26
+; GFX9-NEXT: ; implicit-def: $sgpr43
; GFX9-NEXT: ; implicit-def: $sgpr59
-; GFX9-NEXT: ; implicit-def: $sgpr42
+; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr41
+; GFX9-NEXT: ; implicit-def: $sgpr58
+; GFX9-NEXT: ; implicit-def: $sgpr29
; GFX9-NEXT: s_branch .LBB109_2
; GFX9-NEXT: .LBB109_4:
; GFX9-NEXT: v_mov_b32_e32 v24, s22
+; GFX9-NEXT: v_mov_b32_e32 v26, s59
; GFX9-NEXT: v_mov_b32_e32 v32, s23
-; GFX9-NEXT: v_mov_b32_e32 v30, s59
+; GFX9-NEXT: v_mov_b32_e32 v30, s58
; GFX9-NEXT: v_mov_b32_e32 v16, s20
+; GFX9-NEXT: v_mov_b32_e32 v18, s57
; GFX9-NEXT: v_mov_b32_e32 v33, s21
-; GFX9-NEXT: v_mov_b32_e32 v22, s58
+; GFX9-NEXT: v_mov_b32_e32 v22, s56
; GFX9-NEXT: v_mov_b32_e32 v8, s18
+; GFX9-NEXT: v_mov_b32_e32 v10, s47
; GFX9-NEXT: v_mov_b32_e32 v34, s19
-; GFX9-NEXT: v_mov_b32_e32 v14, s57
+; GFX9-NEXT: v_mov_b32_e32 v14, s46
; GFX9-NEXT: v_mov_b32_e32 v0, s16
+; GFX9-NEXT: v_mov_b32_e32 v2, s45
; GFX9-NEXT: v_mov_b32_e32 v35, s17
-; GFX9-NEXT: v_mov_b32_e32 v6, s56
-; GFX9-NEXT: v_mov_b32_e32 v26, s47
-; GFX9-NEXT: v_mov_b32_e32 v25, s46
-; GFX9-NEXT: v_mov_b32_e32 v31, s42
-; GFX9-NEXT: v_mov_b32_e32 v29, s45
-; GFX9-NEXT: v_mov_b32_e32 v18, s44
-; GFX9-NEXT: v_mov_b32_e32 v17, s43
-; GFX9-NEXT: v_mov_b32_e32 v23, s28
-; GFX9-NEXT: v_mov_b32_e32 v21, s41
-; GFX9-NEXT: v_mov_b32_e32 v10, s40
-; GFX9-NEXT: v_mov_b32_e32 v9, s29
+; GFX9-NEXT: v_mov_b32_e32 v6, s44
+; GFX9-NEXT: v_mov_b32_e32 v25, s43
+; GFX9-NEXT: v_mov_b32_e32 v31, s29
+; GFX9-NEXT: v_mov_b32_e32 v29, s41
+; GFX9-NEXT: v_mov_b32_e32 v17, s42
+; GFX9-NEXT: v_mov_b32_e32 v23, s26
+; GFX9-NEXT: v_mov_b32_e32 v21, s28
+; GFX9-NEXT: v_mov_b32_e32 v9, s40
; GFX9-NEXT: v_mov_b32_e32 v15, s24
-; GFX9-NEXT: v_mov_b32_e32 v13, s27
-; GFX9-NEXT: v_mov_b32_e32 v2, s26
-; GFX9-NEXT: v_mov_b32_e32 v1, s25
+; GFX9-NEXT: v_mov_b32_e32 v13, s25
+; GFX9-NEXT: v_mov_b32_e32 v1, s27
; GFX9-NEXT: v_mov_b32_e32 v7, s14
; GFX9-NEXT: v_mov_b32_e32 v5, s15
; GFX9-NEXT: v_mov_b32_e32 v27, s10
@@ -41142,26 +41137,26 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: s_mov_b32 s12, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s27, s19, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s19, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s18, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s23, s17, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s26, s17, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s29, s16, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s28, s16, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s24, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s26, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s28, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s21, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s27, s16, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s22, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s25, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s24, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s20, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s25, s2, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s29, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s21, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s20, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s22, s0, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
@@ -41181,220 +41176,214 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s3
; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v9, v3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v7, 16, 1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s18, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.l, v35.l
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v10, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v35.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v9, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v20, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v12
; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s2, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s2, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v8, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v6.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v0.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.h, v2.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v5, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v4
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s17, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.l, v34.l
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v34.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v4 :: v_dual_add_nc_u32 v4, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v7
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v14.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v11.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v8, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v8, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v1, v7 :: v_dual_add_nc_u32 v4, v4, v9
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v3.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v8.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v5
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v3, 16, 1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v12 :: v_dual_add_nc_u32 v12, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v5, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v22.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v12, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v15, v5
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v4, v5 :: v_dual_add_nc_u32 v7, v11, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v14.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.l, v8.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v9, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v4
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v12, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v13, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v33.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v30.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v20, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v16.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v4.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v32.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v23, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[17:18]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v24.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v5.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[25:26]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v25
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v33.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v22.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v18.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v13, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v10.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37]
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v32.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[38:39]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v51
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v24.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v5
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.l, v16.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v51
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v49
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v26.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v39
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[50:51]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v50
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v38
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v37
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v36
; GFX11-TRUE16-NEXT: s_branch .LBB109_5
; GFX11-TRUE16-NEXT: .LBB109_3:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr20
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr29
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr24
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr22
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr26
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr23
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr24
; GFX11-TRUE16-NEXT: s_branch .LBB109_2
; GFX11-TRUE16-NEXT: .LBB109_4:
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v33, s17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s19 :: v_dual_mov_b32 v35, s1
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s46 :: v_dual_mov_b32 v25, s41
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v31, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s45 :: v_dual_mov_b32 v29, s40
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v17, s28
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s3 :: v_dual_mov_b32 v23, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s44 :: v_dual_mov_b32 v21, s26
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v9, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s43 :: v_dual_mov_b32 v15, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s42 :: v_dual_mov_b32 v13, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s29 :: v_dual_mov_b32 v1, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s25 :: v_dual_mov_b32 v7, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s21 :: v_dual_mov_b32 v5, s14
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s46 :: v_dual_mov_b32 v35, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s19 :: v_dual_mov_b32 v25, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v31, s24
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v29, s26
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s44 :: v_dual_mov_b32 v17, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s43 :: v_dual_mov_b32 v23, s21
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v21, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s42 :: v_dual_mov_b32 v9, s25
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s3 :: v_dual_mov_b32 v15, s15
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s41 :: v_dual_mov_b32 v13, s20
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s40 :: v_dual_mov_b32 v7, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s29 :: v_dual_mov_b32 v5, s14
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v27, s10
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v19, s8
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, s6
@@ -41413,26 +41402,26 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: s_mov_b32 s12, 0
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s19, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s19, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s19, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s18, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s17, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s17, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s16, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s16, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s28, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s16, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s3, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s3, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s3, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s2, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s2, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s1, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s29, s1, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s0, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s0, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[10:11], s[18:19], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[8:9], s[16:17], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
@@ -41452,225 +41441,218 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v0
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v3, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s1, s3, 0xffff0000
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v0
-; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s3
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v7, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v6, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v5, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v0
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v1, v4, v9 :: v_dual_add_nc_u32 v4, v10, v3
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v8, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v35
-; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v8, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, 0x400000, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v4, v11 :: v_dual_add_nc_u32 v12, 0x7fff, v2
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v10, v7
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v6, 16, v1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v9, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v6, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v4, v2 :: v_dual_and_b32 v1, 0xffff, v35
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v6, 16, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v10, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v11, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v9, v0, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s2, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v0
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v9, vcc_lo
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v36, v2, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v4
; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v37
; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v4, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v39, v14, 16, v5
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v34
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v14, 16, v7
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v9, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v11, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v10, v9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v7, v8 :: v_dual_add_nc_u32 v7, v12, v9
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v5
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v7, v12, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v17, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v17
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v33
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v5, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v11, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v7, v12, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v13, v17
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v12, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v4, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v16, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v20, v16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v13, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v17, v12
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v16, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v12, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v15, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v11, v19, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v16
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v15, v20 :: v_dual_and_b32 v5, 0xffff, v33
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v49, v22, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v12
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v4, v17, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, v17, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v18, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v12, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v7
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v22, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v4
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v15, v17, vcc_lo
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v32
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v12
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v24
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v30, 16, v4
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v5, 16, v13
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v1, 16, v15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v11
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v7, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[17:18]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 8, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v3
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v11, v13 :: v_dual_and_b32 v3, 0xffff, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 24, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v37
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v50, v26, 16, v3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v48, v18, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v32
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v10, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[48:49]
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v51, v30, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[38:39]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[50:51]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v51
; GFX11-FAKE16-NEXT: s_branch .LBB109_5
; GFX11-FAKE16-NEXT: .LBB109_3:
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr25
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr22
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr20
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr15
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr29
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr23
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr41
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr21
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr27
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr26
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr24
; GFX11-FAKE16-NEXT: s_branch .LBB109_2
; GFX11-FAKE16-NEXT: .LBB109_4:
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v33, s17
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s19 :: v_dual_mov_b32 v35, s1
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s46 :: v_dual_mov_b32 v25, s41
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v31, s27
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s45 :: v_dual_mov_b32 v29, s40
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v17, s28
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s3 :: v_dual_mov_b32 v23, s23
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s44 :: v_dual_mov_b32 v21, s26
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v9, s24
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s43 :: v_dual_mov_b32 v15, s15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s42 :: v_dual_mov_b32 v13, s22
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s29 :: v_dual_mov_b32 v1, s20
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s25 :: v_dual_mov_b32 v7, s13
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s21 :: v_dual_mov_b32 v5, s14
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s46 :: v_dual_mov_b32 v35, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s19 :: v_dual_mov_b32 v25, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s45 :: v_dual_mov_b32 v31, s24
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v29, s26
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s44 :: v_dual_mov_b32 v17, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s43 :: v_dual_mov_b32 v23, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v21, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s42 :: v_dual_mov_b32 v9, s25
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s3 :: v_dual_mov_b32 v15, s15
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s41 :: v_dual_mov_b32 v13, s20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s22
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s40 :: v_dual_mov_b32 v7, s13
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s29 :: v_dual_mov_b32 v5, s14
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v27, s10
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v19, s8
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, s6
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index 5a06737d923f1..f51d36e8d5f9d 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -84773,44 +84773,44 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr29
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr54
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -84823,52 +84823,52 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
@@ -84905,361 +84905,361 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_add3_u32 v19, v19, v1, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v19, v20, vcc
-; GFX9-NEXT: v_perm_b32 v28, v1, v18, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v19, v1, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX9-NEXT: v_add3_u32 v19, v19, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX9-NEXT: v_cndmask_b32_e32 v1, v19, v20, vcc
-; GFX9-NEXT: v_bfe_u32 v19, v4, 16, 1
-; GFX9-NEXT: v_add3_u32 v19, v19, v4, s6
-; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v19, v20, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v3
+; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v4
; GFX9-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
; GFX9-NEXT: v_add3_u32 v20, v20, v19, s6
; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v19
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
-; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc
-; GFX9-NEXT: v_bfe_u32 v20, v3, 16, 1
-; GFX9-NEXT: v_add3_u32 v20, v20, v3, s6
-; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v20, v21, vcc
-; GFX9-NEXT: v_perm_b32 v30, v3, v19, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX9-NEXT: v_bfe_u32 v20, v3, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX9-NEXT: v_add3_u32 v20, v20, v3, s6
-; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v20, v21, vcc
-; GFX9-NEXT: v_bfe_u32 v20, v6, 16, 1
-; GFX9-NEXT: v_add3_u32 v20, v20, v6, s6
-; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v20, v21, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v5
+; GFX9-NEXT: v_bfe_u32 v20, v4, 16, 1
+; GFX9-NEXT: v_add3_u32 v20, v20, v4, s6
+; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v20, v21, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v3
; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6
; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20
-; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX9-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc
-; GFX9-NEXT: v_bfe_u32 v21, v5, 16, 1
-; GFX9-NEXT: v_add3_u32 v21, v21, v5, s6
-; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v21, v22, vcc
-; GFX9-NEXT: v_perm_b32 v32, v5, v20, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v8
-; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX9-NEXT: v_bfe_u32 v21, v5, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX9-NEXT: v_add3_u32 v21, v21, v5, s6
-; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v21, v22, vcc
-; GFX9-NEXT: v_bfe_u32 v21, v8, 16, 1
-; GFX9-NEXT: v_add3_u32 v21, v21, v8, s6
-; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v8
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
-; GFX9-NEXT: v_cndmask_b32_e32 v8, v21, v22, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v7
+; GFX9-NEXT: v_bfe_u32 v21, v3, 16, 1
+; GFX9-NEXT: v_add3_u32 v21, v21, v3, s6
+; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v21, v22, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v6
; GFX9-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; GFX9-NEXT: v_bfe_u32 v22, v21, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; GFX9-NEXT: v_add3_u32 v22, v22, v21, s6
; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v21
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
-; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; GFX9-NEXT: v_cndmask_b32_e32 v21, v22, v23, vcc
-; GFX9-NEXT: v_bfe_u32 v22, v7, 16, 1
-; GFX9-NEXT: v_add3_u32 v22, v22, v7, s6
-; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v22, v23, vcc
-; GFX9-NEXT: v_perm_b32 v34, v7, v21, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX9-NEXT: v_bfe_u32 v22, v7, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX9-NEXT: v_add3_u32 v22, v22, v7, s6
-; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v22, v23, vcc
-; GFX9-NEXT: v_bfe_u32 v22, v10, 16, 1
-; GFX9-NEXT: v_add3_u32 v22, v22, v10, s6
-; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v10
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10
-; GFX9-NEXT: v_cndmask_b32_e32 v10, v22, v23, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v9
+; GFX9-NEXT: v_bfe_u32 v22, v6, 16, 1
+; GFX9-NEXT: v_add3_u32 v22, v22, v6, s6
+; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v6
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v22, v23, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v5
; GFX9-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; GFX9-NEXT: v_bfe_u32 v23, v22, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; GFX9-NEXT: v_add3_u32 v23, v23, v22, s6
; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v22
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v22, v22
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; GFX9-NEXT: v_cndmask_b32_e32 v22, v23, v24, vcc
-; GFX9-NEXT: v_bfe_u32 v23, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v23, v23, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v23, v24, vcc
-; GFX9-NEXT: v_perm_b32 v36, v9, v22, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_bfe_u32 v23, v9, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX9-NEXT: v_add3_u32 v23, v23, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v23, v24, vcc
-; GFX9-NEXT: v_bfe_u32 v23, v12, 16, 1
-; GFX9-NEXT: v_add3_u32 v23, v23, v12, s6
-; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v12
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12
-; GFX9-NEXT: v_cndmask_b32_e32 v12, v23, v24, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v11
+; GFX9-NEXT: v_bfe_u32 v23, v5, 16, 1
+; GFX9-NEXT: v_add3_u32 v23, v23, v5, s6
+; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v23, v24, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v8
; GFX9-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
; GFX9-NEXT: v_bfe_u32 v24, v23, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; GFX9-NEXT: v_add3_u32 v24, v24, v23, s6
; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v23
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
-; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; GFX9-NEXT: v_cndmask_b32_e32 v23, v24, v25, vcc
-; GFX9-NEXT: v_bfe_u32 v24, v11, 16, 1
-; GFX9-NEXT: v_add3_u32 v24, v24, v11, s6
-; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v24, v25, vcc
-; GFX9-NEXT: v_perm_b32 v38, v11, v23, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v14
-; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX9-NEXT: v_bfe_u32 v24, v11, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX9-NEXT: v_add3_u32 v24, v24, v11, s6
-; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v24, v25, vcc
-; GFX9-NEXT: v_bfe_u32 v24, v14, 16, 1
-; GFX9-NEXT: v_add3_u32 v24, v24, v14, s6
-; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v14
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
-; GFX9-NEXT: v_cndmask_b32_e32 v14, v24, v25, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v13
+; GFX9-NEXT: v_bfe_u32 v24, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v24, v24, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v8, v24, v25, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v7
; GFX9-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
; GFX9-NEXT: v_bfe_u32 v25, v24, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; GFX9-NEXT: v_add3_u32 v25, v25, v24, s6
; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v24
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v24, v24
-; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX9-NEXT: v_cndmask_b32_e32 v24, v25, v26, vcc
-; GFX9-NEXT: v_bfe_u32 v25, v13, 16, 1
-; GFX9-NEXT: v_add3_u32 v25, v25, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v13
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v25, v26, vcc
-; GFX9-NEXT: v_perm_b32 v48, v13, v24, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v16
-; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: v_bfe_u32 v25, v13, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX9-NEXT: v_add3_u32 v25, v25, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v13
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v25, v26, vcc
-; GFX9-NEXT: v_bfe_u32 v25, v16, 16, 1
-; GFX9-NEXT: v_add3_u32 v25, v25, v16, s6
-; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v16
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v16, v25, v26, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v15
+; GFX9-NEXT: v_bfe_u32 v25, v7, 16, 1
+; GFX9-NEXT: v_add3_u32 v25, v25, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v25, v26, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v10
; GFX9-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; GFX9-NEXT: v_bfe_u32 v26, v25, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
; GFX9-NEXT: v_add3_u32 v26, v26, v25, s6
; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v25
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v25, v25
-; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; GFX9-NEXT: v_cndmask_b32_e32 v25, v26, v27, vcc
-; GFX9-NEXT: v_bfe_u32 v26, v15, 16, 1
-; GFX9-NEXT: v_add3_u32 v26, v26, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v15
+; GFX9-NEXT: v_bfe_u32 v26, v10, 16, 1
+; GFX9-NEXT: v_add3_u32 v26, v26, v10, s6
+; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v10
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10
+; GFX9-NEXT: v_cndmask_b32_e32 v10, v26, v27, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v9
+; GFX9-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; GFX9-NEXT: v_bfe_u32 v27, v26, 16, 1
+; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; GFX9-NEXT: v_add3_u32 v27, v27, v26, s6
+; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v26
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v26, v26
+; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; GFX9-NEXT: v_cndmask_b32_e32 v26, v27, v36, vcc
+; GFX9-NEXT: v_bfe_u32 v27, v9, 16, 1
+; GFX9-NEXT: v_add3_u32 v27, v27, v9, s6
+; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v9
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v27, v36, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v12
+; GFX9-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; GFX9-NEXT: v_bfe_u32 v38, v27, 16, 1
+; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; GFX9-NEXT: v_add3_u32 v38, v38, v27, s6
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v27
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v27, v27
+; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; GFX9-NEXT: v_cndmask_b32_e32 v27, v38, v39, vcc
+; GFX9-NEXT: v_bfe_u32 v38, v12, 16, 1
+; GFX9-NEXT: v_add3_u32 v38, v38, v12, s6
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v12
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12
+; GFX9-NEXT: v_cndmask_b32_e32 v12, v38, v39, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v38, 16, v11
+; GFX9-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
+; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; GFX9-NEXT: v_bfe_u32 v48, v38, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX9-NEXT: v_add3_u32 v48, v48, v38, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v38
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v38, v38
+; GFX9-NEXT: v_bfe_u32 v38, v11, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v52, v48, v49, vcc
+; GFX9-NEXT: v_add3_u32 v38, v38, v11, s6
+; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v11
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
+; GFX9-NEXT: v_cndmask_b32_e32 v11, v38, v48, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v14
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v50, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v14, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v53, v49, v50, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v14, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v14
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
+; GFX9-NEXT: v_cndmask_b32_e32 v14, v48, v49, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v13
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; GFX9-NEXT: v_bfe_u32 v50, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_add3_u32 v50, v50, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v13, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v54, v50, v51, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v13, s6
+; GFX9-NEXT: v_or_b32_e32 v50, 0x400000, v13
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v48, v50, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v16
+; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
+; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; GFX9-NEXT: v_bfe_u32 v51, v50, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; GFX9-NEXT: v_add3_u32 v51, v51, v50, s6
+; GFX9-NEXT: v_or_b32_e32 v55, 0x400000, v50
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50
+; GFX9-NEXT: v_bfe_u32 v50, v16, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v55, v51, v55, vcc
+; GFX9-NEXT: v_add3_u32 v50, v50, v16, s6
+; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v16
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
+; GFX9-NEXT: v_cndmask_b32_e32 v16, v50, v51, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v15
+; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
+; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_bfe_u32 v40, v50, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_add3_u32 v40, v40, v50, s6
+; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v50
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50
+; GFX9-NEXT: v_bfe_u32 v50, v15, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v40, v40, v41, vcc
+; GFX9-NEXT: v_add3_u32 v50, v50, v15, s6
+; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v15
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v26, v27, vcc
-; GFX9-NEXT: v_perm_b32 v51, v16, v13, s7
-; GFX9-NEXT: v_perm_b32 v50, v15, v25, s7
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v50, v41, vcc
+; GFX9-NEXT: v_perm_b32 v51, v16, v55, s7
+; GFX9-NEXT: v_perm_b32 v50, v15, v40, s7
; GFX9-NEXT: v_perm_b32 v29, v2, v17, s7
-; GFX9-NEXT: v_perm_b32 v31, v4, v1, s7
-; GFX9-NEXT: v_perm_b32 v49, v14, v11, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v2
+; GFX9-NEXT: v_perm_b32 v28, v1, v18, s7
+; GFX9-NEXT: v_perm_b32 v49, v14, v53, s7
+; GFX9-NEXT: v_perm_b32 v48, v13, v54, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v18
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51]
-; GFX9-NEXT: v_perm_b32 v33, v6, v3, s7
-; GFX9-NEXT: v_perm_b32 v39, v12, v9, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v19
+; GFX9-NEXT: v_perm_b32 v31, v4, v19, s7
+; GFX9-NEXT: v_perm_b32 v39, v12, v27, s7
+; GFX9-NEXT: v_perm_b32 v38, v11, v52, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v19
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[48:49]
-; GFX9-NEXT: v_perm_b32 v35, v8, v5, s7
-; GFX9-NEXT: v_perm_b32 v37, v10, v7, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v20
+; GFX9-NEXT: v_perm_b32 v30, v3, v20, s7
+; GFX9-NEXT: v_perm_b32 v35, v8, v23, s7
+; GFX9-NEXT: v_perm_b32 v34, v7, v24, s7
+; GFX9-NEXT: v_perm_b32 v37, v10, v25, s7
+; GFX9-NEXT: v_perm_b32 v36, v9, v26, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[38:39]
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v24
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v21
+; GFX9-NEXT: v_perm_b32 v33, v6, v21, s7
+; GFX9-NEXT: v_perm_b32 v32, v5, v22, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[36:37]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[34:35]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v25
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v40
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v22
; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[32:33]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[30:31]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[28:29]
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v49
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v55
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v50
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v36
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v32
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v31
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v30
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v29
; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v28
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v28
; GFX9-NEXT: .LBB108_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v53, v24, s4
+; GFX9-NEXT: v_perm_b32 v22, v63, v24, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v57, v52, s4
+; GFX9-NEXT: v_perm_b32 v1, v61, v53, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v51, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v60, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; GFX9-NEXT: v_perm_b32 v1, v3, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_perm_b32 v1, v4, v31, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v50, s4
+; GFX9-NEXT: v_perm_b32 v2, v58, v52, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_perm_b32 v1, v5, v32, s4
-; GFX9-NEXT: v_perm_b32 v2, v63, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v47, v26, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_perm_b32 v1, v6, v33, s4
-; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v51, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_perm_b32 v1, v7, v34, s4
-; GFX9-NEXT: v_perm_b32 v2, v61, v23, s4
+; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_perm_b32 v1, v8, v35, s4
-; GFX9-NEXT: v_perm_b32 v2, v54, v60, s4
+; GFX9-NEXT: v_perm_b32 v2, v42, v50, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v36, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v20, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v20, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v10, v37, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; GFX9-NEXT: v_perm_b32 v1, v11, v38, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v19, s4
+; GFX9-NEXT: v_perm_b32 v2, v55, v19, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v12, v39, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v54, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v13, v48, s4
-; GFX9-NEXT: v_perm_b32 v2, v45, v18, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v18, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v14, v49, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v44, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v57, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v1, v15, v43, s4
-; GFX9-NEXT: v_perm_b32 v2, v42, v17, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v15, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v41, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v46, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v55, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -85313,18 +85313,18 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
@@ -85333,9 +85333,9 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
@@ -85353,15 +85353,15 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v13
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v8
@@ -85394,13 +85394,13 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v7.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v8.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.h, v9.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v9.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v9.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v10.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v10.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.h, v11.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.h, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v12.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.h, v13.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v13.h
@@ -85576,54 +85576,55 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v26, v2, v7 :: v_dual_lshlrev_b32 v9, 16, v13
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v66.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v26, v2, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v66.h
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v67.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v24
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v23
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v25, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v68.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v23
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v82, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v81, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v8 :: v_dual_lshlrev_b32 v5, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v82.h
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v80, v1, v2 :: v_dual_lshlrev_b32 v1, 16, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v81.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v71, v1, v2, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v25
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v26
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v3, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v71.h
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v27, v2, v3 :: v_dual_add_f32 v2, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
@@ -85633,74 +85634,75 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v28
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v98, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v97, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v16
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v97.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v99, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v98.h
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v99.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v32, v3, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v115, v4, v6 :: v_dual_add_f32 v6, 0x40c00000, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v115, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v5 :: v_dual_add_f32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v117, v2, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v115.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v117, v2, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v118, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v33
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v33
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v28
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v118, v7, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v49, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v117.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v27
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v48, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.l, v118.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v49
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v49
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[48:49]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[32:33]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v48
; GFX11-TRUE16-NEXT: .LBB108_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v53.h
@@ -85737,11 +85739,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v23.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v66.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v82.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v81.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v25.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v68.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v26.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v98.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v97.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v27.h
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v36, 0xc0c0004
@@ -85749,7 +85751,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v101, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v100, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v87, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v34, 0xc0c0004
@@ -85757,7 +85759,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v10, 16, v9
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v12, 16, v11
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v14, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v71.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v28.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v11, v16, 16, v15
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v115.h
@@ -85773,8 +85775,8 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v84, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v30, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v83, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v80, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v29, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v69, 0xc0c0004
@@ -85795,53 +85797,53 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v17
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr25
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr24
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr27
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr28
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr23
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr29
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr22
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr21
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr21
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr20
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr20
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr19
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr19
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr18
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr18
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr31
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr17
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr30
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0
@@ -85855,45 +85857,45 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 24, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v1
; GFX11-FAKE16-NEXT: .LBB108_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -85923,342 +85925,349 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v2, 0x7fff
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v21, v23 :: v_dual_lshlrev_b32 v21, 16, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v21, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_perm_b32 v27, v2, v1, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v18, 0x40c00000, v21 :: v_dual_lshlrev_b32 v21, 16, v3
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v17, v22, v17, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v20, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v26, v19, v17, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v4, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v20, v18, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v24, 0x40c00000, v3 :: v_dual_add_f32 v21, 0x40c00000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v28, v20, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-FAKE16-NEXT: v_add3_u32 v19, v19, v21, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v21, v28, v20, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v19, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v6
+; GFX11-FAKE16-NEXT: v_add3_u32 v19, v19, v24, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v18, v17, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v17
-; GFX11-FAKE16-NEXT: v_add3_u32 v19, v19, v4, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v4
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v26
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v19, v23 :: v_dual_lshlrev_b32 v23, 16, v6
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_add3_u32 v19, v24, v21, 0x7fff
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v4, v18, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v3, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v3
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v19, v19, v22 :: v_dual_lshlrev_b32 v22, 16, v5
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v4, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v22, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v20, v3, 0x7fff
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v20, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v4, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v4
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v20, v21, v22 :: v_dual_add_f32 v21, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v19, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v21
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v3, v19, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v20, v21, 0x7fff
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v28
-; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v6, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v20, v20, v23 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v21, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v19, v20, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v19
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v22, v25 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v6
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v6, v25, v22, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v5, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v6, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v24, v6, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v24, v30 :: v_dual_and_b32 v5, 0xffff0000, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v30, 16, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v23, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v23
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v97, v6, v21, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v31, v23, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v5
; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v86, v3, v20, 0x7060302
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v6
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v21, v25 :: v_dual_add_f32 v8, 0x40c00000, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v85, v5, v22, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v86
-; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v21, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v5, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v24, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v30
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v97
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v22, v31, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v24, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v8, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v96, v5, v23, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v23
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v22, v31, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v85
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v82, v5, v6, 0x7060302
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v23, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v82
-; GFX11-FAKE16-NEXT: v_add3_u32 v8, v30, v23, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v23, v8, v24 :: v_dual_lshlrev_b32 v24, 16, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v25
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v7
; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v96
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v8, v30, v32 :: v_dual_add_f32 v25, 0x40c00000, v25
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v32, 16, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v25, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v25
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v33, v25, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v25, v30, v31 :: v_dual_and_b32 v10, 0xffff0000, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v32
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v7
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v7, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v21, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v10
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_perm_b32 v81, v7, v23, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v81
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v10, 0x40c00000, v10 :: v_dual_lshlrev_b32 v31, 16, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v24, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v10, 16, 1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v21, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v24, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v32, v10, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v24, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v85, v8, v22, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v7, v25, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v24, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_add3_u32 v10, v31, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v30 :: v_dual_lshlrev_b32 v30, 16, v12
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v10, v32, v34 :: v_dual_and_b32 v9, 0xffff0000, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v31
; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_perm_b32 v70, v7, v8, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v10, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v30
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v70
-; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v12, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v12, 0x7fff
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v9, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v21, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v69, v9, v24, 0x7060302
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v35, v31, 0x7fff
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v25, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v31, 0x40c00000, v34 :: v_dual_add_f32 v12, 0x40c00000, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v32, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v31
+; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v83, v10, v24, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v32, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v30, v35, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v11
; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v69
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v21, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v33, v33, v12, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v32, v34, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v30, 0x40c00000, v30 :: v_dual_add_f32 v11, 0x40c00000, v11
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v32, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v30, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v12, v10, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v21, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v82, v9, v38, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v83
+; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v33, v35 :: v_dual_lshlrev_b32 v33, 16, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v11, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add3_u32 v31, v36, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v12, v37, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v82
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v31, v32, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v31, v34, v11, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v11
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v65
-; GFX11-FAKE16-NEXT: v_add3_u32 v25, v31, v11, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v25, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v25, 0x40c00000, v31
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v32, v21, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v25, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v25
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v30, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v32, v14, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v33
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v30, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v33
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v11, v36, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v34, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v33, v32, v33 :: v_dual_and_b32 v14, 0xffff0000, v14
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v14
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_add3_u32 v32, v33, v25, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v30, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v34, v14, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v30, v32, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v31
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v33
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v11, v9, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v14, v21, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v25, v32, v34 :: v_dual_lshlrev_b32 v34, 16, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v14, v33, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v34, v35, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v65
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v34, v34, v39 :: v_dual_add_f32 v13, 0x40c00000, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v35
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v39, 16, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v13, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v30, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX11-FAKE16-NEXT: v_add3_u32 v31, v35, v13, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v30, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX11-FAKE16-NEXT: v_add3_u32 v31, v48, v13, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v15
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v31, v32, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v34
-; GFX11-FAKE16-NEXT: v_add3_u32 v32, v33, v30, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v39
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v35, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v30
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v31, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, 0x400000, v31
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v32, v33, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v33, v34, v16, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v31
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v32, v35, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v15, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v13, v25, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v25
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v33, v34, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v13, v34, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v64
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v39, v16, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v35, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v51
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v16, v32, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v35, v36, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v48, v49, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v39
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v30, v37, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v30, v50, vcc_lo
+; GFX11-FAKE16-NEXT: v_perm_b32 v51, v16, v32, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v38, v15, v31, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[38:39]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[51:52]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[64:65]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[69:70]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[81:82]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[85:86]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v50, v15, v35, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[64:65]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[68:69]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[82:83]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[84:85]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[96:97]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[28:29]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[26:27]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v51
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 24, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v64
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v64
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v69
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v82
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 24, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v97
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 24, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 8, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v26
; GFX11-FAKE16-NEXT: .LBB108_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v25, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v97, v24, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v85, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v81, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v55, v22, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v28, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v87, v23, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v55, v19, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v81, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v80, v21, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v68, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v67, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v68, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v35, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v84, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v49, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v80, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v37, v20, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v27, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v25, v66, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v71, v97, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v24, 16, v1
; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v54, v86, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v26, v50, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v66, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v52, v85, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v22, 16, v5
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v71, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v36, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v38, v82, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v23, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v67, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v33, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v36, v69, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v19, 16, v11
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v53, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v32, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v34, v64, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v21, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v20, 16, v9
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v51, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v49, v18, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v48, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v31, v39, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v38, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v37, v17, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v30, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v33, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v32, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v31, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v30, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v25, 16, v2
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v24, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v26, 16, v6
@@ -87815,46 +87824,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB109_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s34, s5, 24
-; GFX9-NEXT: s_lshr_b32 s55, s5, 16
-; GFX9-NEXT: s_lshr_b32 s37, s5, 8
-; GFX9-NEXT: s_lshr_b32 s39, s4, 16
-; GFX9-NEXT: s_lshr_b32 s38, s4, 8
-; GFX9-NEXT: s_lshr_b32 s94, s7, 24
-; GFX9-NEXT: s_lshr_b32 s54, s7, 16
-; GFX9-NEXT: s_lshr_b32 s31, s7, 8
-; GFX9-NEXT: s_lshr_b32 s36, s6, 16
-; GFX9-NEXT: s_lshr_b32 s35, s6, 8
-; GFX9-NEXT: s_lshr_b32 s90, s9, 24
-; GFX9-NEXT: s_lshr_b32 s53, s9, 16
-; GFX9-NEXT: s_lshr_b32 s93, s9, 8
-; GFX9-NEXT: s_lshr_b32 s30, s8, 16
-; GFX9-NEXT: s_lshr_b32 s95, s8, 8
-; GFX9-NEXT: s_lshr_b32 s78, s11, 24
-; GFX9-NEXT: s_lshr_b32 s52, s11, 16
-; GFX9-NEXT: s_lshr_b32 s89, s11, 8
-; GFX9-NEXT: s_lshr_b32 s92, s10, 16
-; GFX9-NEXT: s_lshr_b32 s91, s10, 8
-; GFX9-NEXT: s_lshr_b32 s74, s13, 24
-; GFX9-NEXT: s_lshr_b32 s51, s13, 16
-; GFX9-NEXT: s_lshr_b32 s77, s13, 8
-; GFX9-NEXT: s_lshr_b32 s88, s12, 16
-; GFX9-NEXT: s_lshr_b32 s79, s12, 8
-; GFX9-NEXT: s_lshr_b32 s62, s15, 24
-; GFX9-NEXT: s_lshr_b32 s50, s15, 16
-; GFX9-NEXT: s_lshr_b32 s73, s15, 8
-; GFX9-NEXT: s_lshr_b32 s76, s14, 16
+; GFX9-NEXT: s_lshr_b32 s91, s5, 24
+; GFX9-NEXT: s_lshr_b32 s54, s5, 16
+; GFX9-NEXT: s_lshr_b32 s93, s5, 8
+; GFX9-NEXT: s_lshr_b32 s55, s4, 16
+; GFX9-NEXT: s_lshr_b32 s95, s4, 8
+; GFX9-NEXT: s_lshr_b32 s88, s7, 24
+; GFX9-NEXT: s_lshr_b32 s52, s7, 16
+; GFX9-NEXT: s_lshr_b32 s90, s7, 8
+; GFX9-NEXT: s_lshr_b32 s53, s6, 16
+; GFX9-NEXT: s_lshr_b32 s94, s6, 8
+; GFX9-NEXT: s_lshr_b32 s77, s9, 24
+; GFX9-NEXT: s_lshr_b32 s50, s9, 16
+; GFX9-NEXT: s_lshr_b32 s79, s9, 8
+; GFX9-NEXT: s_lshr_b32 s51, s8, 16
+; GFX9-NEXT: s_lshr_b32 s92, s8, 8
+; GFX9-NEXT: s_lshr_b32 s74, s11, 24
+; GFX9-NEXT: s_lshr_b32 s48, s11, 16
+; GFX9-NEXT: s_lshr_b32 s76, s11, 8
+; GFX9-NEXT: s_lshr_b32 s49, s10, 16
+; GFX9-NEXT: s_lshr_b32 s89, s10, 8
+; GFX9-NEXT: s_lshr_b32 s63, s13, 24
+; GFX9-NEXT: s_lshr_b32 s38, s13, 16
+; GFX9-NEXT: s_lshr_b32 s73, s13, 8
+; GFX9-NEXT: s_lshr_b32 s39, s12, 16
+; GFX9-NEXT: s_lshr_b32 s78, s12, 8
+; GFX9-NEXT: s_lshr_b32 s60, s15, 24
+; GFX9-NEXT: s_lshr_b32 s36, s15, 16
+; GFX9-NEXT: s_lshr_b32 s62, s15, 8
+; GFX9-NEXT: s_lshr_b32 s37, s14, 16
; GFX9-NEXT: s_lshr_b32 s75, s14, 8
; GFX9-NEXT: s_lshr_b32 s58, s17, 24
-; GFX9-NEXT: s_lshr_b32 s49, s17, 16
-; GFX9-NEXT: s_lshr_b32 s61, s17, 8
-; GFX9-NEXT: s_lshr_b32 s72, s16, 16
-; GFX9-NEXT: s_lshr_b32 s63, s16, 8
+; GFX9-NEXT: s_lshr_b32 s34, s17, 16
+; GFX9-NEXT: s_lshr_b32 s59, s17, 8
+; GFX9-NEXT: s_lshr_b32 s35, s16, 16
+; GFX9-NEXT: s_lshr_b32 s72, s16, 8
; GFX9-NEXT: s_lshr_b32 s56, s19, 24
-; GFX9-NEXT: s_lshr_b32 s48, s19, 16
+; GFX9-NEXT: s_lshr_b32 s30, s19, 16
; GFX9-NEXT: s_lshr_b32 s57, s19, 8
-; GFX9-NEXT: s_lshr_b32 s60, s18, 16
-; GFX9-NEXT: s_lshr_b32 s59, s18, 8
+; GFX9-NEXT: s_lshr_b32 s31, s18, 16
+; GFX9-NEXT: s_lshr_b32 s61, s18, 8
; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
; GFX9-NEXT: s_lshr_b64 s[42:43], s[6:7], 24
; GFX9-NEXT: s_lshr_b64 s[40:41], s[8:9], 24
@@ -87895,20 +87904,20 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc
; GFX9-NEXT: s_lshl_b32 s18, s18, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s18, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s18, v1
-; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v30
; GFX9-NEXT: s_and_b32 s18, s17, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v3, v2, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v3, v31, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s18, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -87917,7 +87926,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s17, s17, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s17, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -87925,30 +87934,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v32
; GFX9-NEXT: s_and_b32 s17, s16, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v11, v28, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v11, v29, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s17, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s16, s16, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s16, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s16, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v35
; GFX9-NEXT: s_and_b32 s16, s15, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v10, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v10, v37, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s16, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -87965,8 +87974,8 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v28
; GFX9-NEXT: s_and_b32 s15, s14, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v15, v27, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s15, v1
@@ -87975,20 +87984,9 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: s_lshl_b32 s14, s14, 16
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s14, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v38
-; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v5
+; GFX9-NEXT: s_lshl_b32 s14, s14, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s14, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -87996,39 +87994,50 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: s_lshl_b32 s13, s13, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2
-; GFX9-NEXT: v_add_f32_e32 v2, s13, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v50
+; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v14, v36, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s14, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
+; GFX9-NEXT: s_lshl_b32 s13, s13, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v33
+; GFX9-NEXT: v_add_f32_e32 v2, s13, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v34
; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v20, v32, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v20, v33, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s13, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s12, s12, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s12, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s12, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v48
; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v19, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v19, v38, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s12, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88037,7 +88046,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s11, s11, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s11, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88045,30 +88054,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v49
; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v22, v35, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v22, v39, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s11, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s10, s10, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s10, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s10, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v53
; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v21, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v21, v51, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s10, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88077,7 +88086,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s9, s9, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s9, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88085,30 +88094,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v54
; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v24, v39, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v24, v52, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s9, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s8, s8, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s8, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s8, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v41
; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v23, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v23, v55, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s8, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88117,7 +88126,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s7, s7, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s7, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88125,30 +88134,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v42
; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v26, v50, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v26, v40, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s7, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s6, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v45
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v25, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v25, v43, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88157,7 +88166,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88165,178 +88174,170 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v46
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v42, v53, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v58, v44, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
-; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_bfe_u32 v5, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v1
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v2
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1
; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[25:26]
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v40
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v56
; GFX9-NEXT: v_lshrrev_b64 v[6:7], 24, v[23:24]
-; GFX9-NEXT: v_lshl_or_b32 v41, v2, 16, v1
+; GFX9-NEXT: v_lshl_or_b32 v57, v47, 16, v1
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[21:22]
; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11]
-; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[41:42]
+; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[57:58]
; GFX9-NEXT: v_lshrrev_b64 v[8:9], 24, v[19:20]
; GFX9-NEXT: v_lshrrev_b64 v[12:13], 24, v[14:15]
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v24
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v23
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v22
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v21
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3
; GFX9-NEXT: s_branch .LBB109_5
; GFX9-NEXT: .LBB109_3:
-; GFX9-NEXT: ; implicit-def: $sgpr59
-; GFX9-NEXT: ; implicit-def: $sgpr60
+; GFX9-NEXT: ; implicit-def: $sgpr61
+; GFX9-NEXT: ; implicit-def: $sgpr31
; GFX9-NEXT: ; implicit-def: $sgpr20
; GFX9-NEXT: ; implicit-def: $sgpr57
-; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr30
; GFX9-NEXT: ; implicit-def: $sgpr56
-; GFX9-NEXT: ; implicit-def: $sgpr63
; GFX9-NEXT: ; implicit-def: $sgpr72
+; GFX9-NEXT: ; implicit-def: $sgpr35
; GFX9-NEXT: ; implicit-def: $sgpr22
-; GFX9-NEXT: ; implicit-def: $sgpr61
-; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr59
+; GFX9-NEXT: ; implicit-def: $sgpr34
; GFX9-NEXT: ; implicit-def: $sgpr58
; GFX9-NEXT: ; implicit-def: $sgpr75
-; GFX9-NEXT: ; implicit-def: $sgpr76
+; GFX9-NEXT: ; implicit-def: $sgpr37
; GFX9-NEXT: ; implicit-def: $sgpr24
-; GFX9-NEXT: ; implicit-def: $sgpr73
-; GFX9-NEXT: ; implicit-def: $sgpr50
; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr79
-; GFX9-NEXT: ; implicit-def: $sgpr88
+; GFX9-NEXT: ; implicit-def: $sgpr36
+; GFX9-NEXT: ; implicit-def: $sgpr60
+; GFX9-NEXT: ; implicit-def: $sgpr78
+; GFX9-NEXT: ; implicit-def: $sgpr39
; GFX9-NEXT: ; implicit-def: $sgpr26
-; GFX9-NEXT: ; implicit-def: $sgpr77
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr73
+; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr63
+; GFX9-NEXT: ; implicit-def: $sgpr89
+; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr28
+; GFX9-NEXT: ; implicit-def: $sgpr76
+; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr74
-; GFX9-NEXT: ; implicit-def: $sgpr91
; GFX9-NEXT: ; implicit-def: $sgpr92
-; GFX9-NEXT: ; implicit-def: $sgpr28
-; GFX9-NEXT: ; implicit-def: $sgpr89
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr78
-; GFX9-NEXT: ; implicit-def: $sgpr95
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr51
; GFX9-NEXT: ; implicit-def: $sgpr40
-; GFX9-NEXT: ; implicit-def: $sgpr93
+; GFX9-NEXT: ; implicit-def: $sgpr79
+; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr77
+; GFX9-NEXT: ; implicit-def: $sgpr94
; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr90
-; GFX9-NEXT: ; implicit-def: $sgpr35
-; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr42
-; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr94
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr44
-; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr90
+; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr88
+; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr34
+; GFX9-NEXT: ; implicit-def: $sgpr44
+; GFX9-NEXT: ; implicit-def: $sgpr93
+; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr91
; GFX9-NEXT: s_branch .LBB109_2
; GFX9-NEXT: .LBB109_4:
; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
-; GFX9-NEXT: v_mov_b32_e32 v55, s5
-; GFX9-NEXT: v_mov_b32_e32 v53, s55
-; GFX9-NEXT: v_mov_b32_e32 v54, s6
-; GFX9-NEXT: v_mov_b32_e32 v52, s7
-; GFX9-NEXT: v_mov_b32_e32 v50, s54
-; GFX9-NEXT: v_mov_b32_e32 v51, s8
-; GFX9-NEXT: v_mov_b32_e32 v49, s9
-; GFX9-NEXT: v_mov_b32_e32 v39, s53
-; GFX9-NEXT: v_mov_b32_e32 v48, s10
-; GFX9-NEXT: v_mov_b32_e32 v37, s11
-; GFX9-NEXT: v_mov_b32_e32 v35, s52
-; GFX9-NEXT: v_mov_b32_e32 v36, s12
-; GFX9-NEXT: v_mov_b32_e32 v33, s13
-; GFX9-NEXT: v_mov_b32_e32 v32, s51
-; GFX9-NEXT: v_mov_b32_e32 v38, s14
-; GFX9-NEXT: v_mov_b32_e32 v29, s15
-; GFX9-NEXT: v_mov_b32_e32 v27, s50
-; GFX9-NEXT: v_mov_b32_e32 v34, s16
-; GFX9-NEXT: v_mov_b32_e32 v31, s17
-; GFX9-NEXT: v_mov_b32_e32 v28, s49
+; GFX9-NEXT: v_mov_b32_e32 v1, s30
+; GFX9-NEXT: v_mov_b32_e32 v56, s4
+; GFX9-NEXT: v_mov_b32_e32 v47, s55
+; GFX9-NEXT: v_mov_b32_e32 v46, s5
+; GFX9-NEXT: v_mov_b32_e32 v44, s54
+; GFX9-NEXT: v_mov_b32_e32 v45, s6
+; GFX9-NEXT: v_mov_b32_e32 v43, s53
+; GFX9-NEXT: v_mov_b32_e32 v42, s7
+; GFX9-NEXT: v_mov_b32_e32 v40, s52
+; GFX9-NEXT: v_mov_b32_e32 v41, s8
+; GFX9-NEXT: v_mov_b32_e32 v55, s51
+; GFX9-NEXT: v_mov_b32_e32 v54, s9
+; GFX9-NEXT: v_mov_b32_e32 v52, s50
+; GFX9-NEXT: v_mov_b32_e32 v53, s10
+; GFX9-NEXT: v_mov_b32_e32 v51, s49
+; GFX9-NEXT: v_mov_b32_e32 v49, s11
+; GFX9-NEXT: v_mov_b32_e32 v39, s48
+; GFX9-NEXT: v_mov_b32_e32 v48, s12
+; GFX9-NEXT: v_mov_b32_e32 v38, s39
+; GFX9-NEXT: v_mov_b32_e32 v34, s13
+; GFX9-NEXT: v_mov_b32_e32 v33, s38
+; GFX9-NEXT: v_mov_b32_e32 v50, s14
+; GFX9-NEXT: v_mov_b32_e32 v36, s37
+; GFX9-NEXT: v_mov_b32_e32 v28, s15
+; GFX9-NEXT: v_mov_b32_e32 v27, s36
+; GFX9-NEXT: v_mov_b32_e32 v35, s16
+; GFX9-NEXT: v_mov_b32_e32 v37, s35
+; GFX9-NEXT: v_mov_b32_e32 v32, s17
+; GFX9-NEXT: v_mov_b32_e32 v29, s34
; GFX9-NEXT: v_mov_b32_e32 v30, s18
+; GFX9-NEXT: v_mov_b32_e32 v31, s31
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v13, s39
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v2, s34
-; GFX9-NEXT: v_mov_b32_e32 v9, s37
-; GFX9-NEXT: v_mov_b32_e32 v43, s36
-; GFX9-NEXT: v_mov_b32_e32 v44, s35
-; GFX9-NEXT: v_mov_b32_e32 v41, s94
-; GFX9-NEXT: v_mov_b32_e32 v42, s31
-; GFX9-NEXT: v_mov_b32_e32 v46, s30
-; GFX9-NEXT: v_mov_b32_e32 v23, s95
-; GFX9-NEXT: v_mov_b32_e32 v45, s90
-; GFX9-NEXT: v_mov_b32_e32 v24, s93
-; GFX9-NEXT: v_mov_b32_e32 v56, s92
-; GFX9-NEXT: v_mov_b32_e32 v21, s91
-; GFX9-NEXT: v_mov_b32_e32 v47, s78
-; GFX9-NEXT: v_mov_b32_e32 v22, s89
-; GFX9-NEXT: v_mov_b32_e32 v58, s88
-; GFX9-NEXT: v_mov_b32_e32 v19, s79
-; GFX9-NEXT: v_mov_b32_e32 v57, s74
-; GFX9-NEXT: v_mov_b32_e32 v20, s77
-; GFX9-NEXT: v_mov_b32_e32 v60, s76
+; GFX9-NEXT: v_mov_b32_e32 v13, s95
+; GFX9-NEXT: v_mov_b32_e32 v2, s91
+; GFX9-NEXT: v_mov_b32_e32 v9, s93
+; GFX9-NEXT: v_mov_b32_e32 v58, s94
+; GFX9-NEXT: v_mov_b32_e32 v18, s88
+; GFX9-NEXT: v_mov_b32_e32 v57, s90
+; GFX9-NEXT: v_mov_b32_e32 v23, s92
+; GFX9-NEXT: v_mov_b32_e32 v59, s77
+; GFX9-NEXT: v_mov_b32_e32 v24, s79
+; GFX9-NEXT: v_mov_b32_e32 v21, s89
+; GFX9-NEXT: v_mov_b32_e32 v60, s74
+; GFX9-NEXT: v_mov_b32_e32 v22, s76
+; GFX9-NEXT: v_mov_b32_e32 v19, s78
+; GFX9-NEXT: v_mov_b32_e32 v61, s63
+; GFX9-NEXT: v_mov_b32_e32 v20, s73
; GFX9-NEXT: v_mov_b32_e32 v14, s75
-; GFX9-NEXT: v_mov_b32_e32 v59, s62
-; GFX9-NEXT: v_mov_b32_e32 v15, s73
-; GFX9-NEXT: v_mov_b32_e32 v62, s72
-; GFX9-NEXT: v_mov_b32_e32 v10, s63
-; GFX9-NEXT: v_mov_b32_e32 v61, s58
-; GFX9-NEXT: v_mov_b32_e32 v11, s61
-; GFX9-NEXT: v_mov_b32_e32 v26, s60
-; GFX9-NEXT: v_mov_b32_e32 v3, s59
-; GFX9-NEXT: v_mov_b32_e32 v25, s56
+; GFX9-NEXT: v_mov_b32_e32 v62, s60
+; GFX9-NEXT: v_mov_b32_e32 v15, s62
+; GFX9-NEXT: v_mov_b32_e32 v10, s72
+; GFX9-NEXT: v_mov_b32_e32 v25, s58
+; GFX9-NEXT: v_mov_b32_e32 v11, s59
+; GFX9-NEXT: v_mov_b32_e32 v3, s61
+; GFX9-NEXT: v_mov_b32_e32 v26, s56
; GFX9-NEXT: v_mov_b32_e32 v4, s57
; GFX9-NEXT: v_mov_b32_e32 v1, s44
; GFX9-NEXT: v_mov_b32_e32 v5, s42
@@ -88348,16 +88349,16 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v17, s20
; GFX9-NEXT: .LBB109_5: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v17, v26, v17, s4
+; GFX9-NEXT: v_perm_b32 v17, v31, v17, s4
; GFX9-NEXT: v_perm_b32 v3, v30, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_or_b32_e32 v3, v3, v17
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v16, v62, v16, s4
-; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4
+; GFX9-NEXT: v_perm_b32 v16, v37, v16, s4
+; GFX9-NEXT: v_perm_b32 v1, v47, v1, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v53, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_readlane_b32 s55, v63, 15
; GFX9-NEXT: v_readlane_b32 s54, v63, 14
@@ -88379,73 +88380,73 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v4, v4, v25, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v26, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v3, v34, v10, s4
+; GFX9-NEXT: v_perm_b32 v3, v35, v10, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v16
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v28, v61, s4
+; GFX9-NEXT: v_perm_b32 v4, v29, v25, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v3, v31, v11, s4
+; GFX9-NEXT: v_perm_b32 v3, v32, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v60, v12, s4
+; GFX9-NEXT: v_perm_b32 v4, v36, v12, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v3, v38, v14, s4
+; GFX9-NEXT: v_perm_b32 v3, v50, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v27, v59, s4
+; GFX9-NEXT: v_perm_b32 v4, v27, v62, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v3, v29, v15, s4
+; GFX9-NEXT: v_perm_b32 v3, v28, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v58, v8, s4
+; GFX9-NEXT: v_perm_b32 v4, v38, v8, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v3, v36, v19, s4
+; GFX9-NEXT: v_perm_b32 v3, v48, v19, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v32, v57, s4
+; GFX9-NEXT: v_perm_b32 v4, v33, v61, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v3, v33, v20, s4
+; GFX9-NEXT: v_perm_b32 v3, v34, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v56, v7, s4
+; GFX9-NEXT: v_perm_b32 v4, v51, v7, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_perm_b32 v3, v48, v21, s4
+; GFX9-NEXT: v_perm_b32 v3, v53, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v35, v47, s4
+; GFX9-NEXT: v_perm_b32 v4, v39, v60, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: v_perm_b32 v3, v37, v22, s4
+; GFX9-NEXT: v_perm_b32 v3, v49, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v46, v6, s4
+; GFX9-NEXT: v_perm_b32 v4, v55, v6, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_perm_b32 v3, v51, v23, s4
+; GFX9-NEXT: v_perm_b32 v3, v41, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v39, v45, s4
+; GFX9-NEXT: v_perm_b32 v4, v52, v59, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: v_perm_b32 v3, v49, v24, s4
+; GFX9-NEXT: v_perm_b32 v3, v54, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: v_perm_b32 v4, v43, v5, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_perm_b32 v3, v54, v44, s4
+; GFX9-NEXT: v_perm_b32 v3, v45, v58, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v50, v41, s4
+; GFX9-NEXT: v_perm_b32 v4, v40, v18, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v3, v52, v42, s4
+; GFX9-NEXT: v_perm_b32 v3, v42, v57, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v3, v40, v18, s4
+; GFX9-NEXT: v_perm_b32 v3, v56, v13, s4
; GFX9-NEXT: v_or_b32_e32 v1, v3, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_perm_b32 v1, v55, v9, s4
+; GFX9-NEXT: v_perm_b32 v1, v46, v9, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -88489,46 +88490,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s49, 9
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s22, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s21, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s21, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s19, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s18, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s17, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s25, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s16, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s16, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s2, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s0, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
@@ -88546,7 +88547,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_and_b32 s4, s0, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
@@ -88555,21 +88556,21 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9
@@ -88577,472 +88578,465 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v16.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v5, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v17.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, v10, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v21.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v10, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v11
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v38, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v39, v38, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, v39, v38
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v23.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x7fff, v39
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v20.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v14 :: v_dual_add_nc_u32 v7, v9, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v12 :: v_dual_add_nc_u32 v7, v9, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v10, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.l, v25.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v15, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v14 :: v_dual_add_nc_u32 v9, v9, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v13
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v15, v12
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v8
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v14 :: v_dual_add_nc_u32 v8, v10, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v14, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v30, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.l, v27.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v15, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v14 :: v_dual_add_nc_u32 v7, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v30, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v29.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v8.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v31.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v11 :: v_dual_add_nc_u32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v12 :: v_dual_add_nc_u32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v15 :: v_dual_add_nc_u32 v9, v11, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v30.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v10 :: v_dual_add_nc_u32 v10, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v18.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v11 :: v_dual_add_nc_u32 v11, v12, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v9.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v8 :: v_dual_add_nc_u32 v8, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v10, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v34.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v13
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.l, v34.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v10, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v13 :: v_dual_add_nc_u32 v12, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v33, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v48.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.l, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v33.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.l, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.l, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.h, v29.l
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v10 :: v_dual_add_nc_u32 v10, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_add_nc_u32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v39.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v31.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v32.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v33.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v13, v14 :: v_dual_add_nc_u32 v13, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v36, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v14, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v37, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v36, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v52, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v12
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v49.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v51 :: v_dual_add_nc_u32 v10, v10, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v37, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, 0x400000, v37
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v14, v48, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v36
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v37
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, 0x400000, v38
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.l, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 24, v66
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v39, v48, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v36.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v14
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v49, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v39.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v66
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 24, v52
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v37.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v70
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 8, v70
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v82
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v82
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v11.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[51:52]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[53:54]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[65:66]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[69:70]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[81:82]
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v25.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v15, v51, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v20.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v52, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.l, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v24.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v19.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 24, v67
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v54.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 24, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v80
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v84
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[66:67]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[68:69]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[80:81]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[83:84]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[85:86]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v52
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 24, v54
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v54
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v53
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 8, v53
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v65
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 8, v65
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v81
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v84
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v83
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v86
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v86
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX11-TRUE16-NEXT: s_branch .LBB109_5
; GFX11-TRUE16-NEXT: .LBB109_3:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr95
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: s_branch .LBB109_2
; GFX11-TRUE16-NEXT: .LBB109_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s26 :: v_dual_mov_b32 v36, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s49 :: v_dual_mov_b32 v39, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s25 :: v_dual_mov_b32 v34, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s48 :: v_dual_mov_b32 v30, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s39 :: v_dual_mov_b32 v31, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s21 :: v_dual_mov_b32 v28, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s38 :: v_dual_mov_b32 v26, s37
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s19 :: v_dual_mov_b32 v24, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s17 :: v_dual_mov_b32 v23, s36
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v20, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s3 :: v_dual_mov_b32 v18, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v17, s34
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s31 :: v_dual_mov_b32 v49, s93
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s30 :: v_dual_mov_b32 v15, vcc_hi
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s95 :: v_dual_mov_b32 v53, s94
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s89 :: v_dual_mov_b32 v51, s92
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s91 :: v_dual_mov_b32 v65, s90
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s77 :: v_dual_mov_b32 v55, s88
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s79 :: v_dual_mov_b32 v69, s78
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s73 :: v_dual_mov_b32 v67, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s75 :: v_dual_mov_b32 v81, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s61 :: v_dual_mov_b32 v71, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s63 :: v_dual_mov_b32 v5, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s57 :: v_dual_mov_b32 v6, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s59 :: v_dual_mov_b32 v3, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s45 :: v_dual_mov_b32 v4, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s47 :: v_dual_mov_b32 v1, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s43 :: v_dual_mov_b32 v2, s44
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s26 :: v_dual_mov_b32 v51, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s49 :: v_dual_mov_b32 v53, s48
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v50, s39
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v48, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s38 :: v_dual_mov_b32 v38, s37
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s23 :: v_dual_mov_b32 v37, s36
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v36, s35
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v33, s34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s18 :: v_dual_mov_b32 v32, s31
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, s30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s16 :: v_dual_mov_b32 v27, vcc_hi
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v22, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s95 :: v_dual_mov_b32 v24, s94
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s3 :: v_dual_mov_b32 v21, s93
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s92
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v17, s91
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s90 :: v_dual_mov_b32 v65, s78
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s88 :: v_dual_mov_b32 v68, s89
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s75 :: v_dual_mov_b32 v66, s77
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s79 :: v_dual_mov_b32 v70, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s74 :: v_dual_mov_b32 v82, s61
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s76 :: v_dual_mov_b32 v80, s63
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s73 :: v_dual_mov_b32 v84, s58
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s60 :: v_dual_mov_b32 v86, s47
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s62 :: v_dual_mov_b32 v6, s57
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s59 :: v_dual_mov_b32 v4, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v96, s43
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s44
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s40 :: v_dual_mov_b32 v8, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v10, s12
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, s8
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s6 :: v_dual_mov_b32 v14, s4
; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v96, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v19, v14, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v1, v18, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v86, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v84, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v24, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v27, v12, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_perm_b32 v2, v16, v2, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v21, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v22, v3, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v23, v83, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v20, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v24, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v82, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v25, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v21, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v26, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v32, v11, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v22, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v23, v6, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v13
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v17
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v5, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v26, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v84, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v4, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v28, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v20, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v31, v85, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v6, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v70, v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v29, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v66, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v25, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v36, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v33, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v38, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v28, v83, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v31, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v35, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v27, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v30, v80, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v34, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v48, v71, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v6, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v32, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v37, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v10
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v17, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v54, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v33, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v50, v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v30, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v50, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v39, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v54, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v53, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v34, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v39, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v55, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v35, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v49, v66, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v37, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v52, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v36, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v51, v15, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v8, v5
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
@@ -89090,46 +89084,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s49, 9
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s27, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s27, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s27, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s26, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s26, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s25, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s25, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s25, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s24, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s24, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s23, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s23, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s23, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s22, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s22, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s21, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s20, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s19, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s19, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s18, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s17, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s17, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s16, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s16, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s3, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s3, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s1, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
@@ -89170,7 +89164,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s3
@@ -89180,473 +89174,468 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v4, v6 :: v_dual_and_b32 v5, 0xffff, v16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v3
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v16
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v4
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v1, v11 :: v_dual_add_nc_u32 v4, v6, v9
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v5
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v7
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v5, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v17, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v4, v7, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v18, 16, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v4, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v19, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v9, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v10, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v3, v11, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v13, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v3, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v12, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v22, 16, v6
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v10, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v9
; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v11, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v22
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v12, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v2
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v15, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v11, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v10
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v23
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v84, v21, 16, v11
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v12, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v10
; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v83, v5, 16, v13
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v25
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v97, v23, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v96, v27, 16, v12
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v97
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v15, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v96
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v6
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v24
; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v84, v26, 16, v10
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v7
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v8
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v82, v24, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v11, v6
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v8
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v82
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v82
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v10, v25, vcc_lo
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v10, v28, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v12, v26, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v12, v29, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v11, v30, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v11, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v7
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v28
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v25
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v6
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v68, v26, 16, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v82, v29, 16, v7
; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v11
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v9, v28 :: v_dual_add_nc_u32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v11, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v12, v12, v10
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v29, v12
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v31, v11
; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v30, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v11
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v81, v5, 16, v10
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v66, v29, 16, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v31, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v30
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v70, v33, 16, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 24, v66
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v31, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v81, v35, 16, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v11, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v8, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v31
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v34, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v39, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v13, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v36, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v39, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v8, v11, v13 :: v_dual_add_nc_u32 v11, v32, v31
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v33, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v36, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v34, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v39
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v49, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v39
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v49, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v33, v33, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v66
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v81
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v33
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v34
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v36, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v35, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v81
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v33, v36
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v11, v49
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v35, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v38, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v11, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v35, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v48, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v38, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v37, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v36, v39, v35
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v35
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v39, v49, v38
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v34, v34, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v36, 0x7fff, v36
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v48, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v38
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v39, 0x7fff, v39
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v34, 0x7fff, v34
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v36, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v37, v37, v48
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v39, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v36, 0x7fff, v37
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v48
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v52, v33, 16, v13
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v67, v6, 16, v12
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v34, v49, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v38
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v39, v36, v37 :: v_dual_and_b32 v48, 0xffff, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v34
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v38, 0xffff, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v39
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v39, 0xffff, v37
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v65, v7, 16, v48
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v50, v36, 16, v8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v49, v11, 16, v38
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v51, v9, 16, v39
+; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v6, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v12 :: v_dual_add_nc_u32 v12, v50, v11
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v51, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v50, v52, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v51, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v50, 0x7fff, v50
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v12, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v49, v49, v51
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v51
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v50, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v36
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v8, v52, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v37
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v67, v39, 16, v10
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v83, v32, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v12, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v49
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v50
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v69, v38, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v53
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v65, v51, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 24, v82
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v64, v52, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v66, v48, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v81
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[49:50]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[51:52]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[65:66]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[67:68]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[81:82]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[83:84]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[64:65]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[66:67]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[69:70]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[81:82]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[83:84]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[96:97]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v49
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v49
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 24, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v51
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v51
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 24, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v67
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 8, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v82
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v84
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v84
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v97
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX11-FAKE16-NEXT: s_branch .LBB109_5
; GFX11-FAKE16-NEXT: .LBB109_3:
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: s_branch .LBB109_2
; GFX11-FAKE16-NEXT: .LBB109_4:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s26 :: v_dual_mov_b32 v34, s27
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s49 :: v_dual_mov_b32 v37, s24
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s25 :: v_dual_mov_b32 v32, s22
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s48 :: v_dual_mov_b32 v28, s23
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s39 :: v_dual_mov_b32 v30, s20
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s21 :: v_dual_mov_b32 v26, s38
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v22, s19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s37 :: v_dual_mov_b32 v23, s16
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v21, s36
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s2 :: v_dual_mov_b32 v18, s35
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s3 :: v_dual_mov_b32 v16, s0
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v15, s34
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s31 :: v_dual_mov_b32 v39, s93
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s30 :: v_dual_mov_b32 v13, vcc_hi
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s95 :: v_dual_mov_b32 v51, s94
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s89 :: v_dual_mov_b32 v49, s92
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s91 :: v_dual_mov_b32 v55, s90
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s77 :: v_dual_mov_b32 v53, s88
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v68, s79 :: v_dual_mov_b32 v67, s78
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s73 :: v_dual_mov_b32 v65, s76
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s75 :: v_dual_mov_b32 v71, s74
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v70, s61 :: v_dual_mov_b32 v69, s72
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s63 :: v_dual_mov_b32 v83, s62
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s57 :: v_dual_mov_b32 v81, s60
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s59 :: v_dual_mov_b32 v3, s58
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s45 :: v_dual_mov_b32 v4, s56
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s47 :: v_dual_mov_b32 v1, s46
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s43 :: v_dual_mov_b32 v2, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s26 :: v_dual_mov_b32 v49, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s49 :: v_dual_mov_b32 v51, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s24 :: v_dual_mov_b32 v48, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s25 :: v_dual_mov_b32 v39, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s22 :: v_dual_mov_b32 v38, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s23 :: v_dual_mov_b32 v34, s20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s36 :: v_dual_mov_b32 v28, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s35 :: v_dual_mov_b32 v30, s18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s34 :: v_dual_mov_b32 v32, s31
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s19 :: v_dual_mov_b32 v25, s16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s30 :: v_dual_mov_b32 v27, vcc_hi
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s17 :: v_dual_mov_b32 v20, s2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s95 :: v_dual_mov_b32 v22, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s3 :: v_dual_mov_b32 v19, s93
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s0 :: v_dual_mov_b32 v17, s92
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v15, s91
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s90 :: v_dual_mov_b32 v55, s78
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s88 :: v_dual_mov_b32 v66, s89
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s75 :: v_dual_mov_b32 v64, s77
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s79 :: v_dual_mov_b32 v68, s72
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s74 :: v_dual_mov_b32 v80, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s76 :: v_dual_mov_b32 v70, s63
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s73 :: v_dual_mov_b32 v82, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s60 :: v_dual_mov_b32 v86, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s62 :: v_dual_mov_b32 v84, s57
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s59 :: v_dual_mov_b32 v4, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v96, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s44
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s40 :: v_dual_mov_b32 v6, s28
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v8, s12
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s8
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s4
; GFX11-FAKE16-NEXT: .LBB109_5: ; %end
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v96, v12, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v17, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v96, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v16, v1, 0xc0c0004
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v22, v11, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v2, v14, v2, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v84, v10, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v19, v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v27, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v20, v3, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v18, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v19, v87, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v21, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v23, v86, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v23, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v80, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v25, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v32, v9, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v11
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v20, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v21, v84, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v17, v4, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v27, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v18, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v30, v83, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v24, v70, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v68, v8, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v26, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v35, v8, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v26, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v29, v80, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v11
; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v17
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v22, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v24, v81, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v30, v67, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v64, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v34, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v38, v7, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v25, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v28, v70, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v32, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v37, v69, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v16, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v29, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v33, v68, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v52, v6, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v33, v50, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v48, v5, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v36, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v48, v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v39, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v52, v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v51, v55, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v18, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v28, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v31, v67, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v37, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v53, v66, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v31, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v36, v64, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v35, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v50, v54, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v34, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v49, v13, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v7, v8
; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v18, v6
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
index 45e835ddb0e28..abc2f8ddbfca9 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
@@ -16428,28 +16428,28 @@ define <8 x i8> @bitcast_v4bf16_to_v8i8(<4 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_perm_b32 v10, v1, v0, s7
-; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
-; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v9
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v9
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
; GFX9-NEXT: v_add3_u32 v3, v3, v2, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; GFX9-NEXT: v_perm_b32 v11, v1, v2, s7
+; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add3_u32 v4, v4, v3, s6
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
+; GFX9-NEXT: v_perm_b32 v10, v1, v0, s7
+; GFX9-NEXT: v_perm_b32 v11, v2, v3, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v3
; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[10:11]
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v11
@@ -16595,12 +16595,11 @@ define <8 x i8> @bitcast_v4bf16_to_v8i8(<4 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v9, v4, vcc_lo
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_perm_b32 v11, v2, v3, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v10
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[10:11]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v11
@@ -16771,10 +16770,10 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX9-NEXT: s_cbranch_scc0 .LBB109_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24
-; GFX9-NEXT: s_lshr_b32 s9, s17, 24
+; GFX9-NEXT: s_lshr_b32 s8, s17, 24
; GFX9-NEXT: s_lshr_b32 s11, s17, 16
-; GFX9-NEXT: s_lshr_b32 s10, s17, 8
-; GFX9-NEXT: s_lshr_b32 s8, s16, 16
+; GFX9-NEXT: s_lshr_b32 s9, s17, 8
+; GFX9-NEXT: s_lshr_b32 s10, s16, 16
; GFX9-NEXT: s_lshr_b32 s5, s16, 8
; GFX9-NEXT: s_cbranch_execnz .LBB109_4
; GFX9-NEXT: .LBB109_2: ; %cmp.true
@@ -16800,27 +16799,26 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v0
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s17
; GFX9-NEXT: v_lshl_or_b32 v9, v2, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v2, s4, v1
-; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
-; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_add_f32_e32 v3, s4, v1
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: s_lshl_b32 s4, s17, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
-; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
-; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
+; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v8
; GFX9-NEXT: v_lshl_or_b32 v10, v6, 16, v1
; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[9:10]
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v10
@@ -16828,18 +16826,18 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX9-NEXT: s_setpc_b64 s[30:31]
; GFX9-NEXT: .LBB109_3:
; GFX9-NEXT: ; implicit-def: $sgpr5
-; GFX9-NEXT: ; implicit-def: $sgpr8
-; GFX9-NEXT: ; implicit-def: $sgpr4
; GFX9-NEXT: ; implicit-def: $sgpr10
-; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr4
; GFX9-NEXT: ; implicit-def: $sgpr9
+; GFX9-NEXT: ; implicit-def: $sgpr11
+; GFX9-NEXT: ; implicit-def: $sgpr8
; GFX9-NEXT: s_branch .LBB109_2
; GFX9-NEXT: .LBB109_4:
; GFX9-NEXT: v_mov_b32_e32 v6, s11
; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v7, s9
-; GFX9-NEXT: v_mov_b32_e32 v5, s10
-; GFX9-NEXT: v_mov_b32_e32 v2, s8
+; GFX9-NEXT: v_mov_b32_e32 v2, s10
+; GFX9-NEXT: v_mov_b32_e32 v7, s8
+; GFX9-NEXT: v_mov_b32_e32 v5, s9
; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s17
@@ -16853,10 +16851,10 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s1, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s1, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s0, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 8
; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4
; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB109_4
@@ -16864,51 +16862,49 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v0, 0x40c00000, s2
-; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_pack_lh_b32_b16 s2, 0, s1
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s1, 16
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s2
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v0
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v7 :: v_dual_add_nc_u32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v5, v9 :: v_dual_add_nc_u32 v6, 0x7fff, v6
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v0, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v2.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v1.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v8.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v9
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v6.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[9:10]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v10
@@ -16916,16 +16912,16 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB109_3:
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr3
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr2
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr2
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
; GFX11-TRUE16-NEXT: s_branch .LBB109_2
; GFX11-TRUE16-NEXT: .LBB109_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v5, s7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v1, s3
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v5, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v1, s3
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s1
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -16937,10 +16933,10 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: s_lshr_b64 s[2:3], s[0:1], 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s1, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s1, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s1, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s1, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s0, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s0, 8
; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s4
; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB109_4
@@ -16989,9 +16985,8 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v2, 16, v3
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v6, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[9:10]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v10
@@ -16999,16 +16994,16 @@ define inreg <8 x i8> @bitcast_v4bf16_to_v8i8_scalar(<4 x bfloat> inreg %a, i32
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-FAKE16-NEXT: .LBB109_3:
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr3
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr2
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
; GFX11-FAKE16-NEXT: s_branch .LBB109_2
; GFX11-FAKE16-NEXT: .LBB109_4:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s6
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v5, s7
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v1, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v5, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v1, s3
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s1
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
index 687bea385a266..be173c0924b6b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
@@ -7686,44 +7686,44 @@ define <12 x i8> @bitcast_v6bf16_to_v12i8(<6 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_add3_u32 v4, v4, v0, s6
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v13
-; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add3_u32 v5, v5, v4, s6
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v8
-; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add3_u32 v6, v6, v5, s6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v8
+; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v13
+; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc
+; GFX9-NEXT: v_bfe_u32 v5, v0, 16, 1
+; GFX9-NEXT: v_add3_u32 v5, v5, v0, s6
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v0
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc
+; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v8
; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
; GFX9-NEXT: v_add3_u32 v7, v7, v6, s6
-; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add3_u32 v8, v8, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: v_perm_b32 v1, v2, v3, s7
-; GFX9-NEXT: v_perm_b32 v0, v0, v4, s7
-; GFX9-NEXT: v_perm_b32 v11, v5, v7, s7
+; GFX9-NEXT: v_perm_b32 v0, v4, v5, s7
+; GFX9-NEXT: v_perm_b32 v11, v6, v7, s7
; GFX9-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v4
; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1]
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v11
; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: .LBB38_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
@@ -7917,12 +7917,13 @@ define <12 x i8> @bitcast_v6bf16_to_v12i8(<6 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v4, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
; GFX11-FAKE16-NEXT: v_add3_u32 v1, v1, v5, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v3, 0x7060302
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v9, v10, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v1, v11, vcc_lo
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v6, v7, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
@@ -7932,7 +7933,6 @@ define <12 x i8> @bitcast_v6bf16_to_v12i8(<6 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -8156,108 +8156,106 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX9-NEXT: s_cmp_lg_u32 s19, 0
; GFX9-NEXT: s_cbranch_scc0 .LBB39_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s19, s17, 16
-; GFX9-NEXT: s_lshr_b32 s15, s18, 16
-; GFX9-NEXT: s_lshr_b32 s14, s18, 8
+; GFX9-NEXT: s_lshr_b32 s19, s18, 16
+; GFX9-NEXT: s_lshr_b32 s12, s18, 8
; GFX9-NEXT: s_lshr_b32 s10, s17, 24
+; GFX9-NEXT: s_lshr_b32 s14, s17, 16
; GFX9-NEXT: s_lshr_b32 s11, s17, 8
-; GFX9-NEXT: s_lshr_b32 s13, s16, 16
-; GFX9-NEXT: s_lshr_b32 s12, s16, 8
+; GFX9-NEXT: s_lshr_b32 s15, s16, 16
+; GFX9-NEXT: s_lshr_b32 s13, s16, 8
; GFX9-NEXT: s_lshr_b64 s[6:7], s[18:19], 24
; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24
; GFX9-NEXT: s_cbranch_execnz .LBB39_4
; GFX9-NEXT: .LBB39_2: ; %cmp.true
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s17
-; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX9-NEXT: v_mov_b32_e32 v1, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s4, s17, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v0
; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v13
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s16
-; GFX9-NEXT: v_lshl_or_b32 v2, v6, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v1, v1, v0
-; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1
-; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0
+; GFX9-NEXT: v_lshl_or_b32 v15, v6, 16, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s4, s16, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX9-NEXT: v_add_f32_e32 v0, s4, v3
-; GFX9-NEXT: v_bfe_u32 v4, v0, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v0
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX9-NEXT: v_add_f32_e32 v0, s4, v1
+; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v0
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v0
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v0
; GFX9-NEXT: s_pack_lh_b32_b16 s4, 0, s18
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v4, s4, v3
-; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v4
-; GFX9-NEXT: s_lshl_b32 s4, s18, 16
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_add_f32_e32 v3, s4, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc
-; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v3
+; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s4, v1
+; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v8
-; GFX9-NEXT: v_lshl_or_b32 v11, v4, 16, v3
+; GFX9-NEXT: s_lshl_b32 s4, s18, 16
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
+; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v3
+; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v1
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v8
+; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v1
; GFX9-NEXT: v_mov_b32_e32 v12, 0x7fc07fc0
-; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v11
; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v14
; GFX9-NEXT: v_mov_b32_e32 v4, v13
; GFX9-NEXT: s_setpc_b64 s[30:31]
; GFX9-NEXT: .LBB39_3:
-; GFX9-NEXT: ; implicit-def: $sgpr12
; GFX9-NEXT: ; implicit-def: $sgpr13
+; GFX9-NEXT: ; implicit-def: $sgpr15
; GFX9-NEXT: ; implicit-def: $sgpr4
; GFX9-NEXT: ; implicit-def: $sgpr11
-; GFX9-NEXT: ; implicit-def: $sgpr19
-; GFX9-NEXT: ; implicit-def: $sgpr10
; GFX9-NEXT: ; implicit-def: $sgpr14
-; GFX9-NEXT: ; implicit-def: $sgpr15
+; GFX9-NEXT: ; implicit-def: $sgpr10
+; GFX9-NEXT: ; implicit-def: $sgpr12
+; GFX9-NEXT: ; implicit-def: $sgpr19
; GFX9-NEXT: ; implicit-def: $sgpr6
; GFX9-NEXT: s_branch .LBB39_2
; GFX9-NEXT: .LBB39_4:
; GFX9-NEXT: v_mov_b32_e32 v8, s18
+; GFX9-NEXT: v_mov_b32_e32 v10, s19
; GFX9-NEXT: v_mov_b32_e32 v0, s16
-; GFX9-NEXT: v_mov_b32_e32 v6, s19
-; GFX9-NEXT: v_mov_b32_e32 v10, s15
-; GFX9-NEXT: v_mov_b32_e32 v9, s14
-; GFX9-NEXT: v_mov_b32_e32 v2, s13
-; GFX9-NEXT: v_mov_b32_e32 v1, s12
+; GFX9-NEXT: v_mov_b32_e32 v2, s15
+; GFX9-NEXT: v_mov_b32_e32 v6, s14
+; GFX9-NEXT: v_mov_b32_e32 v9, s12
+; GFX9-NEXT: v_mov_b32_e32 v1, s13
; GFX9-NEXT: v_mov_b32_e32 v7, s10
; GFX9-NEXT: v_mov_b32_e32 v5, s11
; GFX9-NEXT: v_mov_b32_e32 v11, s6
@@ -8272,13 +8270,13 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB39_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s2, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s0, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3
@@ -8322,65 +8320,63 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v6.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, v0, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x7fff, v0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v6.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v2.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v8.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v3.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v14
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v13
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v10.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, v13
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-TRUE16-NEXT: .LBB39_3:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
; GFX11-TRUE16-NEXT: s_branch .LBB39_2
; GFX11-TRUE16-NEXT: .LBB39_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v1, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v7, s8
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v5, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v11, s6
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -8391,13 +8387,13 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB39_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s2, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s2, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s1, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s14, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s1, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s1, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s0, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s0, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[6:7], s[2:3], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[4:5], s[0:1], 24
; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s3
@@ -8455,51 +8451,48 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v9 :: v_dual_add_nc_u32 v3, v3, v7
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v6, 16, v3
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v4, 16, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v7, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v2
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v2, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v6, 16, v3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v10, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[14:15]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 24, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v14
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, v13
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
; GFX11-FAKE16-NEXT: .LBB39_3:
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr13
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
; GFX11-FAKE16-NEXT: s_branch .LBB39_2
; GFX11-FAKE16-NEXT: .LBB39_4:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s12
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s10
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s8
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v5, s9
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s11 :: v_dual_mov_b32 v11, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s10
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v1, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v7, s8
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v5, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v11, s6
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s1
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
%cmp = icmp eq i32 %b, 0
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
index 1e79c4f63cd42..5ed29cd95b0c9 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
@@ -237,28 +237,21 @@ define amdgpu_kernel void @memcpy_known(ptr addrspace(7) %src, ptr addrspace(7)
; SDAG-GFX942-LABEL: memcpy_known:
; SDAG-GFX942: ; %bb.0:
; SDAG-GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; SDAG-GFX942-NEXT: s_load_dword s17, s[4:5], 0x34
+; SDAG-GFX942-NEXT: s_load_dword s7, s[4:5], 0x34
; SDAG-GFX942-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x44
-; SDAG-GFX942-NEXT: s_load_dword s12, s[4:5], 0x54
-; SDAG-GFX942-NEXT: s_mov_b32 s16, 0
-; SDAG-GFX942-NEXT: s_mov_b32 s5, s16
+; SDAG-GFX942-NEXT: s_load_dword s15, s[4:5], 0x54
; SDAG-GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX942-NEXT: s_mov_b32 s4, s3
-; SDAG-GFX942-NEXT: s_or_b64 s[6:7], s[4:5], s[16:17]
-; SDAG-GFX942-NEXT: s_mov_b32 s17, s2
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s1
-; SDAG-GFX942-NEXT: s_mov_b32 s3, s16
-; SDAG-GFX942-NEXT: s_or_b64 s[4:5], s[2:3], s[16:17]
-; SDAG-GFX942-NEXT: s_mov_b32 s17, s12
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s11
-; SDAG-GFX942-NEXT: s_or_b64 s[14:15], s[2:3], s[16:17]
-; SDAG-GFX942-NEXT: s_mov_b32 s17, s10
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s9
-; SDAG-GFX942-NEXT: s_or_b64 s[12:13], s[2:3], s[16:17]
+; SDAG-GFX942-NEXT: s_mov_b32 s6, s3
+; SDAG-GFX942-NEXT: s_mov_b32 s4, s1
+; SDAG-GFX942-NEXT: s_mov_b32 s5, s2
+; SDAG-GFX942-NEXT: s_mov_b32 s14, s11
+; SDAG-GFX942-NEXT: s_mov_b32 s12, s9
+; SDAG-GFX942-NEXT: s_mov_b32 s13, s10
+; SDAG-GFX942-NEXT: s_mov_b32 s1, 0
; SDAG-GFX942-NEXT: .LBB0_1: ; %static-memcpy-expansion-main-body
; SDAG-GFX942-NEXT: ; =>This Inner Loop Header: Depth=1
-; SDAG-GFX942-NEXT: s_add_i32 s1, s0, s16
-; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s1
+; SDAG-GFX942-NEXT: s_add_i32 s2, s0, s1
+; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s2
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[2:5], v0, s[4:7], 0 offen
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[6:9], v0, s[4:7], 0 offen offset:16
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[10:13], v0, s[4:7], 0 offen offset:32
@@ -275,10 +268,10 @@ define amdgpu_kernel void @memcpy_known(ptr addrspace(7) %src, ptr addrspace(7)
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[54:57], v0, s[4:7], 0 offen offset:208
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[58:61], v0, s[4:7], 0 offen offset:224
; SDAG-GFX942-NEXT: buffer_load_dwordx4 a[0:3], v0, s[4:7], 0 offen offset:240
-; SDAG-GFX942-NEXT: s_add_i32 s1, s8, s16
-; SDAG-GFX942-NEXT: s_addk_i32 s16, 0x100
-; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s1
-; SDAG-GFX942-NEXT: s_cmpk_lt_u32 s16, 0x2000
+; SDAG-GFX942-NEXT: s_add_i32 s2, s8, s1
+; SDAG-GFX942-NEXT: s_addk_i32 s1, 0x100
+; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s2
+; SDAG-GFX942-NEXT: s_cmpk_lt_u32 s1, 0x2000
; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15)
; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v0, s[12:15], 0 offen
; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15)
@@ -319,37 +312,26 @@ define amdgpu_kernel void @memcpy_known(ptr addrspace(7) %src, ptr addrspace(7)
; SDAG-GFX1100: ; %bb.0:
; SDAG-GFX1100-NEXT: s_clause 0x3
; SDAG-GFX1100-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; SDAG-GFX1100-NEXT: s_load_b32 s17, s[4:5], 0x34
; SDAG-GFX1100-NEXT: s_load_b128 s[8:11], s[4:5], 0x44
-; SDAG-GFX1100-NEXT: s_load_b32 s18, s[4:5], 0x54
-; SDAG-GFX1100-NEXT: s_mov_b32 s16, 0
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: s_mov_b32 s5, s16
-; SDAG-GFX1100-NEXT: s_mov_b32 s13, s16
-; SDAG-GFX1100-NEXT: s_mov_b32 s15, s16
+; SDAG-GFX1100-NEXT: s_load_b32 s7, s[4:5], 0x34
+; SDAG-GFX1100-NEXT: s_load_b32 s15, s[4:5], 0x54
; SDAG-GFX1100-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX1100-NEXT: s_mov_b32 s4, s3
-; SDAG-GFX1100-NEXT: s_mov_b32 s12, s1
-; SDAG-GFX1100-NEXT: s_or_b64 s[6:7], s[4:5], s[16:17]
-; SDAG-GFX1100-NEXT: s_mov_b32 s17, s2
+; SDAG-GFX1100-NEXT: s_mov_b32 s6, s3
+; SDAG-GFX1100-NEXT: s_mov_b32 s4, s1
+; SDAG-GFX1100-NEXT: s_mov_b32 s5, s2
; SDAG-GFX1100-NEXT: s_mov_b32 s14, s11
-; SDAG-GFX1100-NEXT: s_or_b64 s[4:5], s[12:13], s[16:17]
-; SDAG-GFX1100-NEXT: s_mov_b32 s17, s18
-; SDAG-GFX1100-NEXT: s_mov_b32 s2, s9
-; SDAG-GFX1100-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]
-; SDAG-GFX1100-NEXT: s_mov_b32 s17, s10
-; SDAG-GFX1100-NEXT: s_mov_b32 s3, s16
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: s_or_b64 s[12:13], s[2:3], s[16:17]
+; SDAG-GFX1100-NEXT: s_mov_b32 s12, s9
+; SDAG-GFX1100-NEXT: s_mov_b32 s13, s10
+; SDAG-GFX1100-NEXT: s_mov_b32 s1, 0
; SDAG-GFX1100-NEXT: .LBB0_1: ; %static-memcpy-expansion-main-body
; SDAG-GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1
-; SDAG-GFX1100-NEXT: s_add_i32 s1, s0, s16
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: v_mov_b32_e32 v60, s1
-; SDAG-GFX1100-NEXT: s_add_i32 s1, s8, s16
-; SDAG-GFX1100-NEXT: s_addk_i32 s16, 0x100
-; SDAG-GFX1100-NEXT: v_mov_b32_e32 v64, s1
-; SDAG-GFX1100-NEXT: s_cmpk_lt_u32 s16, 0x2000
+; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; SDAG-GFX1100-NEXT: s_add_i32 s2, s0, s1
+; SDAG-GFX1100-NEXT: v_mov_b32_e32 v60, s2
+; SDAG-GFX1100-NEXT: s_add_i32 s2, s8, s1
+; SDAG-GFX1100-NEXT: s_addk_i32 s1, 0x100
+; SDAG-GFX1100-NEXT: v_mov_b32_e32 v64, s2
+; SDAG-GFX1100-NEXT: s_cmpk_lt_u32 s1, 0x2000
; SDAG-GFX1100-NEXT: s_clause 0xf
; SDAG-GFX1100-NEXT: buffer_load_b128 v[0:3], v60, s[4:7], 0 offen
; SDAG-GFX1100-NEXT: buffer_load_b128 v[4:7], v60, s[4:7], 0 offen offset:16
@@ -769,28 +751,21 @@ define amdgpu_kernel void @memcpy_known_medium(ptr addrspace(7) %src, ptr addrsp
; SDAG-GFX942-LABEL: memcpy_known_medium:
; SDAG-GFX942: ; %bb.0:
; SDAG-GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; SDAG-GFX942-NEXT: s_load_dword s17, s[4:5], 0x34
+; SDAG-GFX942-NEXT: s_load_dword s7, s[4:5], 0x34
; SDAG-GFX942-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x44
-; SDAG-GFX942-NEXT: s_load_dword s12, s[4:5], 0x54
-; SDAG-GFX942-NEXT: s_mov_b32 s16, 0
-; SDAG-GFX942-NEXT: s_mov_b32 s5, s16
+; SDAG-GFX942-NEXT: s_load_dword s15, s[4:5], 0x54
; SDAG-GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX942-NEXT: s_mov_b32 s4, s3
-; SDAG-GFX942-NEXT: s_or_b64 s[6:7], s[4:5], s[16:17]
-; SDAG-GFX942-NEXT: s_mov_b32 s17, s2
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s1
-; SDAG-GFX942-NEXT: s_mov_b32 s3, s16
-; SDAG-GFX942-NEXT: s_or_b64 s[4:5], s[2:3], s[16:17]
-; SDAG-GFX942-NEXT: s_mov_b32 s17, s12
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s11
-; SDAG-GFX942-NEXT: s_or_b64 s[14:15], s[2:3], s[16:17]
-; SDAG-GFX942-NEXT: s_mov_b32 s17, s10
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s9
-; SDAG-GFX942-NEXT: s_or_b64 s[12:13], s[2:3], s[16:17]
+; SDAG-GFX942-NEXT: s_mov_b32 s6, s3
+; SDAG-GFX942-NEXT: s_mov_b32 s4, s1
+; SDAG-GFX942-NEXT: s_mov_b32 s5, s2
+; SDAG-GFX942-NEXT: s_mov_b32 s14, s11
+; SDAG-GFX942-NEXT: s_mov_b32 s12, s9
+; SDAG-GFX942-NEXT: s_mov_b32 s13, s10
+; SDAG-GFX942-NEXT: s_mov_b32 s1, 0
; SDAG-GFX942-NEXT: .LBB1_1: ; %static-memcpy-expansion-main-body
; SDAG-GFX942-NEXT: ; =>This Inner Loop Header: Depth=1
-; SDAG-GFX942-NEXT: s_add_i32 s1, s0, s16
-; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s1
+; SDAG-GFX942-NEXT: s_add_i32 s2, s0, s1
+; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s2
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[2:5], v0, s[4:7], 0 offen
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[6:9], v0, s[4:7], 0 offen offset:16
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[10:13], v0, s[4:7], 0 offen offset:32
@@ -807,10 +782,10 @@ define amdgpu_kernel void @memcpy_known_medium(ptr addrspace(7) %src, ptr addrsp
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[54:57], v0, s[4:7], 0 offen offset:208
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[58:61], v0, s[4:7], 0 offen offset:224
; SDAG-GFX942-NEXT: buffer_load_dwordx4 a[0:3], v0, s[4:7], 0 offen offset:240
-; SDAG-GFX942-NEXT: s_add_i32 s1, s8, s16
-; SDAG-GFX942-NEXT: s_addk_i32 s16, 0x100
-; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s1
-; SDAG-GFX942-NEXT: s_cmpk_lt_u32 s16, 0x100
+; SDAG-GFX942-NEXT: s_add_i32 s2, s8, s1
+; SDAG-GFX942-NEXT: s_addk_i32 s1, 0x100
+; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s2
+; SDAG-GFX942-NEXT: s_cmpk_lt_u32 s1, 0x100
; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15)
; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v0, s[12:15], 0 offen
; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15)
@@ -851,37 +826,26 @@ define amdgpu_kernel void @memcpy_known_medium(ptr addrspace(7) %src, ptr addrsp
; SDAG-GFX1100: ; %bb.0:
; SDAG-GFX1100-NEXT: s_clause 0x3
; SDAG-GFX1100-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; SDAG-GFX1100-NEXT: s_load_b32 s17, s[4:5], 0x34
; SDAG-GFX1100-NEXT: s_load_b128 s[8:11], s[4:5], 0x44
-; SDAG-GFX1100-NEXT: s_load_b32 s18, s[4:5], 0x54
-; SDAG-GFX1100-NEXT: s_mov_b32 s16, 0
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: s_mov_b32 s5, s16
-; SDAG-GFX1100-NEXT: s_mov_b32 s13, s16
-; SDAG-GFX1100-NEXT: s_mov_b32 s15, s16
+; SDAG-GFX1100-NEXT: s_load_b32 s7, s[4:5], 0x34
+; SDAG-GFX1100-NEXT: s_load_b32 s15, s[4:5], 0x54
; SDAG-GFX1100-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX1100-NEXT: s_mov_b32 s4, s3
-; SDAG-GFX1100-NEXT: s_mov_b32 s12, s1
-; SDAG-GFX1100-NEXT: s_or_b64 s[6:7], s[4:5], s[16:17]
-; SDAG-GFX1100-NEXT: s_mov_b32 s17, s2
+; SDAG-GFX1100-NEXT: s_mov_b32 s6, s3
+; SDAG-GFX1100-NEXT: s_mov_b32 s4, s1
+; SDAG-GFX1100-NEXT: s_mov_b32 s5, s2
; SDAG-GFX1100-NEXT: s_mov_b32 s14, s11
-; SDAG-GFX1100-NEXT: s_or_b64 s[4:5], s[12:13], s[16:17]
-; SDAG-GFX1100-NEXT: s_mov_b32 s17, s18
-; SDAG-GFX1100-NEXT: s_mov_b32 s2, s9
-; SDAG-GFX1100-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]
-; SDAG-GFX1100-NEXT: s_mov_b32 s17, s10
-; SDAG-GFX1100-NEXT: s_mov_b32 s3, s16
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: s_or_b64 s[12:13], s[2:3], s[16:17]
+; SDAG-GFX1100-NEXT: s_mov_b32 s12, s9
+; SDAG-GFX1100-NEXT: s_mov_b32 s13, s10
+; SDAG-GFX1100-NEXT: s_mov_b32 s1, 0
; SDAG-GFX1100-NEXT: .LBB1_1: ; %static-memcpy-expansion-main-body
; SDAG-GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1
-; SDAG-GFX1100-NEXT: s_add_i32 s1, s0, s16
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: v_mov_b32_e32 v60, s1
-; SDAG-GFX1100-NEXT: s_add_i32 s1, s8, s16
-; SDAG-GFX1100-NEXT: s_addk_i32 s16, 0x100
-; SDAG-GFX1100-NEXT: v_mov_b32_e32 v64, s1
-; SDAG-GFX1100-NEXT: s_cmpk_lt_u32 s16, 0x100
+; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; SDAG-GFX1100-NEXT: s_add_i32 s2, s0, s1
+; SDAG-GFX1100-NEXT: v_mov_b32_e32 v60, s2
+; SDAG-GFX1100-NEXT: s_add_i32 s2, s8, s1
+; SDAG-GFX1100-NEXT: s_addk_i32 s1, 0x100
+; SDAG-GFX1100-NEXT: v_mov_b32_e32 v64, s2
+; SDAG-GFX1100-NEXT: s_cmpk_lt_u32 s1, 0x100
; SDAG-GFX1100-NEXT: s_clause 0xf
; SDAG-GFX1100-NEXT: buffer_load_b128 v[0:3], v60, s[4:7], 0 offen
; SDAG-GFX1100-NEXT: buffer_load_b128 v[4:7], v60, s[4:7], 0 offen offset:16
@@ -1130,28 +1094,19 @@ define amdgpu_kernel void @memcpy_known_small(ptr addrspace(7) %src, ptr addrspa
; SDAG-GFX942-LABEL: memcpy_known_small:
; SDAG-GFX942: ; %bb.0:
; SDAG-GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; SDAG-GFX942-NEXT: s_load_dword s13, s[4:5], 0x34
-; SDAG-GFX942-NEXT: s_mov_b32 s12, 0
-; SDAG-GFX942-NEXT: s_mov_b32 s7, s12
+; SDAG-GFX942-NEXT: s_load_dword s11, s[4:5], 0x34
; SDAG-GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX942-NEXT: s_mov_b32 s6, s3
-; SDAG-GFX942-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; SDAG-GFX942-NEXT: s_mov_b32 s13, s2
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s1
-; SDAG-GFX942-NEXT: s_mov_b32 s3, s12
-; SDAG-GFX942-NEXT: s_or_b64 s[8:9], s[2:3], s[12:13]
+; SDAG-GFX942-NEXT: s_mov_b32 s8, s1
+; SDAG-GFX942-NEXT: s_mov_b32 s9, s2
+; SDAG-GFX942-NEXT: s_mov_b32 s10, s3
; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s0
; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[2:5], v0, s[8:11], 0 offen
-; SDAG-GFX942-NEXT: s_load_dword s13, s[4:5], 0x54
; SDAG-GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x44
-; SDAG-GFX942-NEXT: s_mov_b32 s5, s12
+; SDAG-GFX942-NEXT: s_load_dword s7, s[4:5], 0x54
; SDAG-GFX942-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX942-NEXT: s_mov_b32 s4, s3
-; SDAG-GFX942-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; SDAG-GFX942-NEXT: s_mov_b32 s13, s2
-; SDAG-GFX942-NEXT: s_mov_b32 s2, s1
-; SDAG-GFX942-NEXT: s_mov_b32 s3, s12
-; SDAG-GFX942-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; SDAG-GFX942-NEXT: s_mov_b32 s4, s1
+; SDAG-GFX942-NEXT: s_mov_b32 s5, s2
+; SDAG-GFX942-NEXT: s_mov_b32 s6, s3
; SDAG-GFX942-NEXT: v_mov_b32_e32 v1, s0
; SDAG-GFX942-NEXT: s_waitcnt vmcnt(0)
; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v1, s[4:7], 0 offen
@@ -1164,32 +1119,21 @@ define amdgpu_kernel void @memcpy_known_small(ptr addrspace(7) %src, ptr addrspa
; SDAG-GFX1100: ; %bb.0:
; SDAG-GFX1100-NEXT: s_clause 0x1
; SDAG-GFX1100-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; SDAG-GFX1100-NEXT: s_load_b32 s13, s[4:5], 0x34
-; SDAG-GFX1100-NEXT: s_mov_b32 s12, 0
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: s_mov_b32 s7, s12
-; SDAG-GFX1100-NEXT: s_mov_b32 s9, s12
+; SDAG-GFX1100-NEXT: s_load_b32 s11, s[4:5], 0x34
; SDAG-GFX1100-NEXT: s_waitcnt lgkmcnt(0)
-; SDAG-GFX1100-NEXT: s_mov_b32 s6, s3
-; SDAG-GFX1100-NEXT: s_mov_b32 s8, s1
-; SDAG-GFX1100-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; SDAG-GFX1100-NEXT: s_mov_b32 s13, s2
; SDAG-GFX1100-NEXT: v_mov_b32_e32 v4, s0
-; SDAG-GFX1100-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; SDAG-GFX1100-NEXT: s_mov_b32 s8, s1
+; SDAG-GFX1100-NEXT: s_mov_b32 s9, s2
+; SDAG-GFX1100-NEXT: s_mov_b32 s10, s3
; SDAG-GFX1100-NEXT: s_clause 0x1
-; SDAG-GFX1100-NEXT: s_load_b32 s13, s[4:5], 0x54
; SDAG-GFX1100-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
-; SDAG-GFX1100-NEXT: s_mov_b32 s5, s12
+; SDAG-GFX1100-NEXT: s_load_b32 s7, s[4:5], 0x54
; SDAG-GFX1100-NEXT: s_waitcnt lgkmcnt(0)
; SDAG-GFX1100-NEXT: v_mov_b32_e32 v5, s0
; SDAG-GFX1100-NEXT: buffer_load_b128 v[0:3], v4, s[8:11], 0 offen
-; SDAG-GFX1100-NEXT: s_mov_b32 s4, s3
-; SDAG-GFX1100-NEXT: s_mov_b32 s3, s12
-; SDAG-GFX1100-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; SDAG-GFX1100-NEXT: s_mov_b32 s13, s2
-; SDAG-GFX1100-NEXT: s_mov_b32 s2, s1
-; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; SDAG-GFX1100-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; SDAG-GFX1100-NEXT: s_mov_b32 s4, s1
+; SDAG-GFX1100-NEXT: s_mov_b32 s5, s2
+; SDAG-GFX1100-NEXT: s_mov_b32 s6, s3
; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0)
; SDAG-GFX1100-NEXT: buffer_store_b128 v[0:3], v5, s[4:7], 0 offen
; SDAG-GFX1100-NEXT: buffer_load_b128 v[0:3], v4, s[8:11], 0 offen offset:16
diff --git a/llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll b/llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
index 975695b03c114..5f6291e75be20 100644
--- a/llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
+++ b/llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
@@ -3083,7 +3083,7 @@ define double @double16_extelt_vec(i32 %sel) {
; GCN-O0-NEXT: v_cmp_eq_u32_e64 s[4:5], s6, v32
; GCN-O0-NEXT: s_and_saveexec_b64 s[4:5], s[4:5]
; GCN-O0-NEXT: s_mov_b32 m0, s6
-; GCN-O0-NEXT: v_movrels_b32_e32 v0, v1
+; GCN-O0-NEXT: v_movrels_b32_e32 v0, v0
; GCN-O0-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GCN-O0-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GCN-O0-NEXT: s_mov_b64 s[6:7], s[4:5]
@@ -3257,7 +3257,7 @@ define double @double16_extelt_vec(i32 %sel) {
; GCN-O0-NEXT: v_cmp_eq_u32_e64 s[4:5], s6, v32
; GCN-O0-NEXT: s_and_saveexec_b64 s[4:5], s[4:5]
; GCN-O0-NEXT: s_mov_b32 m0, s6
-; GCN-O0-NEXT: v_movrels_b32_e32 v0, v0
+; GCN-O0-NEXT: v_movrels_b32_e32 v0, v1
; GCN-O0-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GCN-O0-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GCN-O0-NEXT: s_mov_b64 s[6:7], s[4:5]
@@ -3277,15 +3277,8 @@ define double @double16_extelt_vec(i32 %sel) {
; GCN-O0-NEXT: v_readlane_b32 s5, v35, 38
; GCN-O0-NEXT: s_mov_b64 exec, s[4:5]
; GCN-O0-NEXT: ; %bb.6:
-; GCN-O0-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; GCN-O0-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GCN-O0-NEXT: s_waitcnt vmcnt(1)
-; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
-; GCN-O0-NEXT: s_waitcnt vmcnt(0)
-; GCN-O0-NEXT: v_mov_b32_e32 v2, v3
-; GCN-O0-NEXT: s_mov_b32 s4, 32
-; GCN-O0-NEXT: v_lshrrev_b64 v[1:2], s4, v[1:2]
-; GCN-O0-NEXT: ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec
+; GCN-O0-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GCN-O0-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GCN-O0-NEXT: v_readlane_b32 s67, v34, 15
; GCN-O0-NEXT: v_readlane_b32 s66, v34, 14
; GCN-O0-NEXT: v_readlane_b32 s65, v34, 13
diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
index 84804eeaa9a75..d60e05434952d 100644
--- a/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
@@ -6544,28 +6544,26 @@ define amdgpu_kernel void @constant_sextload_v8i16_to_v8i64(ptr addrspace(1) %ou
; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, 0
; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s9
; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s7
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s6, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, s5
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s6, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, s5
; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s4, 16
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[4:5], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[6:7], 0x100000
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s13, s5, 31
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s15, s5, 16
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[10:11], 0x100000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s7, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s21, s7, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[12:13], 0x100000
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s12, s7, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s7, 16
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[8:9], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[14:15], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[12:13], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s21
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s20
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s12
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18
@@ -6590,25 +6588,23 @@ define amdgpu_kernel void @constant_sextload_v8i16_to_v8i64(ptr addrspace(1) %ou
; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT: s_add_i32 s12, s12, s17
-; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13
+; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
-; GCN-HSA-NEXT: s_mov_b32 s3, 0
-; GCN-HSA-NEXT: s_mov_b32 s9, s3
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_mov_b32 s2, s7
-; GCN-HSA-NEXT: s_lshr_b32 s10, s6, 16
-; GCN-HSA-NEXT: s_mov_b32 s8, s5
+; GCN-HSA-NEXT: s_lshr_b32 s8, s6, 16
+; GCN-HSA-NEXT: s_mov_b32 s10, s5
; GCN-HSA-NEXT: s_lshr_b32 s12, s4, 16
-; GCN-HSA-NEXT: s_ashr_i32 s11, s5, 16
+; GCN-HSA-NEXT: s_ashr_i32 s13, s5, 16
; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[4:5], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[6:7], 0x100000
; GCN-HSA-NEXT: s_ashr_i32 s6, s5, 31
-; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[8:9], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[10:11], 0x100000
-; GCN-HSA-NEXT: s_ashr_i32 s10, s7, 31
+; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[12:13], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000
+; GCN-HSA-NEXT: s_ashr_i32 s12, s7, 31
; GCN-HSA-NEXT: s_ashr_i32 s7, s7, 16
; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x100000
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
@@ -6619,7 +6615,7 @@ define amdgpu_kernel void @constant_sextload_v8i16_to_v8i64(ptr addrspace(1) %ou
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s10
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s12
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
@@ -6632,17 +6628,17 @@ define amdgpu_kernel void @constant_sextload_v8i16_to_v8i64(ptr addrspace(1) %ou
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
-; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
-; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11
+; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10
+; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_endpgm
@@ -7170,19 +7166,15 @@ define amdgpu_kernel void @constant_sextload_v16i16_to_v16i64(ptr addrspace(1) %
; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, 0xf000
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, 0
; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, -1
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, s13
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s13
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, s13
; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, s7
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s6, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, s5
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s4, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s16, s3
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s2, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, s1
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s6, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s16, s5
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s4, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s20, s3
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s2, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s24, s1
; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s0, 16
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[0:1], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[2:3], 0x100000
@@ -7190,40 +7182,40 @@ define amdgpu_kernel void @constant_sextload_v16i16_to_v16i64(ptr addrspace(1) %
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[6:7], 0x100000
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s21, s1, 31
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s1, 16
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[0:1], s[18:19], 0x100000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s3, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s3, 16
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[16:17], 0x100000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s5, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s5, 16
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[14:15], 0x100000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s7, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s40, s7, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[0:1], s[24:25], 0x100000
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s24, s3, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s3, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[20:21], 0x100000
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s5, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s5, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[16:17], 0x100000
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s7, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s7, 16
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[12:13], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[26:27], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[24:25], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[22:23], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[20:21], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s40
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s39
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s38
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:112
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s36
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s37
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s4
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s5
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s33
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s27
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s20
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[2:5], off, s[8:11], 0 offset:80
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s34
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s35
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s2
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s3
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s27
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s25
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s25
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s24
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[8:11], 0 offset:48
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s30
@@ -7236,14 +7228,14 @@ define amdgpu_kernel void @constant_sextload_v16i16_to_v16i64(ptr addrspace(1) %
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s28
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s29
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s18
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s19
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s14
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:96
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s16
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s17
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s18
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s19
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 offset:64
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s14
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s15
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s16
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s17
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[8:11], 0 offset:32
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s12
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s13
@@ -7258,10 +7250,6 @@ define amdgpu_kernel void @constant_sextload_v16i16_to_v16i64(ptr addrspace(1) %
; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
-; GCN-HSA-NEXT: s_mov_b32 s11, 0
-; GCN-HSA-NEXT: s_mov_b32 s15, s11
-; GCN-HSA-NEXT: s_mov_b32 s19, s11
-; GCN-HSA-NEXT: s_mov_b32 s23, s11
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_mov_b32 s10, s7
; GCN-HSA-NEXT: s_lshr_b32 s12, s6, 16
@@ -8323,13 +8311,11 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s53, 0
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, s53
; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0)
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s52, s15
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, s13
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s40, s11
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s9
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, s15
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s20, s13
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s22, s11
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s24, s9
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s1, 31
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s1, 16
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s3, 31
@@ -8339,26 +8325,29 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s7, 31
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s37, s7, 16
; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s9, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s56, s9, 16
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s57, s11, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s58, s11, 16
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s59, s13, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s60, s13, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[48:49], s[24:25], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[50:51], s[22:23], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[52:53], s[20:21], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[54:55], s[18:19], 0x100000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s61, s15, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s62, s15, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s14, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s12, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s10, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s8, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s50, s7
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s6, 16
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s43, s9, 16
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s11, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s47, s11, 16
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s41, s13, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s56, s13, 16
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s57, s15, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s58, s15, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s38, s14, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s12, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s10, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s8, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s46, s7
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s6, 16
; GCN-NOHSA-SI-NEXT: s_mov_b32 s44, s5
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s4, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s46, s3
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s2, 16
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s48, s1
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s38, s0, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s4, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s3
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s2, 16
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s40, s1
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s0, 16
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[0:1], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[2:3], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000
@@ -8366,119 +8355,110 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[12:13], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[14:15], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[52:53], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000
; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s16
; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s17
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s41, s53
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s43, s53
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s51, s53
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s45, s53
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s47, s53
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s49, s53
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s14
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s15
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s54
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s55
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s54
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s55
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s52
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s53
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s2
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s3
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s50
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s51
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s48
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s49
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s58
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s57
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s56
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s41
; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[40:41], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[42:43], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[50:51], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[48:49], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[42:43], s[46:47], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x100000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s12
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s13
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s62
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s61
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s60
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s59
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s58
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s57
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s10
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s14
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[46:47], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[44:45], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[42:43], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x100000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s47
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s45
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s43
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s39
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:240
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s11
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s15
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:208
-; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(1)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s16
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:176
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, s56
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, s39
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s17
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:144
+; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s12
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s13
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s37
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s35
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112
-; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s44
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s45
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s33
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s31
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:80
-; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s42
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s43
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s29
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s27
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:48
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:208
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s14
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:176
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s15
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s33
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s31
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:144
+; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(1)
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s16
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s17
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s29
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:80
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[38:39], 0x100000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s27
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:48
+; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(2)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s40
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s41
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s25
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s23
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s8
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s9
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[38:39], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[36:37], 0x100000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[34:35], 0x100000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s10
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s11
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s8
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s9
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[36:37], 0x100000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[34:35], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[30:31], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[28:29], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x100000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x100000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s6
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s7
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s4
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s5
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, s20
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, s21
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s25
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s6
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s7
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s4
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s5
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s12
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s13
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s19
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s22
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s23
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s24
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s25
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:192
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s26
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s27
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:160
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s16
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s17
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:128
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s14
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s15
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:96
-; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(2)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s12
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s13
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:64
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, s10
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, s11
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:32
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s8
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s9
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
+; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s18
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s19
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s22
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s23
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:160
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s26
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s27
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:128
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s16
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s17
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:96
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, s14
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, s15
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s10
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s11
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s8
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s9
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_endpgm
;
; GCN-HSA-LABEL: constant_sextload_v32i16_to_v32i64:
@@ -8487,97 +8467,89 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: s_load_dwordx4 s[16:19], s[8:9], 0x0
; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8
-; GCN-HSA-NEXT: s_mov_b32 s25, 0
-; GCN-HSA-NEXT: s_mov_b32 s51, s25
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
-; GCN-HSA-NEXT: s_mov_b32 s55, s25
-; GCN-HSA-NEXT: s_mov_b32 s31, s25
-; GCN-HSA-NEXT: s_mov_b32 s57, s25
-; GCN-HSA-NEXT: s_mov_b32 s61, s25
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_mov_b32 s24, s15
-; GCN-HSA-NEXT: s_ashr_i32 s39, s3, 31
-; GCN-HSA-NEXT: s_ashr_i32 s40, s3, 16
-; GCN-HSA-NEXT: s_ashr_i32 s59, s11, 16
-; GCN-HSA-NEXT: s_ashr_i32 s63, s13, 31
-; GCN-HSA-NEXT: s_ashr_i32 s67, s13, 16
-; GCN-HSA-NEXT: s_ashr_i32 s71, s15, 31
-; GCN-HSA-NEXT: s_lshr_b32 s48, s14, 16
-; GCN-HSA-NEXT: s_mov_b32 s50, s13
-; GCN-HSA-NEXT: s_lshr_b32 s52, s12, 16
-; GCN-HSA-NEXT: s_mov_b32 s54, s11
+; GCN-HSA-NEXT: s_ashr_i32 s37, s3, 31
+; GCN-HSA-NEXT: s_ashr_i32 s38, s3, 16
+; GCN-HSA-NEXT: s_ashr_i32 s57, s11, 16
+; GCN-HSA-NEXT: s_ashr_i32 s59, s13, 31
+; GCN-HSA-NEXT: s_ashr_i32 s61, s13, 16
+; GCN-HSA-NEXT: s_ashr_i32 s63, s15, 31
+; GCN-HSA-NEXT: s_ashr_i32 s65, s15, 16
+; GCN-HSA-NEXT: s_lshr_b32 s46, s14, 16
+; GCN-HSA-NEXT: s_mov_b32 s48, s13
+; GCN-HSA-NEXT: s_lshr_b32 s50, s12, 16
+; GCN-HSA-NEXT: s_mov_b32 s52, s11
; GCN-HSA-NEXT: s_lshr_b32 s34, s10, 16
; GCN-HSA-NEXT: s_mov_b32 s30, s9
; GCN-HSA-NEXT: s_lshr_b32 s28, s8, 16
-; GCN-HSA-NEXT: s_mov_b32 s56, s7
-; GCN-HSA-NEXT: s_lshr_b32 s58, s6, 16
-; GCN-HSA-NEXT: s_mov_b32 s60, s5
-; GCN-HSA-NEXT: s_lshr_b32 s62, s4, 16
-; GCN-HSA-NEXT: s_mov_b32 s64, s3
-; GCN-HSA-NEXT: s_lshr_b32 s66, s2, 16
-; GCN-HSA-NEXT: s_mov_b32 s68, s1
-; GCN-HSA-NEXT: s_lshr_b32 s70, s0, 16
+; GCN-HSA-NEXT: s_mov_b32 s54, s7
+; GCN-HSA-NEXT: s_lshr_b32 s56, s6, 16
+; GCN-HSA-NEXT: s_mov_b32 s58, s5
+; GCN-HSA-NEXT: s_lshr_b32 s60, s4, 16
+; GCN-HSA-NEXT: s_mov_b32 s62, s3
+; GCN-HSA-NEXT: s_lshr_b32 s64, s2, 16
+; GCN-HSA-NEXT: s_mov_b32 s66, s1
+; GCN-HSA-NEXT: s_lshr_b32 s68, s0, 16
; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[2:3], 0x100000
-; GCN-HSA-NEXT: s_mov_b32 s65, s25
-; GCN-HSA-NEXT: s_mov_b32 s69, s25
; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[24:25], 0x100000
; GCN-HSA-NEXT: s_ashr_i32 s33, s1, 31
-; GCN-HSA-NEXT: s_ashr_i32 s38, s1, 16
-; GCN-HSA-NEXT: s_ashr_i32 s41, s5, 31
-; GCN-HSA-NEXT: s_ashr_i32 s42, s5, 16
-; GCN-HSA-NEXT: s_ashr_i32 s43, s7, 31
-; GCN-HSA-NEXT: s_ashr_i32 s44, s7, 16
-; GCN-HSA-NEXT: s_ashr_i32 s45, s9, 31
-; GCN-HSA-NEXT: s_ashr_i32 s46, s9, 16
-; GCN-HSA-NEXT: s_ashr_i32 s47, s11, 31
-; GCN-HSA-NEXT: s_ashr_i32 s76, s15, 16
+; GCN-HSA-NEXT: s_ashr_i32 s36, s1, 16
+; GCN-HSA-NEXT: s_ashr_i32 s39, s5, 31
+; GCN-HSA-NEXT: s_ashr_i32 s40, s5, 16
+; GCN-HSA-NEXT: s_ashr_i32 s41, s7, 31
+; GCN-HSA-NEXT: s_ashr_i32 s42, s7, 16
+; GCN-HSA-NEXT: s_ashr_i32 s43, s9, 31
+; GCN-HSA-NEXT: s_ashr_i32 s44, s9, 16
+; GCN-HSA-NEXT: s_ashr_i32 s45, s11, 31
; GCN-HSA-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[4:5], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[6:7], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[26:27], s[8:9], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[36:37], s[10:11], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[70:71], s[10:11], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[72:73], s[12:13], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[74:75], s[14:15], 0x100000
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
-; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[70:71], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[68:69], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[66:67], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[64:65], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[62:63], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[60:61], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[58:59], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[56:57], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[68:69], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[66:67], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[64:65], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[62:63], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[60:61], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[58:59], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[56:57], 0x100000
+; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[54:55], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x100000
-; GCN-HSA-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x100000
-; GCN-HSA-NEXT: s_add_u32 s56, s16, 0xf0
-; GCN-HSA-NEXT: s_addc_u32 s57, s17, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v6, s48
-; GCN-HSA-NEXT: s_add_u32 s48, s16, 0xe0
-; GCN-HSA-NEXT: v_mov_b32_e32 v7, s49
-; GCN-HSA-NEXT: s_addc_u32 s49, s17, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v24, s48
-; GCN-HSA-NEXT: v_mov_b32_e32 v25, s49
-; GCN-HSA-NEXT: s_add_u32 s48, s16, 0xd0
-; GCN-HSA-NEXT: s_addc_u32 s49, s17, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v26, s48
-; GCN-HSA-NEXT: v_mov_b32_e32 v27, s49
-; GCN-HSA-NEXT: s_add_u32 s48, s16, 0xc0
-; GCN-HSA-NEXT: s_addc_u32 s49, s17, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v18, s56
-; GCN-HSA-NEXT: v_mov_b32_e32 v20, s36
-; GCN-HSA-NEXT: s_add_u32 s36, s16, 0xb0
-; GCN-HSA-NEXT: v_mov_b32_e32 v19, s57
-; GCN-HSA-NEXT: v_mov_b32_e32 v21, s37
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s76
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s71
-; GCN-HSA-NEXT: s_addc_u32 s37, s17, 0
+; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x100000
+; GCN-HSA-NEXT: s_add_u32 s54, s16, 0xf0
+; GCN-HSA-NEXT: s_addc_u32 s55, s17, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v6, s46
+; GCN-HSA-NEXT: s_add_u32 s46, s16, 0xe0
+; GCN-HSA-NEXT: v_mov_b32_e32 v7, s47
+; GCN-HSA-NEXT: s_addc_u32 s47, s17, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v24, s46
+; GCN-HSA-NEXT: v_mov_b32_e32 v25, s47
+; GCN-HSA-NEXT: s_add_u32 s46, s16, 0xd0
+; GCN-HSA-NEXT: s_addc_u32 s47, s17, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v26, s46
+; GCN-HSA-NEXT: v_mov_b32_e32 v27, s47
+; GCN-HSA-NEXT: s_add_u32 s46, s16, 0xc0
+; GCN-HSA-NEXT: s_addc_u32 s47, s17, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v28, s46
+; GCN-HSA-NEXT: v_mov_b32_e32 v18, s54
+; GCN-HSA-NEXT: v_mov_b32_e32 v29, s47
+; GCN-HSA-NEXT: s_add_u32 s46, s16, 0xb0
+; GCN-HSA-NEXT: v_mov_b32_e32 v19, s55
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s65
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s63
+; GCN-HSA-NEXT: s_addc_u32 s47, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s74
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30
@@ -8586,7 +8558,7 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31
; GCN-HSA-NEXT: s_addc_u32 s31, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
-; GCN-HSA-NEXT: v_mov_b32_e32 v8, s50
+; GCN-HSA-NEXT: v_mov_b32_e32 v8, s48
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s26
; GCN-HSA-NEXT: s_add_u32 s26, s16, 0x90
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s27
@@ -8594,38 +8566,38 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s27
; GCN-HSA-NEXT: s_add_u32 s26, s16, 0x80
-; GCN-HSA-NEXT: v_mov_b32_e32 v9, s51
-; GCN-HSA-NEXT: v_mov_b32_e32 v10, s67
-; GCN-HSA-NEXT: v_mov_b32_e32 v11, s63
+; GCN-HSA-NEXT: v_mov_b32_e32 v9, s49
+; GCN-HSA-NEXT: v_mov_b32_e32 v10, s61
+; GCN-HSA-NEXT: v_mov_b32_e32 v11, s59
; GCN-HSA-NEXT: s_addc_u32 s27, s17, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v28, s48
; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s72
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s24
; GCN-HSA-NEXT: s_add_u32 s24, s16, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s73
-; GCN-HSA-NEXT: v_mov_b32_e32 v14, s52
-; GCN-HSA-NEXT: v_mov_b32_e32 v15, s53
-; GCN-HSA-NEXT: v_mov_b32_e32 v29, s49
+; GCN-HSA-NEXT: v_mov_b32_e32 v14, s50
+; GCN-HSA-NEXT: v_mov_b32_e32 v15, s51
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s25
; GCN-HSA-NEXT: s_addc_u32 s25, s17, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v30, s36
+; GCN-HSA-NEXT: v_mov_b32_e32 v30, s46
; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15]
-; GCN-HSA-NEXT: v_mov_b32_e32 v16, s54
+; GCN-HSA-NEXT: v_mov_b32_e32 v16, s52
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s14
; GCN-HSA-NEXT: s_add_u32 s14, s16, 0x60
-; GCN-HSA-NEXT: v_mov_b32_e32 v17, s55
-; GCN-HSA-NEXT: v_mov_b32_e32 v31, s37
-; GCN-HSA-NEXT: v_mov_b32_e32 v18, s59
-; GCN-HSA-NEXT: v_mov_b32_e32 v19, s47
+; GCN-HSA-NEXT: v_mov_b32_e32 v17, s53
+; GCN-HSA-NEXT: v_mov_b32_e32 v31, s47
+; GCN-HSA-NEXT: v_mov_b32_e32 v18, s57
+; GCN-HSA-NEXT: v_mov_b32_e32 v19, s45
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s30
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s15
; GCN-HSA-NEXT: s_addc_u32 s15, s17, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v20, s70
+; GCN-HSA-NEXT: v_mov_b32_e32 v21, s71
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s31
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s46
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s45
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s44
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s43
; GCN-HSA-NEXT: v_mov_b32_e32 v26, s26
; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s27
@@ -8635,8 +8607,8 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s29
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[20:23]
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s22
-; GCN-HSA-NEXT: v_mov_b32_e32 v10, s44
-; GCN-HSA-NEXT: v_mov_b32_e32 v11, s43
+; GCN-HSA-NEXT: v_mov_b32_e32 v10, s42
+; GCN-HSA-NEXT: v_mov_b32_e32 v11, s41
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s14
@@ -8649,8 +8621,8 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13
; GCN-HSA-NEXT: s_addc_u32 s13, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s12
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s42
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s41
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s40
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s13
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0
@@ -8669,8 +8641,8 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s40
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s37
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0
@@ -8689,7 +8661,7 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) %
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s33
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
index dc36c71d8d4ef..c8726c44e5e11 100644
--- a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
@@ -7047,69 +7047,67 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX6-NOHSA-NEXT: s_mov_b32 s11, s13
; GFX6-NOHSA-NEXT: s_mov_b32 s15, s13
; GFX6-NOHSA-NEXT: s_mov_b32 s17, s13
-; GFX6-NOHSA-NEXT: s_mov_b32 s19, s13
-; GFX6-NOHSA-NEXT: s_mov_b32 s9, s13
; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
-; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s6, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s6, 24
-; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s6, 8
-; GFX6-NOHSA-NEXT: s_lshr_b32 s26, s4, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s4, 24
-; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s4, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s6, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s6, 24
+; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s6, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s4, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s26, s4, 24
+; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s4, 8
; GFX6-NOHSA-NEXT: s_lshr_b32 s12, s7, 16
; GFX6-NOHSA-NEXT: s_lshr_b32 s10, s7, 8
-; GFX6-NOHSA-NEXT: s_mov_b32 s14, s7
-; GFX6-NOHSA-NEXT: s_lshr_b32 s16, s5, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s5, 8
+; GFX6-NOHSA-NEXT: s_mov_b32 s30, s7
+; GFX6-NOHSA-NEXT: s_lshr_b32 s14, s5, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s16, s5, 8
; GFX6-NOHSA-NEXT: s_mov_b32 s8, s5
; GFX6-NOHSA-NEXT: s_bfe_i64 s[34:35], s[4:5], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[36:37], s[6:7], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
-; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s5, 31
-; GFX6-NOHSA-NEXT: s_ashr_i32 s31, s5, 24
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
+; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s5, 31
+; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s5, 24
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s7, 31
; GFX6-NOHSA-NEXT: s_ashr_i32 s38, s7, 24
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[18:19], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[16:17], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[16:17], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[14:15], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[16:17], s[30:31], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[18:19], s[28:29], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[14:15], s[28:29], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[16:17], s[26:27], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s36
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s37
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s34
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s35
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s38
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s33
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s14
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s15
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s20
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s21
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s22
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s23
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s30
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s31
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s18
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s19
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s20
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s21
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s31
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s29
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s24
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s25
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s29
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s27
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s22
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s23
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s26
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s27
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s18
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s19
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s24
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s16
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s17
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s9
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s16
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s17
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s14
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s15
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s12
@@ -7136,10 +7134,9 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_mov_b32 s21, s19
; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
-; GFX7-HSA-NEXT: s_mov_b32 s23, s19
; GFX7-HSA-NEXT: s_mov_b32 s25, s19
; GFX7-HSA-NEXT: s_mov_b32 s27, s19
-; GFX7-HSA-NEXT: s_mov_b32 s29, s19
+; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13
; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-HSA-NEXT: s_lshr_b32 s2, s6, 16
; GFX7-HSA-NEXT: s_lshr_b32 s8, s6, 24
@@ -7150,6 +7147,7 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_lshr_b32 s16, s4, 8
; GFX7-HSA-NEXT: s_lshr_b32 s18, s7, 16
; GFX7-HSA-NEXT: s_lshr_b32 s20, s7, 8
+; GFX7-HSA-NEXT: s_ashr_i32 s29, s5, 31
; GFX7-HSA-NEXT: s_mov_b32 s22, s7
; GFX7-HSA-NEXT: s_lshr_b32 s24, s5, 16
; GFX7-HSA-NEXT: s_lshr_b32 s26, s5, 8
@@ -7157,11 +7155,9 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s3
; GFX7-HSA-NEXT: s_bfe_i64 s[2:3], s[8:9], 0x80000
-; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13
-; GFX7-HSA-NEXT: s_ashr_i32 s33, s5, 31
-; GFX7-HSA-NEXT: s_ashr_i32 s34, s5, 24
-; GFX7-HSA-NEXT: s_ashr_i32 s35, s7, 31
-; GFX7-HSA-NEXT: s_ashr_i32 s36, s7, 24
+; GFX7-HSA-NEXT: s_ashr_i32 s33, s5, 24
+; GFX7-HSA-NEXT: s_ashr_i32 s34, s7, 31
+; GFX7-HSA-NEXT: s_ashr_i32 s35, s7, 24
; GFX7-HSA-NEXT: s_bfe_i64 s[30:31], s[4:5], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000
; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
@@ -7211,8 +7207,8 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6
; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
-; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s36
-; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s35
+; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s35
+; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s34
; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
; GFX7-HSA-NEXT: s_add_u32 s6, s0, 0x60
; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
@@ -7230,8 +7226,8 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_add_u32 s0, s0, 32
; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9
-; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s34
-; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s33
+; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s33
+; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s29
; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
; GFX7-HSA-NEXT: s_addc_u32 s1, s1, 0
; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
@@ -7248,11 +7244,9 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX8-NOHSA: ; %bb.0:
; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-NOHSA-NEXT: s_mov_b32 s11, 0
-; GFX8-NOHSA-NEXT: s_mov_b32 s27, s11
; GFX8-NOHSA-NEXT: s_mov_b32 s29, s11
; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
-; GFX8-NOHSA-NEXT: s_mov_b32 s3, s11
; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NOHSA-NEXT: s_lshr_b32 s12, s6, 16
; GFX8-NOHSA-NEXT: s_lshr_b32 s14, s6, 24
@@ -7465,68 +7459,65 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o
; GFX12-NEXT: s_mov_b32 s3, 0
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-NEXT: s_mov_b32 s9, s3
-; GFX12-NEXT: s_mov_b32 s13, s3
-; GFX12-NEXT: s_mov_b32 s11, s3
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_lshr_b32 s14, s6, 16
-; GFX12-NEXT: s_lshr_b32 s16, s6, 24
-; GFX12-NEXT: s_lshr_b32 s18, s6, 8
+; GFX12-NEXT: s_lshr_b32 s10, s6, 16
+; GFX12-NEXT: s_lshr_b32 s12, s6, 24
+; GFX12-NEXT: s_lshr_b32 s14, s6, 8
+; GFX12-NEXT: s_bfe_i64 s[30:31], s[4:5], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
+; GFX12-NEXT: s_lshr_b32 s16, s4, 16
; GFX12-NEXT: s_bfe_i64 s[34:35], s[6:7], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
; GFX12-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
-; GFX12-NEXT: s_lshr_b32 s20, s4, 16
+; GFX12-NEXT: v_dual_mov_b32 v26, 0 :: v_dual_mov_b32 v1, s35
+; GFX12-NEXT: s_lshr_b32 s18, s4, 24
+; GFX12-NEXT: v_dual_mov_b32 v4, s30 :: v_dual_mov_b32 v7, s11
+; GFX12-NEXT: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v9, s13
+; GFX12-NEXT: v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v3, s15
+; GFX12-NEXT: s_lshr_b32 s20, s4, 8
+; GFX12-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v0, s34 :: v_dual_mov_b32 v5, s31
+; GFX12-NEXT: v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v11, s17
+; GFX12-NEXT: s_lshr_b32 s2, s7, 16
; GFX12-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v24, 0 :: v_dual_mov_b32 v1, s35
-; GFX12-NEXT: s_lshr_b32 s22, s4, 24
-; GFX12-NEXT: v_dual_mov_b32 v0, s34 :: v_dual_mov_b32 v5, s15
-; GFX12-NEXT: v_dual_mov_b32 v4, s14 :: v_dual_mov_b32 v7, s17
-; GFX12-NEXT: v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v3, s19
-; GFX12-NEXT: s_lshr_b32 s24, s4, 8
+; GFX12-NEXT: s_lshr_b32 s22, s7, 8
+; GFX12-NEXT: s_mov_b32 s24, s7
; GFX12-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: v_dual_mov_b32 v2, s18 :: v_dual_mov_b32 v9, s21
-; GFX12-NEXT: s_lshr_b32 s2, s7, 16
-; GFX12-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
-; GFX12-NEXT: s_lshr_b32 s26, s7, 8
-; GFX12-NEXT: s_mov_b32 s8, s7
-; GFX12-NEXT: s_mov_b32 s12, s5
-; GFX12-NEXT: s_bfe_i64 s[30:31], s[4:5], 0x80000
-; GFX12-NEXT: s_ashr_i32 s27, s5, 31
-; GFX12-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
-; GFX12-NEXT: s_lshr_b32 s10, s5, 16
+; GFX12-NEXT: s_lshr_b32 s8, s5, 16
; GFX12-NEXT: s_ashr_i32 s33, s7, 31
; GFX12-NEXT: s_ashr_i32 s36, s7, 24
; GFX12-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v11, s23
-; GFX12-NEXT: v_mov_b32_e32 v10, s22
-; GFX12-NEXT: s_lshr_b32 s28, s5, 8
+; GFX12-NEXT: v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19
+; GFX12-NEXT: v_mov_b32_e32 v12, s18
+; GFX12-NEXT: s_lshr_b32 s26, s5, 8
+; GFX12-NEXT: s_mov_b32 s28, s5
+; GFX12-NEXT: s_ashr_i32 s27, s5, 31
; GFX12-NEXT: s_ashr_i32 s29, s5, 24
-; GFX12-NEXT: s_bfe_i64 s[4:5], s[12:13], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[12:13], s[26:27], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GFX12-NEXT: s_clause 0x1
-; GFX12-NEXT: global_store_b128 v24, v[4:7], s[0:1] offset:80
-; GFX12-NEXT: global_store_b128 v24, v[0:3], s[0:1] offset:64
-; GFX12-NEXT: v_dual_mov_b32 v0, s30 :: v_dual_mov_b32 v3, s25
-; GFX12-NEXT: v_dual_mov_b32 v1, s31 :: v_dual_mov_b32 v2, s24
-; GFX12-NEXT: v_mov_b32_e32 v5, s3
-; GFX12-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v7, s33
-; GFX12-NEXT: v_dual_mov_b32 v6, s36 :: v_dual_mov_b32 v13, s9
-; GFX12-NEXT: s_bfe_i64 s[6:7], s[28:29], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v12, s8 :: v_dual_mov_b32 v15, s13
-; GFX12-NEXT: v_dual_mov_b32 v14, s12 :: v_dual_mov_b32 v17, s11
-; GFX12-NEXT: v_dual_mov_b32 v16, s10 :: v_dual_mov_b32 v19, s27
-; GFX12-NEXT: v_dual_mov_b32 v18, s29 :: v_dual_mov_b32 v21, s5
-; GFX12-NEXT: v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v23, s7
-; GFX12-NEXT: v_mov_b32_e32 v22, s6
+; GFX12-NEXT: global_store_b128 v26, v[6:9], s[0:1] offset:80
+; GFX12-NEXT: global_store_b128 v26, v[0:3], s[0:1] offset:64
+; GFX12-NEXT: v_dual_mov_b32 v6, s20 :: v_dual_mov_b32 v1, s3
+; GFX12-NEXT: v_mov_b32_e32 v7, s21
+; GFX12-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v3, s33
+; GFX12-NEXT: v_dual_mov_b32 v2, s36 :: v_dual_mov_b32 v15, s25
+; GFX12-NEXT: s_bfe_i64 s[4:5], s[28:29], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[6:7], s[26:27], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v14, s24 :: v_dual_mov_b32 v17, s23
+; GFX12-NEXT: v_dual_mov_b32 v16, s22 :: v_dual_mov_b32 v19, s9
+; GFX12-NEXT: v_dual_mov_b32 v18, s8 :: v_dual_mov_b32 v21, s27
+; GFX12-NEXT: v_dual_mov_b32 v20, s29 :: v_dual_mov_b32 v23, s5
+; GFX12-NEXT: v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v25, s7
+; GFX12-NEXT: v_mov_b32_e32 v24, s6
; GFX12-NEXT: s_clause 0x5
-; GFX12-NEXT: global_store_b128 v24, v[8:11], s[0:1] offset:16
-; GFX12-NEXT: global_store_b128 v24, v[0:3], s[0:1]
-; GFX12-NEXT: global_store_b128 v24, v[4:7], s[0:1] offset:112
-; GFX12-NEXT: global_store_b128 v24, v[12:15], s[0:1] offset:96
-; GFX12-NEXT: global_store_b128 v24, v[16:19], s[0:1] offset:48
-; GFX12-NEXT: global_store_b128 v24, v[20:23], s[0:1] offset:32
+; GFX12-NEXT: global_store_b128 v26, v[10:13], s[0:1] offset:16
+; GFX12-NEXT: global_store_b128 v26, v[4:7], s[0:1]
+; GFX12-NEXT: global_store_b128 v26, v[0:3], s[0:1] offset:112
+; GFX12-NEXT: global_store_b128 v26, v[14:17], s[0:1] offset:96
+; GFX12-NEXT: global_store_b128 v26, v[18:21], s[0:1] offset:48
+; GFX12-NEXT: global_store_b128 v26, v[22:25], s[0:1] offset:32
; GFX12-NEXT: s_endpgm
%load = load <16 x i8>, ptr addrspace(4) %in
%ext = sext <16 x i8> %load to <16 x i64>
@@ -8237,34 +8228,32 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x9
; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
-; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0
-; GFX6-NOHSA-NEXT: s_mov_b32 s29, s11
; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
-; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s6, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s34, s6, 24
-; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s6, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s6, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s6, 24
+; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s6, 8
; GFX6-NOHSA-NEXT: s_lshr_b32 s26, s4, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s4, 24
-; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s4, 8
-; GFX6-NOHSA-NEXT: s_lshr_b32 s12, s2, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s14, s2, 24
-; GFX6-NOHSA-NEXT: s_lshr_b32 s16, s2, 8
-; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s0, 16
-; GFX6-NOHSA-NEXT: s_lshr_b32 s10, s7, 16
-; GFX6-NOHSA-NEXT: s_mov_b32 s28, s7
-; GFX6-NOHSA-NEXT: s_ashr_i32 s13, s1, 31
-; GFX6-NOHSA-NEXT: s_ashr_i32 s15, s1, 24
-; GFX6-NOHSA-NEXT: s_ashr_i32 s17, s3, 31
-; GFX6-NOHSA-NEXT: s_ashr_i32 s19, s3, 24
-; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s5, 31
-; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s5, 24
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[48:49], s[28:29], 0x80000
-; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s7, 31
-; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s7, 24
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[52:53], s[34:35], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[54:55], s[30:31], 0x80000
-; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s0, 24
-; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s0, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s4, 24
+; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s4, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s10, s2, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s12, s2, 24
+; GFX6-NOHSA-NEXT: s_lshr_b32 s14, s2, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s16, s0, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s0, 24
+; GFX6-NOHSA-NEXT: s_mov_b32 s34, s7
+; GFX6-NOHSA-NEXT: s_ashr_i32 s11, s1, 31
+; GFX6-NOHSA-NEXT: s_ashr_i32 s13, s1, 24
+; GFX6-NOHSA-NEXT: s_ashr_i32 s15, s3, 31
+; GFX6-NOHSA-NEXT: s_ashr_i32 s17, s3, 24
+; GFX6-NOHSA-NEXT: s_ashr_i32 s19, s5, 31
+; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s5, 24
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[46:47], s[34:35], 0x80000
+; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s7, 31
+; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s7, 24
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[52:53], s[30:31], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[54:55], s[28:29], 0x80000
+; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s0, 8
+; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s7, 16
; GFX6-NOHSA-NEXT: s_lshr_b32 s34, s7, 8
; GFX6-NOHSA-NEXT: s_lshr_b32 s36, s5, 16
; GFX6-NOHSA-NEXT: s_lshr_b32 s38, s5, 8
@@ -8272,7 +8261,7 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX6-NOHSA-NEXT: s_lshr_b32 s40, s3, 16
; GFX6-NOHSA-NEXT: s_lshr_b32 s42, s3, 8
; GFX6-NOHSA-NEXT: s_mov_b32 s50, s3
-; GFX6-NOHSA-NEXT: s_lshr_b32 s46, s1, 16
+; GFX6-NOHSA-NEXT: s_lshr_b32 s48, s1, 16
; GFX6-NOHSA-NEXT: s_bfe_i64 s[56:57], s[0:1], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[58:59], s[4:5], 0x80000
@@ -8289,58 +8278,56 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s3
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s56
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s57
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s48
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s49
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s46
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s47
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s54
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s55
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v20, s52
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v21, s53
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v22, s27
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v23, s25
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v22, s25
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v23, s23
; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x80000
; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v24, s8
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:208
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[26:27], s[20:21], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[48:49], s[22:23], 0x80000
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s26
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s27
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s24
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s25
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v25, s9
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v26, s48
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v27, s49
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s24
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s25
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[22:23], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[22:23], s[20:21], 0x80000
+; GFX6-NOHSA-NEXT: s_mov_b32 s31, 0
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v26, s22
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v27, s23
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s8
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s9
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:144
-; GFX6-NOHSA-NEXT: s_mov_b32 s35, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s37, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s39, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s45, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s41, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s43, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s51, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s47, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s5, s11
-; GFX6-NOHSA-NEXT: s_mov_b32 s7, s11
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[6:7], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[26:27], s[50:51], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000
+; GFX6-NOHSA-NEXT: s_mov_b32 s35, s31
+; GFX6-NOHSA-NEXT: s_mov_b32 s37, s31
+; GFX6-NOHSA-NEXT: s_mov_b32 s39, s31
+; GFX6-NOHSA-NEXT: s_mov_b32 s41, s31
+; GFX6-NOHSA-NEXT: s_mov_b32 s43, s31
+; GFX6-NOHSA-NEXT: s_mov_b32 s49, s31
+; GFX6-NOHSA-NEXT: s_mov_b32 s5, s31
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[22:23], s[6:7], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[50:51], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[26:27], s[44:45], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[46:47], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[48:49], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[42:43], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000
; GFX6-NOHSA-NEXT: s_bfe_i64 s[42:43], s[18:19], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[46:47], s[16:17], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[48:49], s[14:15], 0x80000
-; GFX6-NOHSA-NEXT: s_bfe_i64 s[50:51], s[12:13], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[44:45], s[16:17], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[46:47], s[14:15], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[48:49], s[12:13], 0x80000
+; GFX6-NOHSA-NEXT: s_bfe_i64 s[50:51], s[10:11], 0x80000
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:128
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(2)
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s50
@@ -8349,41 +8336,41 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s49
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s23
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s21
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s21
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s19
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s46
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s47
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:64
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s42
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s43
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s28
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s29
-; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
-; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s44
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s45
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s30
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s31
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s42
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s43
+; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
+; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s26
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s27
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s28
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s29
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s19
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s17
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v20, s10
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v21, s11
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s17
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s15
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v20, s30
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v21, s31
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:240
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s26
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s27
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s24
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s25
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s34
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s35
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:224
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(2)
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s15
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s13
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s13
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s11
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s36
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s37
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s24
-; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s22
+; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s23
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s38
; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s39
; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:160
@@ -8412,24 +8399,24 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_mov_b32 s23, s27
; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
-; GFX7-HSA-NEXT: s_mov_b32 s25, s27
-; GFX7-HSA-NEXT: s_mov_b32 s21, s27
+; GFX7-HSA-NEXT: s_mov_b32 s19, s27
; GFX7-HSA-NEXT: s_mov_b32 s15, s27
-; GFX7-HSA-NEXT: s_mov_b32 s17, s27
+; GFX7-HSA-NEXT: s_mov_b32 s61, s27
+; GFX7-HSA-NEXT: s_mov_b32 s63, s27
; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-HSA-NEXT: s_lshr_b32 s12, s6, 16
; GFX7-HSA-NEXT: s_lshr_b32 s10, s6, 24
-; GFX7-HSA-NEXT: s_ashr_i32 s29, s1, 31
+; GFX7-HSA-NEXT: s_ashr_i32 s31, s1, 31
; GFX7-HSA-NEXT: s_ashr_i32 s33, s1, 24
; GFX7-HSA-NEXT: s_lshr_b32 s40, s0, 16
-; GFX7-HSA-NEXT: s_lshr_b32 s38, s0, 24
-; GFX7-HSA-NEXT: s_lshr_b32 s30, s0, 8
+; GFX7-HSA-NEXT: s_lshr_b32 s36, s0, 24
+; GFX7-HSA-NEXT: s_lshr_b32 s28, s0, 8
; GFX7-HSA-NEXT: s_lshr_b32 s66, s1, 16
; GFX7-HSA-NEXT: s_lshr_b32 s68, s1, 8
; GFX7-HSA-NEXT: s_mov_b32 s70, s1
-; GFX7-HSA-NEXT: s_bfe_i64 s[18:19], s[0:1], 0x80000
+; GFX7-HSA-NEXT: s_bfe_i64 s[20:21], s[0:1], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[0:1], s[12:13], 0x80000
-; GFX7-HSA-NEXT: s_lshr_b32 s28, s6, 8
+; GFX7-HSA-NEXT: s_lshr_b32 s30, s6, 8
; GFX7-HSA-NEXT: s_lshr_b32 s34, s4, 16
; GFX7-HSA-NEXT: s_ashr_i32 s35, s3, 31
; GFX7-HSA-NEXT: s_lshr_b32 s52, s4, 24
@@ -8440,7 +8427,7 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_lshr_b32 s26, s7, 16
; GFX7-HSA-NEXT: s_lshr_b32 s22, s7, 8
; GFX7-HSA-NEXT: s_mov_b32 s24, s7
-; GFX7-HSA-NEXT: s_lshr_b32 s20, s5, 16
+; GFX7-HSA-NEXT: s_lshr_b32 s18, s5, 16
; GFX7-HSA-NEXT: s_lshr_b32 s14, s5, 8
; GFX7-HSA-NEXT: s_mov_b32 s16, s5
; GFX7-HSA-NEXT: s_lshr_b32 s60, s3, 16
@@ -8449,19 +8436,15 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
; GFX7-HSA-NEXT: s_bfe_i64 s[0:1], s[10:11], 0x80000
-; GFX7-HSA-NEXT: s_mov_b32 s61, s27
-; GFX7-HSA-NEXT: s_mov_b32 s63, s27
-; GFX7-HSA-NEXT: s_mov_b32 s65, s27
; GFX7-HSA-NEXT: s_mov_b32 s67, s27
; GFX7-HSA-NEXT: s_mov_b32 s69, s27
-; GFX7-HSA-NEXT: s_mov_b32 s71, s27
; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13
; GFX7-HSA-NEXT: s_ashr_i32 s46, s3, 24
; GFX7-HSA-NEXT: s_ashr_i32 s47, s5, 31
; GFX7-HSA-NEXT: s_ashr_i32 s48, s5, 24
; GFX7-HSA-NEXT: s_ashr_i32 s49, s7, 31
; GFX7-HSA-NEXT: s_ashr_i32 s50, s7, 24
-; GFX7-HSA-NEXT: s_bfe_i64 s[36:37], s[2:3], 0x80000
+; GFX7-HSA-NEXT: s_bfe_i64 s[38:39], s[2:3], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[42:43], s[4:5], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[72:73], s[6:7], 0x80000
; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s0
@@ -8474,12 +8457,12 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_bfe_i64 s[12:13], s[60:61], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
-; GFX7-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
+; GFX7-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
-; GFX7-HSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
-; GFX7-HSA-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000
+; GFX7-HSA-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000
+; GFX7-HSA-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x80000
@@ -8487,7 +8470,7 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x80000
; GFX7-HSA-NEXT: s_bfe_i64 s[60:61], s[34:35], 0x80000
-; GFX7-HSA-NEXT: s_bfe_i64 s[62:63], s[28:29], 0x80000
+; GFX7-HSA-NEXT: s_bfe_i64 s[62:63], s[30:31], 0x80000
; GFX7-HSA-NEXT: s_add_u32 s64, s8, 0xd0
; GFX7-HSA-NEXT: s_addc_u32 s65, s9, 0
; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s62
@@ -8502,19 +8485,19 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_add_u32 s42, s8, 0x80
; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s43
; GFX7-HSA-NEXT: s_addc_u32 s43, s9, 0
-; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s36
-; GFX7-HSA-NEXT: s_add_u32 s36, s8, 0x50
-; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s37
-; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0
-; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s36
+; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s38
+; GFX7-HSA-NEXT: s_add_u32 s38, s8, 0x50
+; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s39
+; GFX7-HSA-NEXT: s_addc_u32 s39, s9, 0
+; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s38
; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s62
-; GFX7-HSA-NEXT: v_mov_b32_e32 v31, s37
-; GFX7-HSA-NEXT: s_add_u32 s36, s8, 64
+; GFX7-HSA-NEXT: v_mov_b32_e32 v31, s39
+; GFX7-HSA-NEXT: s_add_u32 s38, s8, 64
; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s72
; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s73
; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s63
; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s52
-; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0
+; GFX7-HSA-NEXT: s_addc_u32 s39, s9, 0
; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s60
; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s61
; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s53
@@ -8524,43 +8507,41 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s59
; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11]
-; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s18
-; GFX7-HSA-NEXT: s_add_u32 s18, s8, 16
-; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s19
-; GFX7-HSA-NEXT: s_addc_u32 s19, s9, 0
-; GFX7-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19]
+; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s20
+; GFX7-HSA-NEXT: s_add_u32 s20, s8, 16
; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s64
-; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s18
-; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s19
-; GFX7-HSA-NEXT: s_add_u32 s18, s8, 0xf0
-; GFX7-HSA-NEXT: s_addc_u32 s19, s9, 0
-; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s18
+; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s21
+; GFX7-HSA-NEXT: s_addc_u32 s21, s9, 0
+; GFX7-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19]
; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s65
-; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s36
-; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s19
-; GFX7-HSA-NEXT: s_add_u32 s18, s8, 0xe0
+; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s20
+; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s21
+; GFX7-HSA-NEXT: s_add_u32 s20, s8, 0xf0
; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[0:3]
-; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s44
-; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s45
+; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s38
; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s40
; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s41
-; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s37
-; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s38
-; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s39
-; GFX7-HSA-NEXT: s_addc_u32 s19, s9, 0
+; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s36
+; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s37
+; GFX7-HSA-NEXT: s_addc_u32 s21, s9, 0
+; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s20
; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s42
-; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
+; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s44
+; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s45
+; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s39
+; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s21
+; GFX7-HSA-NEXT: s_add_u32 s20, s8, 0xe0
; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
-; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s19
-; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s54
+; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s55
; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s43
-; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s30
-; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s31
-; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s18
+; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s28
+; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s29
+; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
+; GFX7-HSA-NEXT: s_addc_u32 s21, s9, 0
+; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s20
; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9
-; GFX7-HSA-NEXT: s_add_u32 s18, s8, 0xb0
; GFX7-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15]
; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s26
; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s27
@@ -8568,15 +8549,17 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s49
; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s24
; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s25
+; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s21
; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s22
; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s23
; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[8:11]
; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[12:15]
+; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
+; GFX7-HSA-NEXT: s_add_u32 s18, s8, 0xb0
+; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
; GFX7-HSA-NEXT: s_addc_u32 s19, s9, 0
; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s18
-; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s20
-; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21
; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s48
; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s47
; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s19
@@ -8618,7 +8601,7 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0
; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s33
-; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s29
+; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s31
; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX7-HSA-NEXT: s_nop 0
@@ -8637,15 +8620,11 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX8-NOHSA: ; %bb.0:
; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24
; GFX8-NOHSA-NEXT: s_mov_b32 s63, 0
-; GFX8-NOHSA-NEXT: s_mov_b32 s23, s63
; GFX8-NOHSA-NEXT: s_mov_b32 s65, s63
-; GFX8-NOHSA-NEXT: s_mov_b32 s19, s63
-; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
; GFX8-NOHSA-NEXT: s_mov_b32 s67, s63
-; GFX8-NOHSA-NEXT: s_mov_b32 s15, s63
; GFX8-NOHSA-NEXT: s_mov_b32 s45, s63
-; GFX8-NOHSA-NEXT: s_mov_b32 s11, s63
+; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NOHSA-NEXT: s_lshr_b32 s46, s6, 16
; GFX8-NOHSA-NEXT: s_lshr_b32 s48, s6, 24
@@ -9049,100 +9028,96 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX12-LABEL: constant_sextload_v32i8_to_v32i64:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x24
-; GFX12-NEXT: s_mov_b32 s29, 0
+; GFX12-NEXT: s_mov_b32 s35, 0
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_mov_b32 s27, s29
-; GFX12-NEXT: s_mov_b32 s21, s29
-; GFX12-NEXT: s_mov_b32 s25, s29
-; GFX12-NEXT: s_mov_b32 s19, s29
-; GFX12-NEXT: s_mov_b32 s15, s29
-; GFX12-NEXT: s_mov_b32 s13, s29
+; GFX12-NEXT: s_mov_b32 s25, s35
+; GFX12-NEXT: s_mov_b32 s17, s35
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_load_b256 s[0:7], s[10:11], 0x0
-; GFX12-NEXT: s_mov_b32 s11, s29
+; GFX12-NEXT: s_mov_b32 s11, s35
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_lshr_b32 s30, s6, 16
-; GFX12-NEXT: s_lshr_b32 s34, s6, 24
-; GFX12-NEXT: s_lshr_b32 s36, s6, 8
-; GFX12-NEXT: s_lshr_b32 s38, s4, 16
-; GFX12-NEXT: s_lshr_b32 s40, s4, 24
-; GFX12-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000
-; GFX12-NEXT: s_lshr_b32 s42, s4, 8
-; GFX12-NEXT: s_bfe_i64 s[66:67], s[6:7], 0x80000
+; GFX12-NEXT: s_lshr_b32 s36, s6, 16
+; GFX12-NEXT: s_lshr_b32 s38, s6, 24
+; GFX12-NEXT: s_lshr_b32 s40, s6, 8
+; GFX12-NEXT: s_lshr_b32 s42, s4, 16
+; GFX12-NEXT: s_lshr_b32 s44, s4, 24
; GFX12-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v24, 0 :: v_dual_mov_b32 v1, s31
-; GFX12-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000
; GFX12-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v0, s30 :: v_dual_mov_b32 v3, s35
-; GFX12-NEXT: v_dual_mov_b32 v2, s34 :: v_dual_mov_b32 v5, s67
-; GFX12-NEXT: s_lshr_b32 s44, s2, 16
-; GFX12-NEXT: s_lshr_b32 s46, s2, 24
-; GFX12-NEXT: s_bfe_i64 s[64:65], s[4:5], 0x80000
-; GFX12-NEXT: s_ashr_i32 s45, s1, 24
+; GFX12-NEXT: s_lshr_b32 s46, s4, 8
+; GFX12-NEXT: s_bfe_i64 s[66:67], s[6:7], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v24, 0 :: v_dual_mov_b32 v1, s37
+; GFX12-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000
; GFX12-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v4, s66 :: v_dual_mov_b32 v7, s37
-; GFX12-NEXT: v_dual_mov_b32 v6, s36 :: v_dual_mov_b32 v9, s39
-; GFX12-NEXT: s_lshr_b32 s48, s2, 8
-; GFX12-NEXT: v_dual_mov_b32 v8, s38 :: v_dual_mov_b32 v11, s41
-; GFX12-NEXT: v_dual_mov_b32 v10, s40 :: v_dual_mov_b32 v13, s65
-; GFX12-NEXT: s_lshr_b32 s50, s0, 16
-; GFX12-NEXT: s_lshr_b32 s52, s0, 24
+; GFX12-NEXT: v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v3, s39
+; GFX12-NEXT: v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v5, s67
+; GFX12-NEXT: s_lshr_b32 s30, s2, 16
+; GFX12-NEXT: s_lshr_b32 s48, s2, 24
+; GFX12-NEXT: s_bfe_i64 s[64:65], s[4:5], 0x80000
; GFX12-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v12, s64 :: v_dual_mov_b32 v15, s43
-; GFX12-NEXT: s_bfe_i64 s[30:31], s[44:45], 0x80000
-; GFX12-NEXT: v_mov_b32_e32 v14, s42
-; GFX12-NEXT: s_lshr_b32 s54, s0, 8
-; GFX12-NEXT: s_lshr_b32 s28, s7, 16
-; GFX12-NEXT: s_lshr_b32 s56, s7, 8
-; GFX12-NEXT: s_lshr_b32 s26, s5, 16
-; GFX12-NEXT: s_lshr_b32 s58, s5, 8
-; GFX12-NEXT: s_lshr_b32 s20, s3, 16
-; GFX12-NEXT: s_lshr_b32 s60, s1, 8
-; GFX12-NEXT: s_bfe_i64 s[62:63], s[2:3], 0x80000
-; GFX12-NEXT: s_ashr_i32 s55, s3, 31
-; GFX12-NEXT: s_ashr_i32 s57, s3, 24
+; GFX12-NEXT: v_dual_mov_b32 v4, s66 :: v_dual_mov_b32 v7, s41
+; GFX12-NEXT: v_dual_mov_b32 v6, s40 :: v_dual_mov_b32 v9, s43
+; GFX12-NEXT: s_lshr_b32 s50, s2, 8
+; GFX12-NEXT: v_dual_mov_b32 v8, s42 :: v_dual_mov_b32 v11, s45
+; GFX12-NEXT: v_dual_mov_b32 v10, s44 :: v_dual_mov_b32 v13, s65
+; GFX12-NEXT: s_lshr_b32 s52, s0, 16
+; GFX12-NEXT: s_lshr_b32 s54, s0, 24
; GFX12-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v12, s64 :: v_dual_mov_b32 v15, s47
+; GFX12-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
+; GFX12-NEXT: v_mov_b32_e32 v14, s46
+; GFX12-NEXT: s_lshr_b32 s56, s0, 8
+; GFX12-NEXT: s_lshr_b32 s34, s7, 16
+; GFX12-NEXT: s_mov_b32 s58, s7
+; GFX12-NEXT: s_lshr_b32 s24, s5, 16
+; GFX12-NEXT: s_lshr_b32 s60, s1, 8
+; GFX12-NEXT: s_mov_b32 s62, s1
+; GFX12-NEXT: s_bfe_i64 s[28:29], s[2:3], 0x80000
+; GFX12-NEXT: s_ashr_i32 s57, s1, 24
+; GFX12-NEXT: s_ashr_i32 s59, s3, 31
+; GFX12-NEXT: s_ashr_i32 s61, s3, 24
; GFX12-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x80000
; GFX12-NEXT: s_clause 0x3
; GFX12-NEXT: global_store_b128 v24, v[0:3], s[8:9] offset:208
; GFX12-NEXT: global_store_b128 v24, v[4:7], s[8:9] offset:192
; GFX12-NEXT: global_store_b128 v24, v[8:11], s[8:9] offset:144
; GFX12-NEXT: global_store_b128 v24, v[12:15], s[8:9] offset:128
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_dual_mov_b32 v0, s30 :: v_dual_mov_b32 v3, s47
-; GFX12-NEXT: v_dual_mov_b32 v1, s31 :: v_dual_mov_b32 v2, s46
-; GFX12-NEXT: v_mov_b32_e32 v5, s63
-; GFX12-NEXT: s_mov_b32 s24, s7
+; GFX12-NEXT: v_dual_mov_b32 v0, s30 :: v_dual_mov_b32 v3, s49
+; GFX12-NEXT: v_dual_mov_b32 v1, s31 :: v_dual_mov_b32 v2, s48
+; GFX12-NEXT: v_mov_b32_e32 v5, s29
+; GFX12-NEXT: s_lshr_b32 s26, s7, 8
+; GFX12-NEXT: s_lshr_b32 s20, s5, 8
; GFX12-NEXT: s_mov_b32 s18, s5
-; GFX12-NEXT: s_lshr_b32 s16, s3, 8
+; GFX12-NEXT: s_lshr_b32 s16, s3, 16
+; GFX12-NEXT: s_lshr_b32 s12, s3, 8
; GFX12-NEXT: s_mov_b32 s14, s3
-; GFX12-NEXT: s_lshr_b32 s12, s1, 16
-; GFX12-NEXT: s_mov_b32 s10, s1
+; GFX12-NEXT: s_lshr_b32 s10, s1, 16
; GFX12-NEXT: s_bfe_i64 s[22:23], s[0:1], 0x80000
; GFX12-NEXT: s_ashr_i32 s33, s1, 31
+; GFX12-NEXT: s_bfe_i64 s[2:3], s[62:63], 0x80000
; GFX12-NEXT: s_bfe_i64 s[0:1], s[60:61], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[2:3], s[20:21], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[20:21], s[58:59], 0x80000
-; GFX12-NEXT: s_ashr_i32 s58, s5, 31
-; GFX12-NEXT: s_ashr_i32 s59, s5, 24
-; GFX12-NEXT: s_bfe_i64 s[4:5], s[26:27], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[26:27], s[56:57], 0x80000
-; GFX12-NEXT: s_ashr_i32 s56, s7, 31
-; GFX12-NEXT: s_ashr_i32 s60, s7, 24
-; GFX12-NEXT: s_bfe_i64 s[6:7], s[28:29], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[28:29], s[54:55], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v4, s62 :: v_dual_mov_b32 v7, s49
-; GFX12-NEXT: v_dual_mov_b32 v6, s48 :: v_dual_mov_b32 v9, s51
-; GFX12-NEXT: v_dual_mov_b32 v8, s50 :: v_dual_mov_b32 v11, s53
-; GFX12-NEXT: v_dual_mov_b32 v10, s52 :: v_dual_mov_b32 v13, s23
-; GFX12-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v12, s22 :: v_dual_mov_b32 v15, s29
-; GFX12-NEXT: v_dual_mov_b32 v14, s28 :: v_dual_mov_b32 v17, s7
+; GFX12-NEXT: s_ashr_i32 s60, s5, 31
+; GFX12-NEXT: s_ashr_i32 s62, s5, 24
+; GFX12-NEXT: s_bfe_i64 s[4:5], s[24:25], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[24:25], s[58:59], 0x80000
+; GFX12-NEXT: s_ashr_i32 s58, s7, 31
+; GFX12-NEXT: s_ashr_i32 s63, s7, 24
+; GFX12-NEXT: s_bfe_i64 s[6:7], s[34:35], 0x80000
+; GFX12-NEXT: s_bfe_i64 s[34:35], s[56:57], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v4, s28 :: v_dual_mov_b32 v7, s51
+; GFX12-NEXT: v_dual_mov_b32 v6, s50 :: v_dual_mov_b32 v9, s53
+; GFX12-NEXT: v_dual_mov_b32 v8, s52 :: v_dual_mov_b32 v11, s55
+; GFX12-NEXT: v_dual_mov_b32 v10, s54 :: v_dual_mov_b32 v13, s23
+; GFX12-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v12, s22 :: v_dual_mov_b32 v15, s35
+; GFX12-NEXT: v_dual_mov_b32 v14, s34 :: v_dual_mov_b32 v17, s7
; GFX12-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v19, s56
-; GFX12-NEXT: v_dual_mov_b32 v18, s60 :: v_dual_mov_b32 v21, s25
+; GFX12-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
+; GFX12-NEXT: v_dual_mov_b32 v16, s6 :: v_dual_mov_b32 v19, s58
+; GFX12-NEXT: v_dual_mov_b32 v18, s63 :: v_dual_mov_b32 v21, s25
+; GFX12-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
; GFX12-NEXT: v_dual_mov_b32 v20, s24 :: v_dual_mov_b32 v23, s27
; GFX12-NEXT: v_mov_b32_e32 v22, s26
; GFX12-NEXT: s_clause 0x5
@@ -9152,22 +9127,21 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o
; GFX12-NEXT: global_store_b128 v24, v[12:15], s[8:9]
; GFX12-NEXT: global_store_b128 v24, v[16:19], s[8:9] offset:240
; GFX12-NEXT: global_store_b128 v24, v[20:23], s[8:9] offset:224
-; GFX12-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v3, s58
-; GFX12-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s59
+; GFX12-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v3, s60
+; GFX12-NEXT: v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v2, s62
; GFX12-NEXT: v_mov_b32_e32 v5, s19
; GFX12-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
-; GFX12-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s21
-; GFX12-NEXT: v_dual_mov_b32 v6, s20 :: v_dual_mov_b32 v9, s3
; GFX12-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v11, s55
-; GFX12-NEXT: v_dual_mov_b32 v10, s57 :: v_dual_mov_b32 v13, s15
+; GFX12-NEXT: v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v7, s21
+; GFX12-NEXT: v_dual_mov_b32 v6, s20 :: v_dual_mov_b32 v9, s17
; GFX12-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
-; GFX12-NEXT: v_dual_mov_b32 v12, s14 :: v_dual_mov_b32 v15, s17
-; GFX12-NEXT: v_dual_mov_b32 v14, s16 :: v_dual_mov_b32 v17, s13
-; GFX12-NEXT: v_dual_mov_b32 v16, s12 :: v_dual_mov_b32 v19, s33
-; GFX12-NEXT: v_dual_mov_b32 v18, s45 :: v_dual_mov_b32 v21, s11
-; GFX12-NEXT: v_dual_mov_b32 v20, s10 :: v_dual_mov_b32 v23, s1
+; GFX12-NEXT: v_dual_mov_b32 v8, s16 :: v_dual_mov_b32 v11, s59
+; GFX12-NEXT: v_dual_mov_b32 v10, s61 :: v_dual_mov_b32 v13, s15
+; GFX12-NEXT: v_dual_mov_b32 v12, s14 :: v_dual_mov_b32 v15, s13
+; GFX12-NEXT: v_dual_mov_b32 v14, s12 :: v_dual_mov_b32 v17, s11
+; GFX12-NEXT: v_dual_mov_b32 v16, s10 :: v_dual_mov_b32 v19, s33
+; GFX12-NEXT: v_dual_mov_b32 v18, s57 :: v_dual_mov_b32 v21, s3
+; GFX12-NEXT: v_dual_mov_b32 v20, s2 :: v_dual_mov_b32 v23, s1
; GFX12-NEXT: v_mov_b32_e32 v22, s0
; GFX12-NEXT: s_clause 0x5
; GFX12-NEXT: global_store_b128 v24, v[0:3], s[8:9] offset:176
diff --git a/llvm/test/CodeGen/AMDGPU/load-global-i8.ll b/llvm/test/CodeGen/AMDGPU/load-global-i8.ll
index b75c8c7e4177b..2021c5e4b2669 100644
--- a/llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+++ b/llvm/test/CodeGen/AMDGPU/load-global-i8.ll
@@ -6943,69 +6943,67 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out
; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s13
; GCN-NOHSA-SI-NEXT: s_mov_b32 s7, s13
; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, s13
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s13
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s13
; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s4, v2
; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s5, v3
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s18, v0
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s19, v1
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s4, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s4, 24
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s4, 8
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s18, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s18, 24
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s18, 8
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s16, v0
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s17, v1
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s4, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s4, 24
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s4, 8
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s16, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s16, 24
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s16, 8
; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s5, 16
; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s5, 8
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s6, s5
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s19, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s19, 8
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s19
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[18:19], 0x80000
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s30, s5
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s17, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s17, 8
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s17
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[16:17], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[4:5], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s19, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s31, s19, 24
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[6:7], 0x80000
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s5, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s5, 24
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[16:17], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[14:15], 0x80000
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s17, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s31, s17, 24
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[30:31], 0x80000
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s30, s5, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s5, 24
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[14:15], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[30:31], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[28:29], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[28:29], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s36
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s37
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s34
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s35
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s33
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s18
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s19
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s20
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s21
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s22
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s23
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s33
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s30
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s16
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s17
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s18
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s19
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s20
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s21
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s31
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s29
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s25
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s22
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s23
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s26
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s16
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s17
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s27
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8
@@ -7043,64 +7041,62 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out
; GCN-HSA-NEXT: s_mov_b32 s5, s3
; GCN-HSA-NEXT: s_mov_b32 s7, s3
; GCN-HSA-NEXT: s_mov_b32 s9, s3
-; GCN-HSA-NEXT: s_mov_b32 s11, s3
-; GCN-HSA-NEXT: s_mov_b32 s13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
-; GCN-HSA-NEXT: v_readfirstlane_b32 s14, v2
-; GCN-HSA-NEXT: v_readfirstlane_b32 s15, v3
-; GCN-HSA-NEXT: v_readfirstlane_b32 s16, v0
-; GCN-HSA-NEXT: v_readfirstlane_b32 s17, v1
-; GCN-HSA-NEXT: s_lshr_b32 s18, s14, 16
-; GCN-HSA-NEXT: s_lshr_b32 s20, s14, 24
-; GCN-HSA-NEXT: s_lshr_b32 s22, s14, 8
-; GCN-HSA-NEXT: s_lshr_b32 s2, s15, 16
-; GCN-HSA-NEXT: s_lshr_b32 s4, s15, 8
-; GCN-HSA-NEXT: s_mov_b32 s6, s15
-; GCN-HSA-NEXT: s_ashr_i32 s8, s15, 31
-; GCN-HSA-NEXT: s_ashr_i32 s10, s15, 24
-; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
-; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14
-; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15
-; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[16:17], 0x80000
-; GCN-HSA-NEXT: v_mov_b32_e32 v6, s10
-; GCN-HSA-NEXT: s_ashr_i32 s10, s17, 31
-; GCN-HSA-NEXT: v_mov_b32_e32 v7, s8
-; GCN-HSA-NEXT: s_ashr_i32 s8, s17, 24
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14
-; GCN-HSA-NEXT: s_lshr_b32 s14, s16, 16
-; GCN-HSA-NEXT: v_mov_b32_e32 v10, s8
-; GCN-HSA-NEXT: v_mov_b32_e32 v11, s10
-; GCN-HSA-NEXT: s_lshr_b32 s24, s16, 24
-; GCN-HSA-NEXT: s_lshr_b32 s8, s17, 16
-; GCN-HSA-NEXT: s_lshr_b32 s10, s17, 8
-; GCN-HSA-NEXT: s_mov_b32 s12, s17
-; GCN-HSA-NEXT: s_lshr_b32 s16, s16, 8
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15
-; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
+; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v3
+; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v2
+; GCN-HSA-NEXT: s_ashr_i32 s4, s11, 24
+; GCN-HSA-NEXT: v_readfirstlane_b32 s12, v0
+; GCN-HSA-NEXT: v_readfirstlane_b32 s13, v1
+; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[10:11], 0x80000
+; GCN-HSA-NEXT: v_mov_b32_e32 v6, s4
+; GCN-HSA-NEXT: s_ashr_i32 s4, s11, 31
+; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24
+; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25
+; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[12:13], 0x80000
+; GCN-HSA-NEXT: s_ashr_i32 s2, s13, 31
+; GCN-HSA-NEXT: v_mov_b32_e32 v7, s4
+; GCN-HSA-NEXT: s_ashr_i32 s4, s13, 24
+; GCN-HSA-NEXT: s_lshr_b32 s14, s10, 16
+; GCN-HSA-NEXT: s_lshr_b32 s16, s10, 24
+; GCN-HSA-NEXT: s_lshr_b32 s18, s10, 8
+; GCN-HSA-NEXT: s_lshr_b32 s20, s12, 16
+; GCN-HSA-NEXT: s_lshr_b32 s22, s12, 24
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s24
+; GCN-HSA-NEXT: v_mov_b32_e32 v10, s4
+; GCN-HSA-NEXT: v_mov_b32_e32 v11, s2
+; GCN-HSA-NEXT: s_lshr_b32 s10, s12, 8
+; GCN-HSA-NEXT: s_lshr_b32 s2, s11, 16
+; GCN-HSA-NEXT: s_lshr_b32 s4, s11, 8
+; GCN-HSA-NEXT: s_mov_b32 s12, s11
+; GCN-HSA-NEXT: s_lshr_b32 s6, s13, 16
+; GCN-HSA-NEXT: s_lshr_b32 s8, s13, 8
+; GCN-HSA-NEXT: s_mov_b32 s24, s13
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s25
+; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
-; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
-; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
-; GCN-HSA-NEXT: s_add_u32 s16, s0, 0x50
+; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
+; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
+; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11
+; GCN-HSA-NEXT: s_add_u32 s10, s0, 0x50
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[2:5]
-; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
-; GCN-HSA-NEXT: v_mov_b32_e32 v12, s18
-; GCN-HSA-NEXT: v_mov_b32_e32 v13, s19
-; GCN-HSA-NEXT: v_mov_b32_e32 v14, s20
-; GCN-HSA-NEXT: v_mov_b32_e32 v15, s21
-; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
+; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
+; GCN-HSA-NEXT: v_mov_b32_e32 v12, s14
+; GCN-HSA-NEXT: v_mov_b32_e32 v13, s15
+; GCN-HSA-NEXT: v_mov_b32_e32 v14, s16
+; GCN-HSA-NEXT: v_mov_b32_e32 v15, s17
+; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
@@ -7113,23 +7109,23 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
-; GCN-HSA-NEXT: v_mov_b32_e32 v12, s14
-; GCN-HSA-NEXT: v_mov_b32_e32 v13, s15
-; GCN-HSA-NEXT: v_mov_b32_e32 v14, s24
-; GCN-HSA-NEXT: v_mov_b32_e32 v15, s25
+; GCN-HSA-NEXT: v_mov_b32_e32 v12, s20
+; GCN-HSA-NEXT: v_mov_b32_e32 v13, s21
+; GCN-HSA-NEXT: v_mov_b32_e32 v14, s22
+; GCN-HSA-NEXT: v_mov_b32_e32 v15, s23
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s23
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s19
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
-; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
-; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7
+; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12
+; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
@@ -7137,17 +7133,17 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
-; GCN-HSA-NEXT: v_mov_b32_e32 v8, s8
-; GCN-HSA-NEXT: v_mov_b32_e32 v9, s9
+; GCN-HSA-NEXT: v_mov_b32_e32 v8, s6
+; GCN-HSA-NEXT: v_mov_b32_e32 v9, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_add_u32 s0, s0, 32
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
-; GCN-HSA-NEXT: v_mov_b32_e32 v12, s12
-; GCN-HSA-NEXT: v_mov_b32_e32 v13, s13
-; GCN-HSA-NEXT: v_mov_b32_e32 v14, s10
-; GCN-HSA-NEXT: v_mov_b32_e32 v15, s11
+; GCN-HSA-NEXT: v_mov_b32_e32 v12, s24
+; GCN-HSA-NEXT: v_mov_b32_e32 v13, s25
+; GCN-HSA-NEXT: v_mov_b32_e32 v14, s8
+; GCN-HSA-NEXT: v_mov_b32_e32 v15, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15]
; GCN-HSA-NEXT: s_endpgm
@@ -7166,32 +7162,30 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out
; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4
; GCN-NOHSA-VI-NEXT: s_mov_b32 s15, 0
; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s15
; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s15
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s7, s15
; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s4, v2
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s12, v0
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s6, v0
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s16, s4, 16
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s18, s4, 24
; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s5, v3
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s13, v1
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s7, v1
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s20, s4, 8
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s22, s12, 16
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s24, s12, 24
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s26, s12, 8
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s22, s6, 16
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s24, s6, 24
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s26, s6, 8
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s14, s5, 16
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s28, s5, 8
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s5
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s8, s13, 16
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s30, s13, 8
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s6, s13
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[34:35], s[12:13], 0x80000
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s10, s5, 8
+; GCN-NOHSA-VI-NEXT: s_mov_b32 s12, s5
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s8, s7, 16
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s28, s7, 8
+; GCN-NOHSA-VI-NEXT: s_mov_b32 s30, s7
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[34:35], s[6:7], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[36:37], s[4:5], 0x80000
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s29, s13, 31
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s31, s13, 24
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s29, s7, 31
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s31, s7, 24
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
@@ -7202,11 +7196,11 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, s19
; GCN-NOHSA-VI-NEXT: s_ashr_i32 s33, s5, 31
; GCN-NOHSA-VI-NEXT: s_ashr_i32 s38, s5, 24
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[30:31], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[30:31], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[28:29], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[10:11], 0x80000
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[10:11], s[28:29], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s36
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s37
@@ -8198,178 +8192,172 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-NOHSA-SI-NEXT: s_mov_b32 s7, 0
; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0
; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s37, s7
; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, s7
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s7
; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, s7
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s7
; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, s7
; GCN-NOHSA-SI-NEXT: s_mov_b32 s21, s7
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s23, s7
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s25, s7
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s27, s7
; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1)
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s28, v2
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s29, v3
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s34, v0
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s35, v1
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s22, v2
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s23, v3
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s26, v0
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s27, v1
; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0)
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s30, v6
-; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s31, v7
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s24, v6
+; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s25, v7
; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s4, v4
; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s5, v5
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s8, s28, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s28, 24
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[28:29], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[34:35], 0x80000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s39
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[30:31], 0x80000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s40
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s41
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[4:5], 0x80000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s39
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s28, 8
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s40
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s41
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s34, 16
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[8:9], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[6:7], 0x80000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s39
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s34, 24
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s40
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s41
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s34, 8
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s36, s29
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[10:11], 0x80000
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s22, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s22, 24
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s8, s22, 8
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s26, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s26, 24
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s26, 8
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[22:23], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[26:27], 0x80000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s28
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s29
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[24:25], 0x80000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[4:5], 0x80000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s28
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s29
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s24, 16
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s30
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s31
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s24, 24
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[14:15], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[10:11], 0x80000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s28
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s29
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s24, 8
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s30
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s31
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, s23
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[10:11], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[8:9], 0x80000
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:208
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s36
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s37
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s30, 16
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s39
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s30, 24
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s29, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s8, s29, 8
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s35, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s35, 8
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s16, s35
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s31, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s31, 8
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s20, s31
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[22:23], 0x80000
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:192
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s28
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s29
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s4, 16
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s30
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s31
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s4, 24
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[6:7], 0x80000
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:192
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s36
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s37
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s31, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s41, s35, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s44, s35, 24
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s29, 31
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s29, 24
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s31, 24
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s30, 8
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[24:25], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[26:27], 0x80000
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s36
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s37
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s4, 16
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s38
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s39
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s38, s4, 24
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s5, 16
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s5, 8
-; GCN-NOHSA-SI-NEXT: s_mov_b32 s26, s5
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:144
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s34
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s35
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s4, 8
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s23, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s8, s23, 8
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s27, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[12:13], 0x80000
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s27, 8
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s36
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s37
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s4, s27
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s25, 16
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[16:17], 0x80000
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s25, 8
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s36
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s37
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s25, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s27, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s42, s27, 24
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s23, 31
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s23, 24
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s43, s25, 24
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s36, s25
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s5, 16
+; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s5, 8
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:144
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s29
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s5, 31
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s35
-; GCN-NOHSA-SI-NEXT: s_ashr_i32 s46, s5, 24
-; GCN-NOHSA-SI-NEXT: s_lshr_b32 s40, s4, 8
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[42:43], s[16:17], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[24:25], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[22:23], 0x80000
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s23
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s44, s5, 31
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s27
+; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s5, 24
+; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, s5
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[4:5], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[20:21], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[40:41], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[38:39], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[34:35], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
-; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000
; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
+; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s28
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s27
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s44
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s41
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s30
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s31
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64
-; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s36
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s37
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s42
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s24
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s25
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s42
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s43
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s22
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s23
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s28
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s29
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s30
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s31
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s45
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s33
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s6
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s7
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:240
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s40
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s41
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s20
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s21
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s20
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s21
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s43
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s33
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s6
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s7
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:240
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s36
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s37
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s8
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s9
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:224
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s46
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s39
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s45
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s44
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s26
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s12
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s13
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:160
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s14
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s15
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s16
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s17
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s14
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s15
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s18
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s19
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:96
-; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0)
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s16
-; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s17
-; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s18
+; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s19
+; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s4
; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s5
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
@@ -8392,170 +8380,180 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: s_mov_b32 s3, 0
; GCN-HSA-NEXT: s_mov_b32 s19, s3
-; GCN-HSA-NEXT: s_mov_b32 s5, s3
-; GCN-HSA-NEXT: s_mov_b32 s7, s3
-; GCN-HSA-NEXT: s_mov_b32 s29, s3
; GCN-HSA-NEXT: s_mov_b32 s15, s3
-; GCN-HSA-NEXT: s_mov_b32 s31, s3
; GCN-HSA-NEXT: s_mov_b32 s13, s3
+; GCN-HSA-NEXT: s_mov_b32 s29, s3
+; GCN-HSA-NEXT: s_mov_b32 s5, s3
+; GCN-HSA-NEXT: s_mov_b32 s7, s3
; GCN-HSA-NEXT: s_mov_b32 s9, s3
-; GCN-HSA-NEXT: s_mov_b32 s11, s3
; GCN-HSA-NEXT: s_waitcnt vmcnt(1)
-; GCN-HSA-NEXT: v_readfirstlane_b32 s16, v6
-; GCN-HSA-NEXT: v_readfirstlane_b32 s17, v7
-; GCN-HSA-NEXT: v_readfirstlane_b32 s20, v4
-; GCN-HSA-NEXT: v_readfirstlane_b32 s21, v5
-; GCN-HSA-NEXT: s_lshr_b32 s18, s16, 24
-; GCN-HSA-NEXT: s_lshr_b32 s14, s16, 16
-; GCN-HSA-NEXT: s_lshr_b32 s26, s20, 16
-; GCN-HSA-NEXT: s_lshr_b32 s28, s20, 24
-; GCN-HSA-NEXT: s_lshr_b32 s30, s20, 8
-; GCN-HSA-NEXT: s_lshr_b32 s4, s17, 8
-; GCN-HSA-NEXT: s_mov_b32 s6, s17
-; GCN-HSA-NEXT: s_lshr_b32 s12, s21, 16
-; GCN-HSA-NEXT: s_lshr_b32 s8, s21, 8
-; GCN-HSA-NEXT: s_mov_b32 s10, s21
-; GCN-HSA-NEXT: s_ashr_i32 s37, s21, 31
-; GCN-HSA-NEXT: s_ashr_i32 s38, s21, 24
-; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[20:21], 0x80000
-; GCN-HSA-NEXT: s_lshr_b32 s34, s16, 8
-; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[18:19], 0x80000
+; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v6
+; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v7
+; GCN-HSA-NEXT: v_readfirstlane_b32 s16, v4
+; GCN-HSA-NEXT: s_lshr_b32 s14, s10, 24
+; GCN-HSA-NEXT: s_lshr_b32 s18, s10, 8
+; GCN-HSA-NEXT: v_readfirstlane_b32 s17, v5
+; GCN-HSA-NEXT: s_lshr_b32 s12, s10, 16
+; GCN-HSA-NEXT: s_lshr_b32 s26, s16, 16
+; GCN-HSA-NEXT: s_lshr_b32 s28, s16, 24
+; GCN-HSA-NEXT: s_lshr_b32 s30, s16, 8
+; GCN-HSA-NEXT: s_lshr_b32 s2, s11, 16
+; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[14:15], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[18:19], 0x80000
; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_readfirstlane_b32 s48, v2
; GCN-HSA-NEXT: v_readfirstlane_b32 s49, v3
; GCN-HSA-NEXT: v_readfirstlane_b32 s50, v0
; GCN-HSA-NEXT: v_readfirstlane_b32 s51, v1
-; GCN-HSA-NEXT: s_lshr_b32 s2, s17, 16
-; GCN-HSA-NEXT: s_ashr_i32 s41, s17, 31
-; GCN-HSA-NEXT: s_ashr_i32 s42, s17, 24
-; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[16:17], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[14:15], 0x80000
-; GCN-HSA-NEXT: v_mov_b32_e32 v6, s20
-; GCN-HSA-NEXT: v_mov_b32_e32 v7, s21
-; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[6:7], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[4:5], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[10:11], 0x80000
+; GCN-HSA-NEXT: s_lshr_b32 s4, s11, 8
+; GCN-HSA-NEXT: s_mov_b32 s22, s11
+; GCN-HSA-NEXT: s_lshr_b32 s6, s17, 16
+; GCN-HSA-NEXT: s_lshr_b32 s8, s17, 8
+; GCN-HSA-NEXT: s_mov_b32 s10, s17
+; GCN-HSA-NEXT: s_ashr_i32 s35, s17, 31
+; GCN-HSA-NEXT: s_ashr_i32 s36, s17, 24
+; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[16:17], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[12:13], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[2:3], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[52:53], s[30:31], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[54:55], s[28:29], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[56:57], s[26:27], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[58:59], s[34:35], 0x80000
+; GCN-HSA-NEXT: v_mov_b32_e32 v10, s44
+; GCN-HSA-NEXT: v_mov_b32_e32 v6, s46
; GCN-HSA-NEXT: s_lshr_b32 s18, s49, 16
-; GCN-HSA-NEXT: s_lshr_b32 s28, s49, 8
-; GCN-HSA-NEXT: s_mov_b32 s14, s49
-; GCN-HSA-NEXT: s_lshr_b32 s30, s51, 16
-; GCN-HSA-NEXT: s_lshr_b32 s6, s51, 8
-; GCN-HSA-NEXT: s_mov_b32 s4, s51
-; GCN-HSA-NEXT: s_lshr_b32 s34, s50, 16
-; GCN-HSA-NEXT: s_lshr_b32 s60, s50, 24
-; GCN-HSA-NEXT: s_lshr_b32 s62, s50, 8
+; GCN-HSA-NEXT: s_lshr_b32 s12, s49, 8
+; GCN-HSA-NEXT: s_lshr_b32 s14, s51, 16
+; GCN-HSA-NEXT: s_lshr_b32 s28, s51, 8
+; GCN-HSA-NEXT: s_lshr_b32 s44, s50, 16
+; GCN-HSA-NEXT: s_lshr_b32 s30, s50, 24
+; GCN-HSA-NEXT: s_lshr_b32 s46, s50, 8
+; GCN-HSA-NEXT: s_mov_b32 s2, s51
; GCN-HSA-NEXT: s_bfe_i64 s[26:27], s[50:51], 0x80000
; GCN-HSA-NEXT: s_lshr_b32 s50, s48, 16
-; GCN-HSA-NEXT: s_lshr_b32 s64, s48, 24
-; GCN-HSA-NEXT: s_lshr_b32 s66, s48, 8
-; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
-; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
+; GCN-HSA-NEXT: s_lshr_b32 s58, s48, 24
+; GCN-HSA-NEXT: s_lshr_b32 s60, s48, 8
+; GCN-HSA-NEXT: s_mov_b32 s62, s49
+; GCN-HSA-NEXT: s_ashr_i32 s39, s11, 31
+; GCN-HSA-NEXT: s_ashr_i32 s40, s11, 24
+; GCN-HSA-NEXT: v_mov_b32_e32 v4, s20
+; GCN-HSA-NEXT: v_mov_b32_e32 v5, s21
+; GCN-HSA-NEXT: v_mov_b32_e32 v8, s16
+; GCN-HSA-NEXT: v_mov_b32_e32 v9, s17
; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[12:13], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[2:3], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[6:7], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[4:5], 0x80000
+; GCN-HSA-NEXT: v_mov_b32_e32 v11, s45
+; GCN-HSA-NEXT: v_mov_b32_e32 v7, s47
; GCN-HSA-NEXT: s_ashr_i32 s33, s51, 31
-; GCN-HSA-NEXT: s_ashr_i32 s36, s51, 24
-; GCN-HSA-NEXT: s_ashr_i32 s39, s49, 31
-; GCN-HSA-NEXT: s_ashr_i32 s40, s49, 24
+; GCN-HSA-NEXT: s_ashr_i32 s34, s51, 24
+; GCN-HSA-NEXT: s_ashr_i32 s37, s49, 31
+; GCN-HSA-NEXT: s_ashr_i32 s38, s49, 24
; GCN-HSA-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[6:7], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[30:31], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[28:29], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[2:3], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[28:29], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[14:15], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[62:63], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[62:63], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[60:61], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[60:61], s[66:67], 0x80000
-; GCN-HSA-NEXT: s_bfe_i64 s[62:63], s[64:65], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[46:47], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[60:61], 0x80000
+; GCN-HSA-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x80000
; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x80000
-; GCN-HSA-NEXT: s_add_u32 s64, s0, 0x50
-; GCN-HSA-NEXT: s_addc_u32 s65, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v0, s46
-; GCN-HSA-NEXT: s_add_u32 s46, s0, 64
-; GCN-HSA-NEXT: v_mov_b32_e32 v1, s47
-; GCN-HSA-NEXT: s_addc_u32 s47, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v26, s46
-; GCN-HSA-NEXT: v_mov_b32_e32 v24, s64
-; GCN-HSA-NEXT: v_mov_b32_e32 v27, s47
-; GCN-HSA-NEXT: s_add_u32 s46, s0, 16
-; GCN-HSA-NEXT: v_mov_b32_e32 v25, s65
-; GCN-HSA-NEXT: s_addc_u32 s47, s1, 0
-; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s58
-; GCN-HSA-NEXT: v_mov_b32_e32 v4, s34
-; GCN-HSA-NEXT: s_add_u32 s34, s0, 0xd0
-; GCN-HSA-NEXT: v_mov_b32_e32 v5, s35
-; GCN-HSA-NEXT: s_addc_u32 s35, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v24, s34
-; GCN-HSA-NEXT: v_mov_b32_e32 v25, s35
-; GCN-HSA-NEXT: s_add_u32 s34, s0, 0xc0
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s59
-; GCN-HSA-NEXT: s_addc_u32 s35, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v28, s46
-; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[0:3]
-; GCN-HSA-NEXT: v_mov_b32_e32 v8, s56
+; GCN-HSA-NEXT: s_add_u32 s60, s0, 0x50
+; GCN-HSA-NEXT: s_addc_u32 s61, s1, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v24, s60
+; GCN-HSA-NEXT: v_mov_b32_e32 v25, s61
+; GCN-HSA-NEXT: s_add_u32 s60, s0, 64
+; GCN-HSA-NEXT: s_addc_u32 s61, s1, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s54
+; GCN-HSA-NEXT: s_add_u32 s54, s0, 16
+; GCN-HSA-NEXT: v_mov_b32_e32 v26, s60
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s55
+; GCN-HSA-NEXT: s_addc_u32 s55, s1, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v27, s61
+; GCN-HSA-NEXT: v_mov_b32_e32 v12, s42
+; GCN-HSA-NEXT: s_add_u32 s42, s0, 0xd0
+; GCN-HSA-NEXT: v_mov_b32_e32 v13, s43
+; GCN-HSA-NEXT: s_addc_u32 s43, s1, 0
+; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[4:7]
+; GCN-HSA-NEXT: v_mov_b32_e32 v28, s54
+; GCN-HSA-NEXT: v_mov_b32_e32 v4, s42
+; GCN-HSA-NEXT: v_mov_b32_e32 v5, s43
+; GCN-HSA-NEXT: s_add_u32 s42, s0, 0xc0
+; GCN-HSA-NEXT: v_mov_b32_e32 v0, s56
+; GCN-HSA-NEXT: v_mov_b32_e32 v1, s57
+; GCN-HSA-NEXT: v_mov_b32_e32 v29, s55
+; GCN-HSA-NEXT: s_addc_u32 s43, s1, 0
+; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[0:3]
+; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26
; GCN-HSA-NEXT: s_add_u32 s26, s0, 0x90
-; GCN-HSA-NEXT: v_mov_b32_e32 v9, s57
-; GCN-HSA-NEXT: v_mov_b32_e32 v10, s54
-; GCN-HSA-NEXT: v_mov_b32_e32 v11, s55
-; GCN-HSA-NEXT: v_mov_b32_e32 v29, s47
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27
; GCN-HSA-NEXT: s_addc_u32 s27, s1, 0
-; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[8:11]
-; GCN-HSA-NEXT: v_mov_b32_e32 v29, s27
-; GCN-HSA-NEXT: v_mov_b32_e32 v28, s26
+; GCN-HSA-NEXT: v_mov_b32_e32 v24, s26
+; GCN-HSA-NEXT: v_mov_b32_e32 v25, s27
; GCN-HSA-NEXT: s_add_u32 s26, s0, 0x80
+; GCN-HSA-NEXT: v_mov_b32_e32 v16, s50
+; GCN-HSA-NEXT: v_mov_b32_e32 v17, s51
+; GCN-HSA-NEXT: v_mov_b32_e32 v18, s58
+; GCN-HSA-NEXT: v_mov_b32_e32 v19, s59
+; GCN-HSA-NEXT: v_mov_b32_e32 v6, s42
; GCN-HSA-NEXT: s_addc_u32 s27, s1, 0
+; GCN-HSA-NEXT: v_mov_b32_e32 v20, s48
+; GCN-HSA-NEXT: v_mov_b32_e32 v21, s49
+; GCN-HSA-NEXT: v_mov_b32_e32 v22, s46
+; GCN-HSA-NEXT: v_mov_b32_e32 v23, s47
+; GCN-HSA-NEXT: v_mov_b32_e32 v7, s43
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1
-; GCN-HSA-NEXT: v_mov_b32_e32 v8, s24
+; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[16:19]
+; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[20:23]
+; GCN-HSA-NEXT: v_mov_b32_e32 v4, s24
; GCN-HSA-NEXT: s_add_u32 s24, s0, 0x70
-; GCN-HSA-NEXT: v_mov_b32_e32 v12, s44
-; GCN-HSA-NEXT: v_mov_b32_e32 v13, s45
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s52
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s53
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0
-; GCN-HSA-NEXT: v_mov_b32_e32 v9, s25
+; GCN-HSA-NEXT: v_mov_b32_e32 v5, s25
; GCN-HSA-NEXT: s_addc_u32 s25, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v6, s30
-; GCN-HSA-NEXT: v_mov_b32_e32 v7, s31
+; GCN-HSA-NEXT: v_mov_b32_e32 v8, s44
+; GCN-HSA-NEXT: v_mov_b32_e32 v9, s45
+; GCN-HSA-NEXT: v_mov_b32_e32 v10, s30
+; GCN-HSA-NEXT: v_mov_b32_e32 v11, s31
; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[12:15]
-; GCN-HSA-NEXT: v_mov_b32_e32 v31, s27
+; GCN-HSA-NEXT: v_mov_b32_e32 v26, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s20
; GCN-HSA-NEXT: s_add_u32 s20, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s28
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s29
-; GCN-HSA-NEXT: v_mov_b32_e32 v30, s26
-; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[4:7]
+; GCN-HSA-NEXT: v_mov_b32_e32 v27, s27
+; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s21
-; GCN-HSA-NEXT: v_mov_b32_e32 v4, s24
+; GCN-HSA-NEXT: v_mov_b32_e32 v8, s24
; GCN-HSA-NEXT: s_addc_u32 s21, s1, 0
-; GCN-HSA-NEXT: v_mov_b32_e32 v6, s20
+; GCN-HSA-NEXT: v_mov_b32_e32 v10, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s22
-; GCN-HSA-NEXT: v_mov_b32_e32 v10, s42
-; GCN-HSA-NEXT: v_mov_b32_e32 v11, s41
+; GCN-HSA-NEXT: v_mov_b32_e32 v6, s40
+; GCN-HSA-NEXT: v_mov_b32_e32 v7, s39
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s23
-; GCN-HSA-NEXT: v_mov_b32_e32 v5, s25
-; GCN-HSA-NEXT: v_mov_b32_e32 v7, s21
-; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[0:3]
-; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[8:11]
-; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[12:15]
+; GCN-HSA-NEXT: v_mov_b32_e32 v9, s25
+; GCN-HSA-NEXT: v_mov_b32_e32 v11, s21
+; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[0:3]
+; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
+; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16
; GCN-HSA-NEXT: s_add_u32 s16, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17
; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s37
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
-; GCN-HSA-NEXT: v_mov_b32_e32 v16, s50
+; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8
; GCN-HSA-NEXT: s_add_u32 s8, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9
@@ -8570,8 +8568,8 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s40
-; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38
+; GCN-HSA-NEXT: v_mov_b32_e32 v3, s37
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: s_add_u32 s8, s0, 0xe0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
@@ -8583,34 +8581,24 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
-; GCN-HSA-NEXT: v_mov_b32_e32 v17, s51
+; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xb0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6
; GCN-HSA-NEXT: s_add_u32 s0, s0, 0xa0
-; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36
+; GCN-HSA-NEXT: v_mov_b32_e32 v2, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s33
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
-; GCN-HSA-NEXT: v_mov_b32_e32 v18, s62
-; GCN-HSA-NEXT: v_mov_b32_e32 v19, s63
-; GCN-HSA-NEXT: v_mov_b32_e32 v26, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
-; GCN-HSA-NEXT: v_mov_b32_e32 v20, s48
-; GCN-HSA-NEXT: v_mov_b32_e32 v21, s49
-; GCN-HSA-NEXT: v_mov_b32_e32 v22, s60
-; GCN-HSA-NEXT: v_mov_b32_e32 v23, s61
-; GCN-HSA-NEXT: v_mov_b32_e32 v27, s35
-; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[16:19]
-; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23]
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_endpgm
;
@@ -8629,71 +8617,67 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4
; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5
; GCN-NOHSA-VI-NEXT: s_mov_b32 s31, 0
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s25, s31
; GCN-NOHSA-VI-NEXT: s_mov_b32 s23, s31
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s17, s31
; GCN-NOHSA-VI-NEXT: s_mov_b32 s15, s31
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s31
; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s31
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s7, s31
; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s4, v2
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s40, s4, 16
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s42, s4, 24
; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s5, v3
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s12, v0
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s6, v0
; GCN-NOHSA-VI-NEXT: s_lshr_b32 s44, s4, 8
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s13, v1
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s46, s12, 16
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s48, s12, 24
+; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0)
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s10, v6
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s12, v4
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s13, v5
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s46, s6, 16
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s48, s6, 24
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[70:71], s[4:5], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000
-; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s40
-; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s41
-; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s42
-; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s43
-; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0)
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s18, v6
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s50, s12, 8
+; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s40
+; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s41
+; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s42
+; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v6, s43
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s7, v1
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s50, s6, 8
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x80000
-; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s52, s18, 16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s70
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s71
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s44
+; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:208
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s52, s10, 16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s45
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s54, s18, 24
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[34:35], s[12:13], 0x80000
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s54, s10, 24
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[34:35], s[6:7], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s19, v7
+; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s11, v7
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s46
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s47
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s48
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s49
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s26, v4
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s56, s18, 8
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s56, s10, 8
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s58, s26, 16
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s58, s12, 16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s34
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s35
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s50
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s51
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s60, s26, 24
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[28:29], s[18:19], 0x80000
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s60, s12, 24
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[28:29], s[10:11], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
-; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s27, v5
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s36, s12, 8
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s52
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s53
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s54
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s55
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s36, s26, 8
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
@@ -8702,66 +8686,66 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s29
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s56
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s57
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[20:21], s[26:27], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[20:21], s[12:13], 0x80000
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s62, s5, 8
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s24, s5, 8
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s58
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s59
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s60
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s61
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s24, s5
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s63, s19, 24
+; GCN-NOHSA-VI-NEXT: s_mov_b32 s26, s5
; GCN-NOHSA-VI-NEXT: s_ashr_i32 s69, s5, 31
; GCN-NOHSA-VI-NEXT: s_ashr_i32 s72, s5, 24
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s22, s13, 16
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s22, s7, 16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s20
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s21
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s36
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s37
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s8, s27, 16
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s68, s27, 8
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s6, s27
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s33, s27, 31
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s38, s27, 24
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[26:27], s[24:25], 0x80000
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[24:25], s[62:63], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s64, s13, 8
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s16, s7, 8
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s30
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s31
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s72
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s69
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s16, s13
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s65, s13, 31
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s67, s13, 24
+; GCN-NOHSA-VI-NEXT: s_mov_b32 s18, s7
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s65, s7, 31
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s67, s7, 24
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s14, s19, 16
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s14, s11, 16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s26
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s27
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s24
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s25
-; GCN-NOHSA-VI-NEXT: s_lshr_b32 s66, s19, 8
-; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s19
-; GCN-NOHSA-VI-NEXT: s_ashr_i32 s39, s19, 31
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[18:19], s[16:17], 0x80000
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[16:17], s[64:65], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s62, s11, 8
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s22
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s23
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s67
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s65
+; GCN-NOHSA-VI-NEXT: s_mov_b32 s64, s11
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s39, s11, 31
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s63, s11, 24
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[10:11], 0x80000
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s8, s13, 16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s18
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s19
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s16
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s17
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[10:11], s[66:67], 0x80000
+; GCN-NOHSA-VI-NEXT: s_lshr_b32 s66, s13, 8
+; GCN-NOHSA-VI-NEXT: s_mov_b32 s68, s13
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s33, s13, 31
+; GCN-NOHSA-VI-NEXT: s_ashr_i32 s38, s13, 24
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[64:65], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[10:11], s[62:63], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s14
@@ -8769,12 +8753,12 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s63
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s39
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[68:69], 0x80000
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s12
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s13
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s10
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s11
-; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[68:69], 0x80000
+; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[66:67], 0x80000
; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT: s_nop 0
; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s8
diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
index 9da7a79ba2fdf..316ebb94948f2 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
@@ -8,32 +8,21 @@ define amdgpu_kernel void @buffer_last_use_load_0(ptr addrspace(7) %in, ptr addr
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX12-NEXT: s_mov_b32 s12, 0
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_mov_b32 s7, s12
-; GFX12-NEXT: s_mov_b32 s9, s12
+; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_mov_b32 s6, s3
-; GFX12-NEXT: s_mov_b32 s8, s1
-; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX12-NEXT: s_mov_b32 s8, s1
+; GFX12-NEXT: s_mov_b32 s9, s2
+; GFX12-NEXT: s_mov_b32 s10, s3
; GFX12-NEXT: s_clause 0x1
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-NEXT: s_mov_b32 s5, s12
+; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v1, s0
; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU
-; GFX12-NEXT: s_mov_b32 s4, s3
-; GFX12-NEXT: s_mov_b32 s3, s12
-; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
-; GFX12-NEXT: s_mov_b32 s2, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; GFX12-NEXT: s_mov_b32 s4, s1
+; GFX12-NEXT: s_mov_b32 s5, s2
+; GFX12-NEXT: s_mov_b32 s6, s3
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
; GFX12-NEXT: s_endpgm
@@ -48,34 +37,23 @@ define amdgpu_kernel void @buffer_last_use_load_1(ptr addrspace(7) %in, ptr addr
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10
+; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_mov_b32 s12, 0
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_mov_b32 s7, s12
-; GFX12-NEXT: s_mov_b32 s9, s12
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_mov_b32 s6, s3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_lshl_add_u32 v0, v0, 2, s0
; GFX12-NEXT: s_mov_b32 s8, s1
-; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX12-NEXT: s_mov_b32 s9, s2
+; GFX12-NEXT: s_mov_b32 s10, s3
; GFX12-NEXT: s_clause 0x1
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU
-; GFX12-NEXT: s_mov_b32 s5, s12
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_mov_b32 s4, s3
; GFX12-NEXT: v_mov_b32_e32 v1, s0
-; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
-; GFX12-NEXT: s_mov_b32 s2, s1
-; GFX12-NEXT: s_mov_b32 s3, s12
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; GFX12-NEXT: s_mov_b32 s4, s1
+; GFX12-NEXT: s_mov_b32 s5, s2
+; GFX12-NEXT: s_mov_b32 s6, s3
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
; GFX12-NEXT: s_endpgm
@@ -92,33 +70,22 @@ define amdgpu_kernel void @buffer_last_use_and_volatile_load(ptr addrspace(7) %i
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX12-NEXT: s_mov_b32 s12, 0
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_mov_b32 s7, s12
-; GFX12-NEXT: s_mov_b32 s9, s12
+; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_mov_b32 s6, s3
-; GFX12-NEXT: s_mov_b32 s8, s1
-; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX12-NEXT: s_mov_b32 s8, s1
+; GFX12-NEXT: s_mov_b32 s9, s2
+; GFX12-NEXT: s_mov_b32 s10, s3
; GFX12-NEXT: s_clause 0x1
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-NEXT: s_mov_b32 s5, s12
+; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v1, s0
; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_BYPASS scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: s_mov_b32 s4, s3
-; GFX12-NEXT: s_mov_b32 s3, s12
-; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
-; GFX12-NEXT: s_mov_b32 s2, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; GFX12-NEXT: s_mov_b32 s4, s1
+; GFX12-NEXT: s_mov_b32 s5, s2
+; GFX12-NEXT: s_mov_b32 s6, s3
; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
; GFX12-NEXT: s_endpgm
entry:
@@ -132,32 +99,21 @@ define amdgpu_kernel void @buffer_last_use_and_nontemporal_load(ptr addrspace(7)
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX12-NEXT: s_mov_b32 s12, 0
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_mov_b32 s7, s12
-; GFX12-NEXT: s_mov_b32 s9, s12
+; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_mov_b32 s6, s3
-; GFX12-NEXT: s_mov_b32 s8, s1
-; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX12-NEXT: s_mov_b32 s8, s1
+; GFX12-NEXT: s_mov_b32 s9, s2
+; GFX12-NEXT: s_mov_b32 s10, s3
; GFX12-NEXT: s_clause 0x1
-; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-NEXT: s_mov_b32 s5, s12
+; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v1, s0
; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU
-; GFX12-NEXT: s_mov_b32 s4, s3
-; GFX12-NEXT: s_mov_b32 s3, s12
-; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX12-NEXT: s_mov_b32 s13, s2
-; GFX12-NEXT: s_mov_b32 s2, s1
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; GFX12-NEXT: s_mov_b32 s4, s1
+; GFX12-NEXT: s_mov_b32 s5, s2
+; GFX12-NEXT: s_mov_b32 s6, s3
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
; GFX12-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
index 932c66b77e9bf..16f08677ce6fa 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
@@ -11,82 +11,43 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel=1 -mcpu=gfx1200 < %s | FileCheck --check-prefixes=GFX12,GFX12-GISEL %s
define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, ptr addrspace(7) %out) {
-; GFX9-SDAG-LABEL: buffer_nontemporal_load_store:
-; GFX9-SDAG: ; %bb.0: ; %entry
-; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10
-; GFX9-SDAG-NEXT: s_mov_b32 s10, 0
-; GFX9-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX9-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX9-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX9-SDAG-NEXT: s_mov_b32 s3, s10
-; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11]
-; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX9-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc slc
-; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30
-; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX9-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX9-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX9-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX9-SDAG-NEXT: s_mov_b32 s3, s10
-; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11]
-; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX9-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc
-; GFX9-SDAG-NEXT: s_endpgm
-;
-; GFX9-GISEL-LABEL: buffer_nontemporal_load_store:
-; GFX9-GISEL: ; %bb.0: ; %entry
-; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX9-GISEL-NEXT: s_load_dword s7, s[8:9], 0x10
-; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX9-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX9-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX9-GISEL-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc slc
-; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX9-GISEL-NEXT: s_load_dword s7, s[8:9], 0x30
-; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX9-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX9-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX9-GISEL-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc
-; GFX9-GISEL-NEXT: s_endpgm
+; GFX9-LABEL: buffer_nontemporal_load_store:
+; GFX9: ; %bb.0: ; %entry
+; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
+; GFX9-NEXT: s_load_dword s7, s[8:9], 0x10
+; GFX9-NEXT: s_waitcnt lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s4, s1
+; GFX9-NEXT: s_mov_b32 s5, s2
+; GFX9-NEXT: s_mov_b32 s6, s3
+; GFX9-NEXT: v_mov_b32_e32 v0, s0
+; GFX9-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc slc
+; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
+; GFX9-NEXT: s_load_dword s7, s[8:9], 0x30
+; GFX9-NEXT: s_waitcnt lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s4, s1
+; GFX9-NEXT: s_mov_b32 s5, s2
+; GFX9-NEXT: s_mov_b32 s6, s3
+; GFX9-NEXT: v_mov_b32_e32 v1, s0
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc
+; GFX9-NEXT: s_endpgm
;
; GFX942-SDAG-LABEL: buffer_nontemporal_load_store:
; GFX942-SDAG: ; %bb.0: ; %entry
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
-; GFX942-SDAG-NEXT: s_load_dword s13, s[4:5], 0x10
-; GFX942-SDAG-NEXT: s_mov_b32 s12, 0
-; GFX942-SDAG-NEXT: s_mov_b32 s7, s12
+; GFX942-SDAG-NEXT: s_load_dword s11, s[4:5], 0x10
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: s_mov_b32 s6, s3
-; GFX942-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX942-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX942-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX942-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX942-SDAG-NEXT: s_or_b64 s[8:9], s[2:3], s[12:13]
+; GFX942-SDAG-NEXT: s_mov_b32 s8, s1
+; GFX942-SDAG-NEXT: s_mov_b32 s9, s2
+; GFX942-SDAG-NEXT: s_mov_b32 s10, s3
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX942-SDAG-NEXT: buffer_load_dword v1, v0, s[8:11], 0 offen nt
-; GFX942-SDAG-NEXT: s_load_dword s13, s[4:5], 0x30
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20
-; GFX942-SDAG-NEXT: s_mov_b32 s5, s12
+; GFX942-SDAG-NEXT: s_load_dword s7, s[4:5], 0x30
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX942-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX942-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX942-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX942-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX942-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; GFX942-SDAG-NEXT: s_mov_b32 s4, s1
+; GFX942-SDAG-NEXT: s_mov_b32 s5, s2
+; GFX942-SDAG-NEXT: s_mov_b32 s6, s3
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: buffer_store_dword v1, v0, s[4:7], 0 offen nt
@@ -113,176 +74,75 @@ define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, p
; GFX942-GISEL-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen nt
; GFX942-GISEL-NEXT: s_endpgm
;
-; GFX10-SDAG-LABEL: buffer_nontemporal_load_store:
-; GFX10-SDAG: ; %bb.0: ; %entry
-; GFX10-SDAG-NEXT: s_clause 0x1
-; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10
-; GFX10-SDAG-NEXT: s_mov_b32 s10, 0
-; GFX10-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX10-SDAG-NEXT: s_mov_b32 s13, s10
-; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX10-SDAG-NEXT: s_mov_b32 s12, s1
-; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX10-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[12:13], s[10:11]
-; GFX10-SDAG-NEXT: s_clause 0x1
-; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30
-; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX10-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen slc
-; GFX10-SDAG-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)
-; GFX10-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX10-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX10-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX10-SDAG-NEXT: s_mov_b32 s3, s10
-; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11]
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc
-; GFX10-SDAG-NEXT: s_endpgm
-;
-; GFX10-GISEL-LABEL: buffer_nontemporal_load_store:
-; GFX10-GISEL: ; %bb.0: ; %entry
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX10-GISEL-NEXT: s_load_dword s7, s[8:9], 0x10
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX10-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX10-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX10-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX10-GISEL-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen slc
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX10-GISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)
-; GFX10-GISEL-NEXT: s_load_dword s7, s[8:9], 0x30
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX10-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX10-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX10-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX10-GISEL-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc
-; GFX10-GISEL-NEXT: s_endpgm
-;
-; GFX11-SDAG-LABEL: buffer_nontemporal_load_store:
-; GFX11-SDAG: ; %bb.0: ; %entry
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX11-SDAG-NEXT: s_mov_b32 s12, 0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-SDAG-NEXT: s_mov_b32 s7, s12
-; GFX11-SDAG-NEXT: s_mov_b32 s9, s12
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: s_mov_b32 s6, s3
-; GFX11-SDAG-NEXT: s_mov_b32 s8, s1
-; GFX11-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX11-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30
-; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX11-SDAG-NEXT: s_mov_b32 s5, s12
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX11-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen slc dlc
-; GFX11-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX11-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX11-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX11-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX11-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX11-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen glc slc dlc
-; GFX11-SDAG-NEXT: s_endpgm
-;
-; GFX11-GISEL-LABEL: buffer_nontemporal_load_store:
-; GFX11-GISEL: ; %bb.0: ; %entry
-; GFX11-GISEL-NEXT: s_clause 0x1
-; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-GISEL-NEXT: s_load_b32 s11, s[4:5], 0x10
-; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-GISEL-NEXT: s_mov_b32 s8, s1
-; GFX11-GISEL-NEXT: s_mov_b32 s9, s2
-; GFX11-GISEL-NEXT: s_mov_b32 s10, s3
-; GFX11-GISEL-NEXT: s_clause 0x1
-; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX11-GISEL-NEXT: s_load_b32 s7, s[4:5], 0x30
-; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX11-GISEL-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen slc dlc
-; GFX11-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX11-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX11-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen glc slc dlc
-; GFX11-GISEL-NEXT: s_endpgm
+; GFX10-LABEL: buffer_nontemporal_load_store:
+; GFX10: ; %bb.0: ; %entry
+; GFX10-NEXT: s_clause 0x1
+; GFX10-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
+; GFX10-NEXT: s_load_dword s7, s[8:9], 0x10
+; GFX10-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-NEXT: v_mov_b32_e32 v0, s0
+; GFX10-NEXT: s_mov_b32 s4, s1
+; GFX10-NEXT: s_mov_b32 s5, s2
+; GFX10-NEXT: s_mov_b32 s6, s3
+; GFX10-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen slc
+; GFX10-NEXT: s_clause 0x1
+; GFX10-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
+; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)
+; GFX10-NEXT: s_load_dword s7, s[8:9], 0x30
+; GFX10-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-NEXT: v_mov_b32_e32 v1, s0
+; GFX10-NEXT: s_mov_b32 s4, s1
+; GFX10-NEXT: s_mov_b32 s5, s2
+; GFX10-NEXT: s_mov_b32 s6, s3
+; GFX10-NEXT: s_waitcnt vmcnt(0)
+; GFX10-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc
+; GFX10-NEXT: s_endpgm
;
-; GFX12-SDAG-LABEL: buffer_nontemporal_load_store:
-; GFX12-SDAG: ; %bb.0: ; %entry
-; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX12-SDAG-NEXT: s_mov_b32 s12, 0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-SDAG-NEXT: s_mov_b32 s7, s12
-; GFX12-SDAG-NEXT: s_mov_b32 s9, s12
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_mov_b32 s6, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s8, s1
-; GFX12-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX12-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
-; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30
-; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-SDAG-NEXT: s_mov_b32 s5, s12
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX12-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT
-; GFX12-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX12-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX12-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX12-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT
-; GFX12-SDAG-NEXT: s_endpgm
+; GFX11-LABEL: buffer_nontemporal_load_store:
+; GFX11: ; %bb.0: ; %entry
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_load_b32 s11, s[4:5], 0x10
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: s_mov_b32 s8, s1
+; GFX11-NEXT: s_mov_b32 s9, s2
+; GFX11-NEXT: s_mov_b32 s10, s3
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
+; GFX11-NEXT: s_load_b32 s7, s[4:5], 0x30
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v1, s0
+; GFX11-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen slc dlc
+; GFX11-NEXT: s_mov_b32 s4, s1
+; GFX11-NEXT: s_mov_b32 s5, s2
+; GFX11-NEXT: s_mov_b32 s6, s3
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen glc slc dlc
+; GFX11-NEXT: s_endpgm
;
-; GFX12-GISEL-LABEL: buffer_nontemporal_load_store:
-; GFX12-GISEL: ; %bb.0: ; %entry
-; GFX12-GISEL-NEXT: s_clause 0x1
-; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-GISEL-NEXT: s_load_b32 s11, s[4:5], 0x10
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-GISEL-NEXT: s_mov_b32 s8, s1
-; GFX12-GISEL-NEXT: s_mov_b32 s9, s2
-; GFX12-GISEL-NEXT: s_mov_b32 s10, s3
-; GFX12-GISEL-NEXT: s_clause 0x1
-; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-GISEL-NEXT: s_load_b32 s7, s[4:5], 0x30
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX12-GISEL-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT
-; GFX12-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX12-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX12-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
-; GFX12-GISEL-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT
-; GFX12-GISEL-NEXT: s_endpgm
+; GFX12-LABEL: buffer_nontemporal_load_store:
+; GFX12: ; %bb.0: ; %entry
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-NEXT: s_mov_b32 s8, s1
+; GFX12-NEXT: s_mov_b32 s9, s2
+; GFX12-NEXT: s_mov_b32 s10, s3
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v1, s0
+; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT
+; GFX12-NEXT: s_mov_b32 s4, s1
+; GFX12-NEXT: s_mov_b32 s5, s2
+; GFX12-NEXT: s_mov_b32 s6, s3
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT
+; GFX12-NEXT: s_endpgm
entry:
%val = load i32, ptr addrspace(7) %in, !nontemporal !0
store i32 %val, ptr addrspace(7) %out, !nontemporal !0
@@ -290,85 +150,45 @@ entry:
}
define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrspace(7) %in, ptr addrspace(7) %out) {
-; GFX9-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX9-SDAG: ; %bb.0: ; %entry
-; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10
-; GFX9-SDAG-NEXT: s_mov_b32 s10, 0
-; GFX9-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX9-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX9-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX9-SDAG-NEXT: s_mov_b32 s3, s10
-; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11]
-; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX9-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30
-; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX9-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX9-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX9-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX9-SDAG-NEXT: s_mov_b32 s3, s10
-; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11]
-; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX9-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX9-SDAG-NEXT: s_endpgm
-;
-; GFX9-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX9-GISEL: ; %bb.0: ; %entry
-; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX9-GISEL-NEXT: s_load_dword s7, s[8:9], 0x10
-; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX9-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX9-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX9-GISEL-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX9-GISEL-NEXT: s_load_dword s7, s[8:9], 0x30
-; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX9-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX9-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX9-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX9-GISEL-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX9-GISEL-NEXT: s_endpgm
+; GFX9-LABEL: buffer_nontemporal_and_volatile_load_store:
+; GFX9: ; %bb.0: ; %entry
+; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
+; GFX9-NEXT: s_load_dword s7, s[8:9], 0x10
+; GFX9-NEXT: s_waitcnt lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s4, s1
+; GFX9-NEXT: s_mov_b32 s5, s2
+; GFX9-NEXT: s_mov_b32 s6, s3
+; GFX9-NEXT: v_mov_b32_e32 v0, s0
+; GFX9-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
+; GFX9-NEXT: s_load_dword s7, s[8:9], 0x30
+; GFX9-NEXT: s_waitcnt lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s4, s1
+; GFX9-NEXT: s_mov_b32 s5, s2
+; GFX9-NEXT: s_mov_b32 s6, s3
+; GFX9-NEXT: v_mov_b32_e32 v1, s0
+; GFX9-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_endpgm
;
; GFX942-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store:
; GFX942-SDAG: ; %bb.0: ; %entry
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
-; GFX942-SDAG-NEXT: s_load_dword s13, s[4:5], 0x10
-; GFX942-SDAG-NEXT: s_mov_b32 s12, 0
-; GFX942-SDAG-NEXT: s_mov_b32 s7, s12
+; GFX942-SDAG-NEXT: s_load_dword s11, s[4:5], 0x10
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: s_mov_b32 s6, s3
-; GFX942-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX942-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX942-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX942-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX942-SDAG-NEXT: s_or_b64 s[8:9], s[2:3], s[12:13]
+; GFX942-SDAG-NEXT: s_mov_b32 s8, s1
+; GFX942-SDAG-NEXT: s_mov_b32 s9, s2
+; GFX942-SDAG-NEXT: s_mov_b32 s10, s3
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX942-SDAG-NEXT: buffer_load_dword v1, v0, s[8:11], 0 offen sc0 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX942-SDAG-NEXT: s_load_dword s13, s[4:5], 0x30
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20
-; GFX942-SDAG-NEXT: s_mov_b32 s5, s12
+; GFX942-SDAG-NEXT: s_load_dword s7, s[4:5], 0x30
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX942-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX942-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX942-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX942-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX942-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX942-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
+; GFX942-SDAG-NEXT: s_mov_b32 s4, s1
+; GFX942-SDAG-NEXT: s_mov_b32 s5, s2
+; GFX942-SDAG-NEXT: s_mov_b32 s6, s3
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX942-SDAG-NEXT: buffer_store_dword v1, v0, s[4:7], 0 offen sc0 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
@@ -396,182 +216,78 @@ define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrsp
; GFX942-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-GISEL-NEXT: s_endpgm
;
-; GFX10-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX10-SDAG: ; %bb.0: ; %entry
-; GFX10-SDAG-NEXT: s_clause 0x1
-; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10
-; GFX10-SDAG-NEXT: s_mov_b32 s10, 0
-; GFX10-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX10-SDAG-NEXT: s_mov_b32 s13, s10
-; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX10-SDAG-NEXT: s_mov_b32 s12, s1
-; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX10-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[12:13], s[10:11]
-; GFX10-SDAG-NEXT: s_clause 0x1
-; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30
-; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX10-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc dlc
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SDAG-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)
-; GFX10-SDAG-NEXT: s_mov_b32 s5, s10
-; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11]
-; GFX10-SDAG-NEXT: s_mov_b32 s11, s2
-; GFX10-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX10-SDAG-NEXT: s_mov_b32 s3, s10
-; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11]
-; GFX10-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen
-; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-SDAG-NEXT: s_endpgm
-;
-; GFX10-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX10-GISEL: ; %bb.0: ; %entry
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
-; GFX10-GISEL-NEXT: s_load_dword s7, s[8:9], 0x10
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX10-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX10-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX10-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX10-GISEL-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc dlc
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
-; GFX10-GISEL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)
-; GFX10-GISEL-NEXT: s_load_dword s7, s[8:9], 0x30
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX10-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX10-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX10-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX10-GISEL-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen
-; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX10-GISEL-NEXT: s_endpgm
-;
-; GFX11-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX11-SDAG: ; %bb.0: ; %entry
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX11-SDAG-NEXT: s_mov_b32 s12, 0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-SDAG-NEXT: s_mov_b32 s7, s12
-; GFX11-SDAG-NEXT: s_mov_b32 s9, s12
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: s_mov_b32 s6, s3
-; GFX11-SDAG-NEXT: s_mov_b32 s8, s1
-; GFX11-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX11-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30
-; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX11-SDAG-NEXT: s_mov_b32 s5, s12
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX11-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen glc dlc
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX11-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX11-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX11-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX11-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX11-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX11-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
-; GFX11-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen dlc
-; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-SDAG-NEXT: s_endpgm
-;
-; GFX11-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX11-GISEL: ; %bb.0: ; %entry
-; GFX11-GISEL-NEXT: s_clause 0x1
-; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX11-GISEL-NEXT: s_load_b32 s11, s[4:5], 0x10
-; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX11-GISEL-NEXT: s_mov_b32 s8, s1
-; GFX11-GISEL-NEXT: s_mov_b32 s9, s2
-; GFX11-GISEL-NEXT: s_mov_b32 s10, s3
-; GFX11-GISEL-NEXT: s_clause 0x1
-; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX11-GISEL-NEXT: s_load_b32 s7, s[4:5], 0x30
-; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX11-GISEL-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen glc dlc
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX11-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX11-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX11-GISEL-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen dlc
-; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-GISEL-NEXT: s_endpgm
+; GFX10-LABEL: buffer_nontemporal_and_volatile_load_store:
+; GFX10: ; %bb.0: ; %entry
+; GFX10-NEXT: s_clause 0x1
+; GFX10-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
+; GFX10-NEXT: s_load_dword s7, s[8:9], 0x10
+; GFX10-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-NEXT: v_mov_b32_e32 v0, s0
+; GFX10-NEXT: s_mov_b32 s4, s1
+; GFX10-NEXT: s_mov_b32 s5, s2
+; GFX10-NEXT: s_mov_b32 s6, s3
+; GFX10-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc dlc
+; GFX10-NEXT: s_waitcnt vmcnt(0)
+; GFX10-NEXT: s_clause 0x1
+; GFX10-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20
+; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)
+; GFX10-NEXT: s_load_dword s7, s[8:9], 0x30
+; GFX10-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-NEXT: v_mov_b32_e32 v1, s0
+; GFX10-NEXT: s_mov_b32 s4, s1
+; GFX10-NEXT: s_mov_b32 s5, s2
+; GFX10-NEXT: s_mov_b32 s6, s3
+; GFX10-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen
+; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
+; GFX10-NEXT: s_endpgm
;
-; GFX12-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX12-SDAG: ; %bb.0: ; %entry
-; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10
-; GFX12-SDAG-NEXT: s_mov_b32 s12, 0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-SDAG-NEXT: s_mov_b32 s7, s12
-; GFX12-SDAG-NEXT: s_mov_b32 s9, s12
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_mov_b32 s6, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s8, s1
-; GFX12-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13]
-; GFX12-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
-; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30
-; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-SDAG-NEXT: s_mov_b32 s5, s12
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX12-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT scope:SCOPE_SYS
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: s_mov_b32 s4, s3
-; GFX12-SDAG-NEXT: s_mov_b32 s3, s12
-; GFX12-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13]
-; GFX12-SDAG-NEXT: s_mov_b32 s13, s2
-; GFX12-SDAG-NEXT: s_mov_b32 s2, s1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX12-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13]
-; GFX12-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT scope:SCOPE_SYS
-; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
-; GFX12-SDAG-NEXT: s_endpgm
+; GFX11-LABEL: buffer_nontemporal_and_volatile_load_store:
+; GFX11: ; %bb.0: ; %entry
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_load_b32 s11, s[4:5], 0x10
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v0, s0
+; GFX11-NEXT: s_mov_b32 s8, s1
+; GFX11-NEXT: s_mov_b32 s9, s2
+; GFX11-NEXT: s_mov_b32 s10, s3
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
+; GFX11-NEXT: s_load_b32 s7, s[4:5], 0x30
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v1, s0
+; GFX11-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen glc dlc
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: s_mov_b32 s4, s1
+; GFX11-NEXT: s_mov_b32 s5, s2
+; GFX11-NEXT: s_mov_b32 s6, s3
+; GFX11-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen dlc
+; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
+; GFX11-NEXT: s_endpgm
;
-; GFX12-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store:
-; GFX12-GISEL: ; %bb.0: ; %entry
-; GFX12-GISEL-NEXT: s_clause 0x1
-; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-GISEL-NEXT: s_load_b32 s11, s[4:5], 0x10
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-GISEL-NEXT: s_mov_b32 s8, s1
-; GFX12-GISEL-NEXT: s_mov_b32 s9, s2
-; GFX12-GISEL-NEXT: s_mov_b32 s10, s3
-; GFX12-GISEL-NEXT: s_clause 0x1
-; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
-; GFX12-GISEL-NEXT: s_load_b32 s7, s[4:5], 0x30
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, s0
-; GFX12-GISEL-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT scope:SCOPE_SYS
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
-; GFX12-GISEL-NEXT: s_mov_b32 s4, s1
-; GFX12-GISEL-NEXT: s_mov_b32 s5, s2
-; GFX12-GISEL-NEXT: s_mov_b32 s6, s3
-; GFX12-GISEL-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT scope:SCOPE_SYS
-; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
-; GFX12-GISEL-NEXT: s_endpgm
+; GFX12-LABEL: buffer_nontemporal_and_volatile_load_store:
+; GFX12: ; %bb.0: ; %entry
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-NEXT: s_load_b32 s11, s[4:5], 0x10
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-NEXT: s_mov_b32 s8, s1
+; GFX12-NEXT: s_mov_b32 s9, s2
+; GFX12-NEXT: s_mov_b32 s10, s3
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s7, s[4:5], 0x30
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v1, s0
+; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT scope:SCOPE_SYS
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: s_mov_b32 s4, s1
+; GFX12-NEXT: s_mov_b32 s5, s2
+; GFX12-NEXT: s_mov_b32 s6, s3
+; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT scope:SCOPE_SYS
+; GFX12-NEXT: s_wait_storecnt 0x0
+; GFX12-NEXT: s_endpgm
entry:
%val = load volatile i32, ptr addrspace(7) %in, !nontemporal !0
store volatile i32 %val, ptr addrspace(7) %out, !nontemporal !0
@@ -580,8 +296,12 @@ entry:
!0 = !{i32 1}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX10: {{.*}}
-; GFX11: {{.*}}
-; GFX12: {{.*}}
-; GFX9: {{.*}}
+; GFX10-GISEL: {{.*}}
+; GFX10-SDAG: {{.*}}
+; GFX11-GISEL: {{.*}}
+; GFX11-SDAG: {{.*}}
+; GFX12-GISEL: {{.*}}
+; GFX12-SDAG: {{.*}}
+; GFX9-GISEL: {{.*}}
+; GFX9-SDAG: {{.*}}
; GFX942: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll b/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
index b7e6ed26876c4..6f10944c19689 100644
--- a/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
+++ b/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
@@ -8,20 +8,15 @@ define amdgpu_kernel void @lshl1_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v1, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s7, s4
-; CHECK-NEXT: s_mov_b32 s3, s4
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_mov_b32 s2, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[2:3], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v1, v1, 1, s0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b16 v0, v1, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
@@ -38,20 +33,15 @@ define amdgpu_kernel void @lshl2_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v1, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s7, s4
-; CHECK-NEXT: s_mov_b32 s3, s4
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_mov_b32 s2, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[2:3], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v1, v1, 2, s0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
@@ -68,22 +58,17 @@ define amdgpu_kernel void @lshl3_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v2, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s7, s4
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 0
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_mov_b32 s2, s1
-; CHECK-NEXT: s_mov_b32 s3, s4
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[2:3], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v2, v2, 3, s0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b64 v[0:1], v2, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
@@ -100,23 +85,18 @@ define amdgpu_kernel void @lshl4_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; CHECK-NEXT: s_mov_b32 s9, s4
+; CHECK-NEXT: s_delay_alu instid0(VALU_DEP_1)
; CHECK-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, v0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v3, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s7, s4
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s8, s1
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[8:9], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v4, v3, 4, s0
; CHECK-NEXT: v_mov_b32_e32 v3, v0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b128 v[0:3], v4, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
diff --git a/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll b/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
new file mode 100644
index 0000000000000..2f0e36619d513
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
@@ -0,0 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-- -mcpu=gfx950 < %s | FileCheck -check-prefix=GFX950 %s
+; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250 %s
+
+; fold (srl (bitcast (build_vector e0, ..., eN)), N * eltsize) -> (zext eN)
+;
+; On targets with native i16, the generic (srl (shl x, c), c) -> and combine
+; does not fire because the i16 value goes through a v2i16 packing chain
+; rather than an any_extend. Without this fold, a lshl+lshr pair remains where
+; a single AND would suffice.
+
+define void @srl_bv_extract_last(ptr addrspace(1) %out, i16 %a, i16 %b, i16 %c, i16 %d) {
+; GFX950-LABEL: srl_bv_extract_last:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_and_b32_e32 v2, 0xffff, v5
+; GFX950-NEXT: v_mov_b32_e32 v3, 0
+; GFX950-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX950-NEXT: s_waitcnt vmcnt(0)
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: srl_bv_extract_last:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_and_b32_e32 v2, 0xffff, v5
+; GFX1250-NEXT: v_mov_b32_e32 v3, 0
+; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %bv0 = insertelement <4 x i16> poison, i16 %a, i32 0
+ %bv1 = insertelement <4 x i16> %bv0, i16 %b, i32 1
+ %bv2 = insertelement <4 x i16> %bv1, i16 %c, i32 2
+ %bv3 = insertelement <4 x i16> %bv2, i16 %d, i32 3
+ %bc = bitcast <4 x i16> %bv3 to i64
+ %srl = lshr i64 %bc, 48
+ store i64 %srl, ptr addrspace(1) %out
+ ret void
+}
+
+; Negative test: shift amount is not (NumElts-1) * EltSize, fold does not fire.
+define void @srl_bv_not_last(ptr addrspace(1) %out, i16 %a, i16 %b, i16 %c, i16 %d) {
+; GFX950-LABEL: srl_bv_not_last:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: s_mov_b32 s0, 0x5040100
+; GFX950-NEXT: v_perm_b32 v5, v5, v4, s0
+; GFX950-NEXT: v_perm_b32 v4, v3, v2, s0
+; GFX950-NEXT: v_lshrrev_b64 v[2:3], 16, v[4:5]
+; GFX950-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX950-NEXT: s_waitcnt vmcnt(0)
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: srl_bv_not_last:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_perm_b32 v5, v5, v4, 0x5040100
+; GFX1250-NEXT: v_perm_b32 v4, v3, v2, 0x5040100
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_lshrrev_b64 v[2:3], 16, v[4:5]
+; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %bv0 = insertelement <4 x i16> poison, i16 %a, i32 0
+ %bv1 = insertelement <4 x i16> %bv0, i16 %b, i32 1
+ %bv2 = insertelement <4 x i16> %bv1, i16 %c, i32 2
+ %bv3 = insertelement <4 x i16> %bv2, i16 %d, i32 3
+ %bc = bitcast <4 x i16> %bv3 to i64
+ %srl = lshr i64 %bc, 16
+ store i64 %srl, ptr addrspace(1) %out
+ ret void
+}
diff --git a/llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll b/llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
index e9a0671ead4e0..455f77d4f4b15 100644
--- a/llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
+++ b/llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
@@ -533,18 +533,15 @@ define amdgpu_gfx void @strict_wwm_call_i64(ptr addrspace(8) inreg %tmp14, i64 i
; GFX9-O0-NEXT: buffer_store_dword v8, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-O0-NEXT: s_nop 0
; GFX9-O0-NEXT: buffer_store_dword v9, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-O0-NEXT: s_nop 0
-; GFX9-O0-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: s_nop 0
-; GFX9-O0-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: buffer_store_dword v10, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill
-; GFX9-O0-NEXT: buffer_store_dword v11, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v10, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v11, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill
; GFX9-O0-NEXT: s_mov_b64 exec, s[34:35]
-; GFX9-O0-NEXT: s_add_i32 s32, s32, 0x1000
+; GFX9-O0-NEXT: s_add_i32 s32, s32, 0xc00
; GFX9-O0-NEXT: v_writelane_b32 v10, s30, 0
; GFX9-O0-NEXT: v_writelane_b32 v10, s31, 1
; GFX9-O0-NEXT: s_mov_b32 s34, s8
@@ -590,9 +587,6 @@ define amdgpu_gfx void @strict_wwm_call_i64(ptr addrspace(8) inreg %tmp14, i64 i
; GFX9-O0-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[34:35]
; GFX9-O0-NEXT: v_mov_b32_e32 v8, v3
; GFX9-O0-NEXT: v_mov_b32_e32 v9, v2
-; GFX9-O0-NEXT: s_mov_b32 s34, 32
-; GFX9-O0-NEXT: v_lshrrev_b64 v[4:5], s34, v[8:9]
-; GFX9-O0-NEXT: v_mov_b32_e32 v2, v4
; GFX9-O0-NEXT: s_getpc_b64 s[34:35]
; GFX9-O0-NEXT: s_add_u32 s34, s34, strict_wwm_called_i64 at gotpcrel32@lo+4
; GFX9-O0-NEXT: s_addc_u32 s35, s35, strict_wwm_called_i64 at gotpcrel32@hi+12
@@ -630,14 +624,12 @@ define amdgpu_gfx void @strict_wwm_call_i64(ptr addrspace(8) inreg %tmp14, i64 i
; GFX9-O0-NEXT: buffer_load_dword v3, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload
; GFX9-O0-NEXT: buffer_load_dword v8, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload
; GFX9-O0-NEXT: buffer_load_dword v9, off, s[0:3], s33 offset:12 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v4, off, s[0:3], s33 offset:16 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v5, off, s[0:3], s33 offset:20 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v2, off, s[0:3], s33 offset:24 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v3, off, s[0:3], s33 offset:28 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v4, off, s[0:3], s33 offset:32 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v5, off, s[0:3], s33 offset:36 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v10, off, s[0:3], s33 offset:40 ; 4-byte Folded Reload
-; GFX9-O0-NEXT: buffer_load_dword v11, off, s[0:3], s33 offset:44 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: buffer_load_dword v2, off, s[0:3], s33 offset:16 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: buffer_load_dword v3, off, s[0:3], s33 offset:20 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: buffer_load_dword v4, off, s[0:3], s33 offset:24 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: buffer_load_dword v5, off, s[0:3], s33 offset:28 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: buffer_load_dword v10, off, s[0:3], s33 offset:32 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: buffer_load_dword v11, off, s[0:3], s33 offset:36 ; 4-byte Folded Reload
; GFX9-O0-NEXT: s_mov_b64 exec, s[34:35]
; GFX9-O0-NEXT: s_mov_b32 s33, s46
; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/wwm-reserved.ll b/llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
index 72672c8b6efad..4ca422291edcb 100644
--- a/llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
+++ b/llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
@@ -591,9 +591,6 @@ define amdgpu_kernel void @call_i64(ptr addrspace(8) %tmp14, i64 %arg) {
; GFX9-O0-NEXT: v_cndmask_b32_e64 v7, v7, v0, s[2:3]
; GFX9-O0-NEXT: v_mov_b32_e32 v9, v7
; GFX9-O0-NEXT: v_mov_b32_e32 v10, v6
-; GFX9-O0-NEXT: s_mov_b32 s2, 32
-; GFX9-O0-NEXT: v_lshrrev_b64 v[11:12], s2, v[9:10]
-; GFX9-O0-NEXT: v_mov_b32_e32 v6, v11
; GFX9-O0-NEXT: s_mov_b64 s[8:9], 60
; GFX9-O0-NEXT: s_mov_b32 s2, s0
; GFX9-O0-NEXT: s_mov_b32 s0, s1
@@ -1421,9 +1418,6 @@ define amdgpu_kernel void @strict_wwm_call_i64(ptr addrspace(8) %tmp14, i64 %arg
; GFX9-O0-NEXT: v_cndmask_b32_e64 v7, v7, v0, s[2:3]
; GFX9-O0-NEXT: v_mov_b32_e32 v9, v7
; GFX9-O0-NEXT: v_mov_b32_e32 v10, v6
-; GFX9-O0-NEXT: s_mov_b32 s2, 32
-; GFX9-O0-NEXT: v_lshrrev_b64 v[11:12], s2, v[9:10]
-; GFX9-O0-NEXT: v_mov_b32_e32 v6, v11
; GFX9-O0-NEXT: s_mov_b64 s[8:9], 60
; GFX9-O0-NEXT: s_mov_b32 s2, s0
; GFX9-O0-NEXT: s_mov_b32 s0, s1
diff --git a/llvm/test/CodeGen/NVPTX/f32x2-convert-i32x2.ll b/llvm/test/CodeGen/NVPTX/f32x2-convert-i32x2.ll
index 21ca041f6220a..f89687ef339c1 100644
--- a/llvm/test/CodeGen/NVPTX/f32x2-convert-i32x2.ll
+++ b/llvm/test/CodeGen/NVPTX/f32x2-convert-i32x2.ll
@@ -193,11 +193,11 @@ define ptx_kernel void @zextend_to_v2i32(<2 x i8> %0) {
; CHECK-SM100-NEXT: st.b32 [%rd3], %rd2;
; CHECK-SM100-NEXT: mov.b64 %rd4, 0;
; CHECK-SM100-NEXT: st.b32 [%rd4], %rd2;
-; CHECK-SM100-NEXT: mov.b64 %rd5, 8;
-; CHECK-SM100-NEXT: st.b32 [%rd5], %rd1;
-; CHECK-SM100-NEXT: shr.u64 %rd6, %rd1, 32;
-; CHECK-SM100-NEXT: mov.b64 %rd7, 12;
-; CHECK-SM100-NEXT: st.b32 [%rd7], %rd6;
+; CHECK-SM100-NEXT: cvt.u64.u16 %rd5, %rs2;
+; CHECK-SM100-NEXT: mov.b64 %rd6, 12;
+; CHECK-SM100-NEXT: st.b32 [%rd6], %rd5;
+; CHECK-SM100-NEXT: mov.b64 %rd7, 8;
+; CHECK-SM100-NEXT: st.b32 [%rd7], %rd1;
; CHECK-SM100-NEXT: ret;
%2 = zext <2 x i8> %0 to <2 x i32>
%3 = shufflevector <2 x i32> zeroinitializer, <2 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
@@ -233,7 +233,7 @@ define ptx_kernel void @sextend_to_v2i32(<2 x i8> %0) {
; CHECK-SM100: {
; CHECK-SM100-NEXT: .reg .b16 %rs<3>;
; CHECK-SM100-NEXT: .reg .b32 %r<7>;
-; CHECK-SM100-NEXT: .reg .b64 %rd<8>;
+; CHECK-SM100-NEXT: .reg .b64 %rd<7>;
; CHECK-SM100-EMPTY:
; CHECK-SM100-NEXT: // %bb.0:
; CHECK-SM100-NEXT: ld.param.v2.b8 {%rs1, %rs2}, [sextend_to_v2i32_param_0];
@@ -249,11 +249,10 @@ define ptx_kernel void @sextend_to_v2i32(<2 x i8> %0) {
; CHECK-SM100-NEXT: st.b32 [%rd3], %rd2;
; CHECK-SM100-NEXT: mov.b64 %rd4, 0;
; CHECK-SM100-NEXT: st.b32 [%rd4], %rd2;
-; CHECK-SM100-NEXT: mov.b64 %rd5, 8;
-; CHECK-SM100-NEXT: st.b32 [%rd5], %rd1;
-; CHECK-SM100-NEXT: shr.u64 %rd6, %rd1, 32;
-; CHECK-SM100-NEXT: mov.b64 %rd7, 12;
-; CHECK-SM100-NEXT: st.b32 [%rd7], %rd6;
+; CHECK-SM100-NEXT: mov.b64 %rd5, 12;
+; CHECK-SM100-NEXT: st.b32 [%rd5], %r3;
+; CHECK-SM100-NEXT: mov.b64 %rd6, 8;
+; CHECK-SM100-NEXT: st.b32 [%rd6], %rd1;
; CHECK-SM100-NEXT: ret;
%2 = sext <2 x i8> %0 to <2 x i32>
%3 = shufflevector <2 x i32> zeroinitializer, <2 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
diff --git a/llvm/test/CodeGen/NVPTX/i32x2-instructions.ll b/llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
index 72f10aeb06a17..358100657231f 100644
--- a/llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
+++ b/llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
@@ -1632,7 +1632,7 @@ define void @test_sext_v2i1_to_v2i32(ptr %a, ptr %b, ptr %c) {
; CHECK-I32X2: {
; CHECK-I32X2-NEXT: .reg .pred %p<3>;
; CHECK-I32X2-NEXT: .reg .b32 %r<7>;
-; CHECK-I32X2-NEXT: .reg .b64 %rd<14>;
+; CHECK-I32X2-NEXT: .reg .b64 %rd<13>;
; CHECK-I32X2-EMPTY:
; CHECK-I32X2-NEXT: // %bb.0: // %entry
; CHECK-I32X2-NEXT: ld.param.b64 %rd3, [test_sext_v2i1_to_v2i32_param_2];
@@ -1653,9 +1653,8 @@ define void @test_sext_v2i1_to_v2i32(ptr %a, ptr %b, ptr %c) {
; CHECK-I32X2-NEXT: selp.b32 %r5, -1, 0, %p2;
; CHECK-I32X2-NEXT: selp.b32 %r6, -1, 0, %p1;
; CHECK-I32X2-NEXT: mov.b64 %rd12, {%r6, %r5};
+; CHECK-I32X2-NEXT: st.b32 [%rd3+4], %r5;
; CHECK-I32X2-NEXT: st.b32 [%rd3], %rd12;
-; CHECK-I32X2-NEXT: shr.u64 %rd13, %rd12, 32;
-; CHECK-I32X2-NEXT: st.b32 [%rd3+4], %rd13;
; CHECK-I32X2-NEXT: ret;
entry:
%t1 = load <2 x i32>, ptr %a, align 4
diff --git a/llvm/test/CodeGen/NVPTX/srl-bitcast-bv.ll b/llvm/test/CodeGen/NVPTX/srl-bitcast-bv.ll
new file mode 100644
index 0000000000000..38a2cf234fff3
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/srl-bitcast-bv.ll
@@ -0,0 +1,44 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=nvptx64-- -mcpu=sm_90 < %s | FileCheck %s
+
+; fold (srl (bitcast (build_vector e0, ..., eN)), (N-1) * eltsize) -> (zext eN)
+;
+; On NVPTX, i8 is promoted to i16 during type legalization. This means
+; BUILD_VECTOR v4i8 has i16 operands (wider than the i8 element type).
+; The fold must truncate the promoted operand to the element size before
+; zero-extending to the result type.
+
+define i32 @srl_bv_v4i8_extract_last(i8 %a, i8 %b, i8 %c, i8 %d) {
+; CHECK-LABEL: srl_bv_v4i8_extract_last(
+; CHECK: {
+; CHECK-NEXT: .reg .b32 %r<2>;
+; CHECK-EMPTY:
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: ld.param.b8 %r1, [srl_bv_v4i8_extract_last_param_3];
+; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
+; CHECK-NEXT: ret;
+ %bv0 = insertelement <4 x i8> poison, i8 %a, i32 0
+ %bv1 = insertelement <4 x i8> %bv0, i8 %b, i32 1
+ %bv2 = insertelement <4 x i8> %bv1, i8 %c, i32 2
+ %bv3 = insertelement <4 x i8> %bv2, i8 %d, i32 3
+ %bc = bitcast <4 x i8> %bv3 to i32
+ %srl = lshr i32 %bc, 24
+ ret i32 %srl
+}
+
+; v2i16 -> i32: i16 operands match element type (no promotion needed).
+define i32 @srl_bv_v2i16_extract_last(i16 %a, i16 %b) {
+; CHECK-LABEL: srl_bv_v2i16_extract_last(
+; CHECK: {
+; CHECK-NEXT: .reg .b32 %r<2>;
+; CHECK-EMPTY:
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: ld.param.b16 %r1, [srl_bv_v2i16_extract_last_param_1];
+; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
+; CHECK-NEXT: ret;
+ %bv0 = insertelement <2 x i16> poison, i16 %a, i32 0
+ %bv1 = insertelement <2 x i16> %bv0, i16 %b, i32 1
+ %bc = bitcast <2 x i16> %bv1 to i32
+ %srl = lshr i32 %bc, 16
+ ret i32 %srl
+}
>From 94c71306cb3725524f2df11f60a22049992672ec Mon Sep 17 00:00:00 2001
From: Frederick Vu <100011202+FrederickVu at users.noreply.github.com>
Date: Tue, 7 Apr 2026 20:16:43 +0000
Subject: [PATCH 2/3] Add endian check and remove unnecessary bitcast check
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 11 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll | 9044 ++++++++---------
.../CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll | 3515 ++++---
.../CodeGen/AMDGPU/move-to-valu-lshl_add.ll | 54 +-
llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll | 74 +-
5 files changed, 6332 insertions(+), 6366 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a4edbc47cd158..172771ad75c9f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11581,7 +11581,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
// fold (srl (bitcast (build_vector e0, ..., eN)), (N-1) * eltsize)
// -> (zext eN)
- if (N1C && VT.isScalarInteger()) {
+ if (N1C && VT.isScalarInteger() && DAG.getDataLayout().isLittleEndian()) {
SDValue BV = peekThroughBitcasts(N0);
if (BV.getOpcode() == ISD::BUILD_VECTOR) {
EVT BVVT = BV.getValueType();
@@ -11591,13 +11591,8 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
SDValue LastElt = BV.getOperand(NumElts - 1);
if (!LastElt.isUndef()) {
EVT IntEltVT = EVT::getIntegerVT(*DAG.getContext(), EltSizeInBits);
- EVT LastEltVT = LastElt.getValueType();
- if (LastEltVT.isFloatingPoint())
- LastElt = DAG.getBitcast(LastEltVT.changeTypeToInteger(), LastElt);
- // BUILD_VECTOR integer operands may be implicitly promoted wider
- // than the declared element type (e.g. i16 operands in a v4i8
- // BUILD_VECTOR on targets that promote i8). Truncate to the
- // element size, then zero-extend to the result type.
+ LastElt = DAG.getBitcast(LastElt.getValueType().changeTypeToInteger(),
+ LastElt);
return DAG.getZExtOrTrunc(DAG.getZExtOrTrunc(LastElt, DL, IntEltVT),
DL, VT);
}
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index 38dc4575d313a..e06731d16b64b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -152612,418 +152612,411 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4
+; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32
-; GFX9-NEXT: v_mov_b32_e32 v54, v0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
+; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; kill: killed $vgpr0
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; kill: killed $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: v_mov_b32_e32 v45, v0
; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: v_mov_b32_e32 v56, v15
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr35
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
+; GFX9-NEXT: ; kill: killed $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: v_mov_b32_e32 v57, v16
; GFX9-NEXT: ; kill: killed $vgpr0
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr16
+; GFX9-NEXT: ; implicit-def: $vgpr44
; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr51
-; GFX9-NEXT: ; implicit-def: $vgpr41
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; kill: killed $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr54
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr56
-; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; kill: killed $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr0
-; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr45
-; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr36
+; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr59
-; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr37
; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr50
-; GFX9-NEXT: ; implicit-def: $vgpr49
+; GFX9-NEXT: ; implicit-def: $vgpr38
+; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr39
; GFX9-NEXT: ; implicit-def: $vgpr52
-; GFX9-NEXT: ; implicit-def: $vgpr55
-; GFX9-NEXT: ; implicit-def: $vgpr47
-; GFX9-NEXT: ; kill: killed $vgpr34
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: ; kill: killed $vgpr33
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: ; kill: killed $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr34
+; GFX9-NEXT: ; implicit-def: $vgpr46
+; GFX9-NEXT: ; kill: killed $vgpr36
+; GFX9-NEXT: ; kill: killed $vgpr43
+; GFX9-NEXT: ; kill: killed $vgpr35
+; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr35
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr43
+; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(33)
+; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(29)
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
+; GFX9-NEXT: ; kill: killed $vgpr31
+; GFX9-NEXT: ; implicit-def: $vgpr31
; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_2
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[56:57]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[13:14]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[11:12]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[9:10]
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[7:8]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[3:4]
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; GFX9-NEXT: s_waitcnt vmcnt(45)
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[60:61]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v56
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v3
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v19
+; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v10
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[29:30]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v14
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v61
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v59, v36
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v61
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v61
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v13
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v60
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v60
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v12
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[23:24]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v11
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v10
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v10
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[21:22]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v9
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v8
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v8
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[19:20]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v6
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v4
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v4
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v2
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v2
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v58
-; GFX9-NEXT: s_waitcnt vmcnt(62)
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[57:58]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v30
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v30
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v29
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v28
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v28
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v27
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v26
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v23
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v22
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20
+; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[17:18]
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v24
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v6
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v20
-; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v18
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v17
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v17
+; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[1:2]
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; GFX9-NEXT: .LBB90_2: ; %Flow
-; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
-; GFX9-NEXT: v_mov_b32_e32 v34, v52
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5]
+; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT: s_cbranch_execz .LBB90_4
; GFX9-NEXT: ; %bb.3: ; %cmp.true
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v18
@@ -153036,75 +153029,83 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v34, v32, v33, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v32, v33, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v17
; GFX9-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v48, v31, v32, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v49, v31, v32, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v15, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v31, vcc
-; GFX9-NEXT: v_perm_b32 v32, v17, v49, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v20
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_perm_b32 v33, v48, v34, s7
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v20
-; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v33, v18, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v62, v18, v31, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v19
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v38, v18, v20, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v19
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v37, v18, v20, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v20, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v31, v17, v37, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v22
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v62, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v22
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v59, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v43, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v0, v15, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -153112,23 +153113,27 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v21
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v60, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v44, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v60, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v24
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v0, v43, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v24
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v16, v0, v59, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v0, v44, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -153146,34 +153151,35 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v23
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v20, v15, v0, s7
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v19, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v26
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_mov_b32_e32 v36, v20
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_mov_b32_e32 v35, v19
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v26
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v25
+; GFX9-NEXT: v_mov_b32_e32 v51, v16
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v50, v15
; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
@@ -153181,217 +153187,205 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v25
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v15, v17, v0, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v28
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v26, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v27
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v28, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v27
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v25, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v25, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v30
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v27, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v42, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v54, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v29
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v24, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v39, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_perm_b32 v16, v28, v26, s7
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v24, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v58
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v61
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; GFX9-NEXT: v_cndmask_b32_e32 v55, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v58
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v61
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: s_waitcnt vmcnt(48)
-; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v57
+; GFX9-NEXT: s_waitcnt vmcnt(57)
+; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v60
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v58, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v53, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v57
+; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v60
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; GFX9-NEXT: v_cndmask_b32_e32 v23, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
-; GFX9-NEXT: v_perm_b32 v16, v30, v27, s7
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; GFX9-NEXT: v_perm_b32 v15, v17, v23, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v2
; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v52, v18, v19, vcc
; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6
; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v57, v18, v19, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v21, v17, v18, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v27, v17, v18, vcc
; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6
; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v22, v17, v18, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v28, v17, v18, vcc
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_perm_b32 v16, v58, v29, s7
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v17, vcc
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v61, v1, v22, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: v_cndmask_b32_e32 v26, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v4
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v17, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v25, v2, v17, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v23, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v3
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v4, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v24, v2, v4, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_perm_b32 v39, v1, v19, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v22, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v6
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v5
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; GFX9-NEXT: v_perm_b32 v41, v1, v4, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v8
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
@@ -153405,55 +153399,50 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v7, vcc
-; GFX9-NEXT: v_perm_b32 v43, v1, v3, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v10
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v10
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v2, v7, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v9
-; GFX9-NEXT: v_perm_b32 v32, v38, v33, s7
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_mov_b32_e32 v51, v32
-; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v10, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v3, vcc
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
-; GFX9-NEXT: v_mov_b32_e32 v50, v31
; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
+; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v9
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v31, vcc
-; GFX9-NEXT: v_add3_u32 v9, v9, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v9, v31, vcc
-; GFX9-NEXT: v_perm_b32 v45, v1, v2, s7
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v12
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v9, v1, 16, 1
-; GFX9-NEXT: v_add3_u32 v9, v9, v1, s6
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v2, v9, vcc
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v12
; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; GFX9-NEXT: v_bfe_u32 v12, v1, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v9, v31, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v31, vcc
; GFX9-NEXT: v_add3_u32 v12, v12, v1, s6
; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
@@ -153466,649 +153455,708 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v31, v32, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v31, v32, vcc
; GFX9-NEXT: v_bfe_u32 v31, v11, 16, 1
; GFX9-NEXT: v_add3_u32 v31, v31, v11, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc
-; GFX9-NEXT: v_perm_b32 v55, v11, v1, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v14
-; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX9-NEXT: v_bfe_u32 v31, v11, 16, 1
+; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v14
+; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX9-NEXT: v_add3_u32 v31, v31, v11, s6
-; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
+; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc
+; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6
+; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v31
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v14, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v48, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v14, s6
; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v14
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
; GFX9-NEXT: v_cndmask_b32_e32 v14, v31, v32, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v13
+; GFX9-NEXT: v_mov_b32_e32 v34, v16
; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX9-NEXT: v_bfe_u32 v52, v31, 16, 1
+; GFX9-NEXT: v_mov_b32_e32 v33, v15
+; GFX9-NEXT: v_perm_b32 v16, v54, v42, s7
+; GFX9-NEXT: v_perm_b32 v15, v55, v39, s7
+; GFX9-NEXT: v_bfe_u32 v48, v31, 16, 1
; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: v_add3_u32 v52, v52, v31, s6
-; GFX9-NEXT: v_or_b32_e32 v53, 0x400000, v31
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; GFX9-NEXT: v_add3_u32 v48, v48, v31, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v31
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31
; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_cndmask_b32_e32 v0, v52, v53, vcc
+; GFX9-NEXT: v_perm_b32 v16, v53, v0, s7
+; GFX9-NEXT: v_mov_b32_e32 v61, v0
+; GFX9-NEXT: v_cndmask_b32_e32 v0, v48, v49, vcc
; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v52, 0x400000, v13
+; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v13
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v31, v52, vcc
+; GFX9-NEXT: v_perm_b32 v32, v14, v1, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v31, v48, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; GFX9-NEXT: v_perm_b32 v31, v13, v0, s7
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v16
-; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: v_bfe_u32 v52, v13, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX9-NEXT: v_add3_u32 v52, v52, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v53, 0x400000, v13
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v52, v53, vcc
-; GFX9-NEXT: v_bfe_u32 v52, v16, 16, 1
-; GFX9-NEXT: v_add3_u32 v52, v52, v16, s6
-; GFX9-NEXT: v_or_b32_e32 v53, 0x400000, v16
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v16, v52, v53, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v52, 16, v15
-; GFX9-NEXT: v_add_f32_e32 v52, 0x40c00000, v52
-; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX9-NEXT: v_bfe_u32 v47, v52, 16, 1
-; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX9-NEXT: v_add3_u32 v47, v47, v52, s6
-; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v52
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v52, v52
-; GFX9-NEXT: v_bfe_u32 v52, v15, 16, 1
-; GFX9-NEXT: v_cndmask_b32_e32 v47, v47, v63, vcc
-; GFX9-NEXT: v_add3_u32 v52, v52, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v15
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v52, v63, vcc
-; GFX9-NEXT: v_perm_b32 v53, v16, v13, s7
-; GFX9-NEXT: v_perm_b32 v52, v15, v47, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v19
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v22
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v27
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v25
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v47
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v52, v30, s7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v23
-; GFX9-NEXT: v_perm_b32 v62, v21, v57, s7
-; GFX9-NEXT: v_perm_b32 v56, v12, v9, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v57
-; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v40, v18, v20, s7
-; GFX9-NEXT: v_perm_b32 v42, v6, v17, s7
-; GFX9-NEXT: v_perm_b32 v46, v10, v7, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v17
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49
-; GFX9-NEXT: v_perm_b32 v44, v8, v5, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; GFX9-NEXT: v_perm_b32 v32, v14, v11, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v59
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v60
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[52:53]
-; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(11)
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v15, v26, v28, s7
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v28
+; GFX9-NEXT: v_perm_b32 v16, v27, v29, s7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v16, v23, v25, s7
+; GFX9-NEXT: v_perm_b32 v15, v22, v24, s7
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v15, v56
+; GFX9-NEXT: v_mov_b32_e32 v16, v57
+; GFX9-NEXT: v_perm_b32 v56, v9, v4, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v25
+; GFX9-NEXT: v_perm_b32 v59, v12, v3, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v24
+; GFX9-NEXT: v_perm_b32 v38, v19, v21, s7
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v16
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v16, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v63, v49, v63, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v16, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v16
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
+; GFX9-NEXT: v_cndmask_b32_e32 v16, v48, v49, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v15
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_bfe_u32 v47, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_add3_u32 v47, v47, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v60, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v15, 16, 1
+; GFX9-NEXT: v_perm_b32 v36, v8, v17, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v46, v47, v60, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v15, s6
+; GFX9-NEXT: v_or_b32_e32 v47, 0x400000, v15
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
+; GFX9-NEXT: v_perm_b32 v37, v18, v20, s7
+; GFX9-NEXT: v_perm_b32 v35, v7, v6, s7
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v48, v47, vcc
+; GFX9-NEXT: v_mov_b32_e32 v49, v36
+; GFX9-NEXT: v_mov_b32_e32 v48, v35
+; GFX9-NEXT: v_mov_b32_e32 v35, v37
+; GFX9-NEXT: v_mov_b32_e32 v36, v38
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; GFX9-NEXT: v_perm_b32 v41, v16, v63, s7
+; GFX9-NEXT: v_perm_b32 v40, v15, v46, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v46
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[40:41]
+; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v42
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v43
+; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v63
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32]
+; GFX9-NEXT: v_perm_b32 v58, v11, v2, s7
+; GFX9-NEXT: v_perm_b32 v57, v10, v5, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v29
+; GFX9-NEXT: s_waitcnt vmcnt(23)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v62
+; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v61
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v38
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v38
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v37
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[31:32]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[55:56]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[45:46]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[43:44]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[37:38]
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[41:42]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[57:58]
-; GFX9-NEXT: s_waitcnt vmcnt(12)
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[58:59]
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34]
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34]
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[50:51]
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33
+; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(7)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v0
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[62:63]
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v62
+; GFX9-NEXT: s_waitcnt vmcnt(4)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v48
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[39:40]
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[61:62]
-; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[56:57]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[37:38]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[33:34]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[54:55]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[47:48]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[42:43]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[35:36]
-; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[50:51]
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v53
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v52
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v55
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
+; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; GFX9-NEXT: s_waitcnt vmcnt(18)
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v40
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v56
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v55
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v45
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v44
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v44
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v42
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v40
-; GFX9-NEXT: v_mov_b32_e32 v45, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v49
+; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v49
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v62
-; GFX9-NEXT: v_mov_b32_e32 v46, v58
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v46
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v45
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37
-; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v61
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v61
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v34
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v34
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v33
-; GFX9-NEXT: v_mov_b32_e32 v33, v47
-; GFX9-NEXT: v_mov_b32_e32 v34, v48
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; GFX9-NEXT: s_waitcnt vmcnt(39)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[35:36]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[50:51]
-; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v62
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v34
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v39
-; GFX9-NEXT: v_mov_b32_e32 v58, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX9-NEXT: v_mov_b32_e32 v57, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35
+; GFX9-NEXT: v_mov_b32_e32 v35, v52
+; GFX9-NEXT: v_mov_b32_e32 v36, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(15)
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37
-; GFX9-NEXT: s_waitcnt vmcnt(14)
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v38
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37
-; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v35
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v49
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[49:50]
-; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v35
+; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[15:16]
+; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[52:53]
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v56
+; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; GFX9-NEXT: v_mov_b32_e32 v53, v44
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v63
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v42
+; GFX9-NEXT: s_waitcnt vmcnt(9)
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v36
+; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v62
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v62
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v61
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v61
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v50
-; GFX9-NEXT: v_mov_b32_e32 v50, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v49
-; GFX9-NEXT: v_mov_b32_e32 v49, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v39
+; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v35, v50
+; GFX9-NEXT: v_mov_b32_e32 v36, v51
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v38
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v63
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v35
+; GFX9-NEXT: v_mov_b32_e32 v36, v16
+; GFX9-NEXT: v_mov_b32_e32 v35, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34
+; GFX9-NEXT: v_mov_b32_e32 v16, v46
+; GFX9-NEXT: v_mov_b32_e32 v46, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v35
; GFX9-NEXT: .LBB90_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v7, v7, v31, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v3, v3, v41, s4
-; GFX9-NEXT: v_perm_b32 v4, v4, v40, s4
-; GFX9-NEXT: v_perm_b32 v5, v5, v32, s4
-; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v2, v2, v51, s4
-; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v1, v44, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v43, s4
-; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v17, v17, v39, s4
-; GFX9-NEXT: v_perm_b32 v0, v18, v0, s4
-; GFX9-NEXT: s_waitcnt vmcnt(8)
-; GFX9-NEXT: v_perm_b32 v9, v9, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(8)
+; GFX9-NEXT: v_perm_b32 v1, v1, v55, s4
+; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v3, v3, v54, s4
+; GFX9-NEXT: v_perm_b32 v0, v5, v0, s4
+; GFX9-NEXT: v_perm_b32 v5, v6, v49, s4
; GFX9-NEXT: v_perm_b32 v8, v8, v31, s4
-; GFX9-NEXT: s_waitcnt vmcnt(6)
-; GFX9-NEXT: v_perm_b32 v32, v32, v40, s4
-; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v51, v53, v51, s4
-; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(7)
-; GFX9-NEXT: v_perm_b32 v42, v42, v61, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v42, 16, v1
+; GFX9-NEXT: v_perm_b32 v10, v10, v47, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v32, s4
+; GFX9-NEXT: v_perm_b32 v9, v9, v16, s4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v18, v18, v37, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v40, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4
+; GFX9-NEXT: v_perm_b32 v17, v17, v42, s4
; GFX9-NEXT: s_waitcnt vmcnt(5)
-; GFX9-NEXT: v_perm_b32 v10, v10, v33, s4
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v31, v31, v40, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v53, v56, v52, s4
+; GFX9-NEXT: v_perm_b32 v55, v55, v35, s4
+; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(5)
+; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4
+; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v54, v54, v35, s4
+; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshl_or_b32 v0, v54, 16, v0
+; GFX9-NEXT: s_waitcnt vmcnt(4)
+; GFX9-NEXT: v_perm_b32 v49, v49, v15, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v52, v33, v40, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v11, v11, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v40, v33, v40, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v13, v13, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v13, v13, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v14, v14, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v14, v14, v35, s4
+; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v41, v33, v43, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(3)
-; GFX9-NEXT: v_perm_b32 v15, v15, v33, s4
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v43, v63, v43, s4
-; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v16, v16, v33, s4
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v47, v47, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v15, v56, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v43, v43, v50, s4
+; GFX9-NEXT: v_lshl_or_b32 v1, v43, 16, v1
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v16, v57, v35, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v56, v35, v50, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v37, v35, v36, s4
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(4)
-; GFX9-NEXT: v_perm_b32 v18, v45, v62, s4
+; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v3
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:4
+; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v3
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v5
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:12
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:16
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_lshl_or_b32 v1, v32, 16, v7
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v5
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:20
+; GFX9-NEXT: v_lshl_or_b32 v0, v6, 16, v7
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:24
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_lshl_or_b32 v1, v31, 16, v9
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v8
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:28
+; GFX9-NEXT: v_lshl_or_b32 v0, v31, 16, v9
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:32
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v0, v0, v59, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v10
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:36
+; GFX9-NEXT: v_lshl_or_b32 v0, v32, 16, v11
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v11
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v12
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:44
+; GFX9-NEXT: v_lshl_or_b32 v0, v49, 16, v13
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_lshl_or_b32 v1, v40, 16, v13
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v14
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_lshl_or_b32 v0, v47, 16, v15
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:56
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_lshl_or_b32 v1, v41, 16, v15
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:60
+; GFX9-NEXT: v_lshl_or_b32 v0, v56, 16, v17
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:64
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:60
-; GFX9-NEXT: v_lshl_or_b32 v1, v43, 16, v17
-; GFX9-NEXT: buffer_store_dword v1, v54, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v0, v48, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v18
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:68
+; GFX9-NEXT: v_perm_b32 v0, v19, v38, s4
+; GFX9-NEXT: v_lshl_or_b32 v0, v37, 16, v0
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:72
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v20, v63, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v41, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:68
-; GFX9-NEXT: v_perm_b32 v0, v19, v46, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v18, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v20, v37, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v36, s4
-; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v21, v59, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:76
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v21, v62, s4
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v38, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:80
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v22, v60, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:80
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v22, v44, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v48, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v39, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:84
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v23, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:84
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v23, v52, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:88
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v24, v50, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:88
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v0, v24, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v49, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v25, v34, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:92
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v55, v1, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v25, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:96
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v0, v26, v47, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:96
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v26, v34, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:100
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v0, v27, v46, s4
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:104
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v28, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:108
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:112
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_perm_b32 v0, v30, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v0, v57, v0, s4
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:116
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
+; GFX9-NEXT: v_perm_b32 v0, v60, v0, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:120
+; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(2)
-; GFX9-NEXT: v_perm_b32 v0, v58, v0, s4
+; GFX9-NEXT: v_perm_b32 v0, v61, v0, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
-; GFX9-NEXT: buffer_store_dword v0, v54, s[0:3], 0 offen offset:124
+; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:124
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -154133,8 +154181,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x2
; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:8
-; GFX11-TRUE16-NEXT: scratch_load_b32 v81, off, s32 offset:4
-; GFX11-TRUE16-NEXT: scratch_load_b32 v80, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v71, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v70, off, s32
; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:236
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:232
@@ -154217,9 +154265,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr109_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr70_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr95_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr94_hi16
@@ -154293,7 +154341,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_hi16
@@ -154346,11 +154394,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 8, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v141, 8, v1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v81
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v71
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v71
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v80
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v30
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v30
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v29
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v28
@@ -154374,7 +154422,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[15:16]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[11:12]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[80:81]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[70:71]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[19:20]
@@ -154392,9 +154440,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.h, v6.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v6.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v62.h, v7.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v7.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v45.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.h, v8.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v7.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v44.h, v8.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v8.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v94.h, v9.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v9.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v63.h, v10.l
@@ -154439,10 +154487,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v29.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v165.h, v30.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v30.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v80.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v81.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v70.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v71.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v71.h
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5
@@ -154458,7 +154506,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71
; GFX11-TRUE16-NEXT: .LBB90_2: ; %Flow
; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_4
@@ -154676,14 +154724,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v81
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v71
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v51
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v51
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v165, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v81
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v71
; GFX11-TRUE16-NEXT: v_dual_add_f32 v22, 0x40c00000, v22 :: v_dual_cndmask_b32 v53, v17, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
@@ -154692,14 +154740,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v80
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v70
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v160.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v165.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v166, v17, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v80
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v70
; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_cndmask_b32 v52, v19, v24
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
@@ -154708,9 +154756,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v21
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v160.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v53
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v53
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v37
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v19, v23, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
@@ -154725,9 +154773,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v167.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v37
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v2
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v176, v17, v22, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
@@ -154840,13 +154887,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v10
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v68.l, v182.h
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_cndmask_b32 v45, v3, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v44, v3, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v7
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v71, v1, v8
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v81, v1, v8
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
@@ -154856,8 +154903,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v166.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.l, v45.h
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v70, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v44.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v80, v1, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v9
@@ -154870,7 +154917,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12
; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.l, v62.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v62.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v63, v1, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
@@ -154888,13 +154935,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v63.h
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.l, v176.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[52:53]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[68:69]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v84, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[52:53]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[48:49]
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v94, v2, v3, vcc_lo
@@ -154919,7 +154966,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v105.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[70:71]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[80:81]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v114, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
@@ -154929,7 +154976,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[33:34]
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v178.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v127, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
@@ -154959,7 +155006,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v66.l, v180.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v178.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v127.h
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v142, v4, v6, vcc_lo
@@ -154976,23 +155023,23 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v127.h
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[99:100], 24, v[128:129]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[50:51]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v152, v7, v11, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[50:51]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[133:134], 24, v[66:67]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[101:102], 24, v[37:38]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[114:115]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v145, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v143.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[68:69]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[114:115]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[35:36]
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v144, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v152.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[35:36]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[33:34]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[131:132], 24, v[31:32]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v145
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v145
@@ -155007,9 +155054,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 24, v85
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v85
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v84
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v71
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v71
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v70
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v80
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v69
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 8, v68
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v136, 8, v66
@@ -155042,15 +155089,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v122, 0xc0c0004
; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v181.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v69.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v71.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v81.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v4, 16, v3
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v6, 16, v5
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v8, 16, v7
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v9, v111, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v10, v109, 0xc0c0004
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v62.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v70.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v45.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v44.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v84.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v7, 16, v6
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v8, v104, 0xc0c0004
@@ -155171,7 +155218,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v57, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v45, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v43, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004
@@ -155281,98 +155328,98 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:20
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:16
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:12
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr102
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr112
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr99
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr100
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
@@ -155390,98 +155437,98 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 24, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 8, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 24, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[21:22]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v32
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v31
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v30
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v29
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v25
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v25
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v23
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v21
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 24, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[19:20]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[17:18]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18]
; GFX11-FAKE16-NEXT: .LBB90_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB90_4
@@ -155500,638 +155547,639 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v35, 16, 1
; GFX11-FAKE16-NEXT: v_add3_u32 v17, v17, v33, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v34
; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v34, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v17, v17, v36 :: v_dual_add_f32 v18, 0x40c00000, v18
; GFX11-FAKE16-NEXT: v_add3_u32 v36, v48, v35, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v18, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v18
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v18, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v34
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v58, v37, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v37, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v68, v58, v17, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
+; GFX11-FAKE16-NEXT: v_perm_b32 v67, v18, v17, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 24, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v68
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v36, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v72, v36, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v20
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
-; GFX11-FAKE16-NEXT: v_perm_b32 v67, v34, v33, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v36
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v19
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v37
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v34, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v34
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 16, v67
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v36, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v67
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v18, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v35, v37, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v38, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v22
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v36 :: v_dual_add_f32 v39, 0x40c00000, v19
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v34, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v33, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v67
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v36, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v39, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v35, v38, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v66
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v49, v36, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v38, v34, v39, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v39
; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v20
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_add3_u32 v34, v34, v20, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v39, v36, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v34, v19, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v36
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v20, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v37, v48, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-FAKE16-NEXT: v_perm_b32 v70, v19, v18, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v19
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v20, v34, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v37
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v21
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v71, v20, v19, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v35, v37, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19
+; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v36, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v71
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v38, v49, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v21
; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v35, v39, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v37, 0x40c00000, v37
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v36, v20, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v69, v35, v34, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v37, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v22, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v36, v38, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add3_u32 v22, v48, v37, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v24
-; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v39, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v39
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v35, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v37
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v36, v39, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v70
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v35, v22, v35 :: v_dual_add_f32 v22, 0x40c00000, v38
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v23
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v81, v21, v20, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v36, v48, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v36, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v38, 0x40c00000, v38 :: v_dual_add_f32 v49, 0x40c00000, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v35
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v37, v48 :: v_dual_add_f32 v22, 0x40c00000, v22
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v38, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v49, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v71
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v22
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v22, 0x7fff
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v69
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v69
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v37, v39, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v48, 16, 1
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v39, 16, v26
-; GFX11-FAKE16-NEXT: v_perm_b32 v80, v36, v35, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v38, 16, 1
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
-; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v48, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v37, v51, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v48, v36, v49, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v22, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v49
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v39, v50, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38
; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[69:70]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v81
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 16, v80
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
+; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22
; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v37, v39, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
+; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v38, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v38
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v48, v51, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v23
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v24, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v48, 0x40c00000, v48 :: v_dual_add_f32 v51, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v39, v50, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add3_u32 v36, v36, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_add3_u32 v24, v49, v38, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v48, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v51, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v49, v52, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v26
+; GFX11-FAKE16-NEXT: v_add3_u32 v39, v53, v48, 0x7fff
; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v48
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v36, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, 0x400000, v38
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v23
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v24, v36, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v39
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v39, 16, v25
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v52
+; GFX11-FAKE16-NEXT: v_add3_u32 v50, v38, v51, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v51
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v39, v49, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v48
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v26
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v50, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v25
; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
-; GFX11-FAKE16-NEXT: v_perm_b32 v83, v23, v22, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v37, v49, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v39
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v82, v37, v36, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v26, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v25
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v39, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v38, v48, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v26, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v48, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v26, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v50, 0x40c00000, v50 :: v_dual_add_f32 v53, 0x40c00000, v25
+; GFX11-FAKE16-NEXT: v_perm_b32 v80, v37, v36, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v49, v52, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v26, v50, v39, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v28
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v49
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v37, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v39
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
-; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v49, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v50, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v53, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v37
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v51, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v28
+; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v50, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v50
; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v83
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v37, v26, v37 :: v_dual_add_f32 v26, 0x40c00000, v48
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v54
+; GFX11-FAKE16-NEXT: v_add3_u32 v52, v48, v53, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v53
; GFX11-FAKE16-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v27
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v49, v51, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
+; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v50, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v50
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v28, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v28
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v52, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27
; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v26, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v38, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v26
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v26, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v84, v38, v37, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v28, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v48, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v39, v49, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v28, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v50, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v28, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v52, 0x40c00000, v52 :: v_dual_add_f32 v55, 0x40c00000, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v83, v24, v23, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v51, v54, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v50, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v28, v51, v48, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v49, 16, v30
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v50
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v38, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v48
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v50, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v55, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v53, v64, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v30
+; GFX11-FAKE16-NEXT: v_add3_u32 v51, v65, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v36
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v27
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v28, v38, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v28, 0x40c00000, v49
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v30, 0x40c00000, v30 :: v_dual_lshlrev_b32 v49, 16, v29
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v54, v50, v55, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v55
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v51, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
+; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v54, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29
; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v28, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v39, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v28
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v28, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v86, v39, v38, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v30, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v48, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v30, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v54, 0x40c00000, v54 :: v_dual_add_f32 v65, 0x40c00000, v29
+; GFX11-FAKE16-NEXT: v_perm_b32 v85, v26, v25, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v53, v64, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v51, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v52, v49, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v54, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v65, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v55, v68, vcc_lo
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v32
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v51
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v39, v29, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v49
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
-; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v51, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v32
+; GFX11-FAKE16-NEXT: v_add3_u32 v53, v69, v54, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v54
; GFX11-FAKE16-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
-; GFX11-FAKE16-NEXT: v_perm_b32 v85, v25, v24, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v37
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v39, v30, v39 :: v_dual_add_f32 v30, 0x40c00000, v50
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v68
+; GFX11-FAKE16-NEXT: v_add3_u32 v64, v52, v65, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v65
; GFX11-FAKE16-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v53, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
+; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v54, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v54
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v32, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, 0x400000, v32
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v31
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v53, v64, v69 :: v_dual_lshlrev_b32 v64, 16, v31
; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff0000, v31
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v30, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v48, v52, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v30, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v96, v48, v39, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v32, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v31
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v32
-; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v50, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v49, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v32, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v54, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v32, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v64, 0x40c00000, v64 :: v_dual_add_f32 v69, 0x40c00000, v31
+; GFX11-FAKE16-NEXT: v_perm_b32 v82, v39, v38, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v55, v68, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v32, v53, v50, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v51, 16, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v48, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v50
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v52, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v99, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v69, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v53
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v65, v98, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v98, 16, v2
+; GFX11-FAKE16-NEXT: v_add3_u32 v55, v99, v64, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v64
; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v87, v27, v26, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v31
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v32, v48, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v32, 0x40c00000, v51
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v51, 16, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v64, 0x40c00000, v98
+; GFX11-FAKE16-NEXT: v_add3_u32 v68, v54, v69, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, 0x400000, v69
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v54, v55, v65, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69
+; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, 0x400000, v64
+; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v102, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v55, v68, v99 :: v_dual_lshlrev_b32 v68, 16, v1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v32, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v49, v53, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v32
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v51
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v50, v32, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v98, v49, v48, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v2, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v53, 0x40c00000, v1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v2
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v51, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v50, v52, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v2, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v64, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v2, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v68, 0x40c00000, v68 :: v_dual_add_f32 v101, 0x40c00000, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v49, v48, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v65, v100, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v53, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v51
-; GFX11-FAKE16-NEXT: v_perm_b32 v97, v29, v28, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v38
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v49, v54, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v51, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v4
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v32, v53, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v53
+; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v68, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v101, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v48
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v38
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v69, v102, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v4
+; GFX11-FAKE16-NEXT: v_add3_u32 v65, v103, v68, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v68
; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v29
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v49, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v54
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v68, 0x40c00000, v102
+; GFX11-FAKE16-NEXT: v_add3_u32 v100, v64, v101, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v101
; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v97
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v49, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v52, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v65, v69, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v101, v101
+; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v68, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v3
; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v49
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v49, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v50, v32, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v4, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v52
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v50, v4, 0x7fff
-; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v51, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v68
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v100, v103, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v68, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v102, 0x40c00000, v102
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v113, 0x40c00000, v3
+; GFX11-FAKE16-NEXT: v_add3_u32 v103, v103, v4, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v102, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v69, v112, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v3, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v100
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v100
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v50, v54, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v50, v55, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v6
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v3, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_bfe_u32 v68, v113, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v112, 16, v6
+; GFX11-FAKE16-NEXT: v_add3_u32 v69, v115, v102, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v54
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v50, v53, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_lshlrev_b32 v53, 16, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v103, v114, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v102
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v102, v102
+; GFX11-FAKE16-NEXT: v_add3_u32 v68, v68, v113, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v113
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v112, 0x40c00000, v112
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v69, v69, v103
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v113, v113
+; GFX11-FAKE16-NEXT: v_perm_b32 v87, v28, v27, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v113, v112, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v112
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v68, v68, v114, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v5
; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v51, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v52, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v53, 0x40c00000, v53
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v3, v50, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v53, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v51, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v113, v113, v112, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v112, v112
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v6, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v114, 0x40c00000, v114 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v135, v113, v116, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v6, v64, v53, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v53
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v5, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v55, 16, v8
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53
+; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v114, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v5, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v99, v31, v30, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v113, v3, v51, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v48
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v53, v6, v54 :: v_dual_add_f32 v6, 0x40c00000, v55
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v115, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v113, v118, v114, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v114
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v114, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_add3_u32 v112, v112, v5, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v5
; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v144, v113, v115, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v114, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v7
; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v52, v64, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v54
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v114
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v112, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v114, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114
; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v53, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v54, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302
-; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v52, v55, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v8, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v133, v115, v118, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v8, v65, v54, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v54
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v5, v64 :: v_dual_lshlrev_b32 v64, 16, v10
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v115, v128, v116, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v54, v8, v55, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v64
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v117, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v118
+; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v134, v115, v117, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v10, 0x40c00000, v10 :: v_dual_lshlrev_b32 v55, 16, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v9
; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v52, v65, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v55, 0x40c00000, v55
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v114, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v118
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-FAKE16-NEXT: v_perm_b32 v179, v7, v54, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v66, v55, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v49, 0x7060302
-; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v52, v64, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v10, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v118, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v131, v117, v128, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v10, v66, v55, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v55
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v65, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v118, 0x7fff
; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v55, v10, v64 :: v_dual_add_f32 v10, 0x40c00000, v65
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v119, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v118
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v9
; GFX11-FAKE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v28
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v26
-; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v52, v66 :: v_dual_lshlrev_b32 v52, 16, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v102, v68, v69, 0x7060302
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v132, v117, v119 :: v_dual_add_f32 v117, 0x40c00000, v128
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v6, v135, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v144, 0x7060302
+; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v117, 16, 1
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v116, v129 :: v_dual_lshlrev_b32 v116, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v117
; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_perm_b32 v176, v9, v55, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v52
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v64, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v12, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v9, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v11, 0x40c00000, v11 :: v_dual_cndmask_b32 v10, v52, v64
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116
+; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v12, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v145, v118, v128, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v116, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v52, v71, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v177, v7, v8, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v24
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v65, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v65, 16, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v66, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v11, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v58, v10, v131, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v119, v129 :: v_dual_lshlrev_b32 v119, 16, v14
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v52, v64 :: v_dual_add_f32 v52, 0x40c00000, v65
-; GFX11-FAKE16-NEXT: v_add3_u32 v64, v66, v11, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v66, 16, v13
+; GFX11-FAKE16-NEXT: v_perm_b32 v57, v9, v132, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_perm_b32 v182, v12, v145, 0x7060302
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v130, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v128, v11, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v119, 16, v13
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v52, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v180, v5, v6, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v11, v64, v65 :: v_dual_add_f32 v64, 0x40c00000, v66
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v71, v52, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v52
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
-; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v64, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v97, v30, v29, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v119
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v128, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v117, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v64
-; GFX11-FAKE16-NEXT: v_perm_b32 v162, v11, v9, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v65, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v65, v71, v14, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v66, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add3_u32 v71, v114, v64, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v128, v14, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v119, v118, v119, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add3_u32 v128, v129, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v129, 16, v16
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v13, 16, 1
; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v65, v66, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v65, 0x40c00000, v114
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64
-; GFX11-FAKE16-NEXT: v_add3_u32 v66, v116, v13, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v181, v11, v130, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v96, v53, v52, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v116, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v129
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v117, v147, v13, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v13
; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX11-FAKE16-NEXT: v_perm_b32 v150, v14, v52, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v65, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v71, v115, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v71, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v115, 16, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v116, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v128, v128, v146, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v146, 16, v15
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v163, v12, v10, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v49
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v66, v71, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v66, 0x40c00000, v115
-; GFX11-FAKE16-NEXT: v_add3_u32 v71, v114, v65, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v65
-; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v16, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v179, v14, v119, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v117, v118, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v146
+; GFX11-FAKE16-NEXT: v_add3_u32 v118, v129, v116, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v116
+; GFX11-FAKE16-NEXT: v_bfe_u32 v146, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116
; GFX11-FAKE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v66, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v66
-; GFX11-FAKE16-NEXT: v_perm_b32 v149, v13, v64, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v71, v114, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v114, v115, v16, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v117, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v148, 0x400000, v117
+; GFX11-FAKE16-NEXT: v_perm_b32 v178, v13, v128, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v118, v118, v129, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v129, v146, v16, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v16
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v71, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v66, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v64
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v114, v115, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v66, v66
-; GFX11-FAKE16-NEXT: v_add3_u32 v71, v71, v15, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v52
-; GFX11-FAKE16-NEXT: v_perm_b32 v135, v16, v65, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v66, v116, v117, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v147, v147, v117, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v149, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_perm_b32 v100, v65, v64, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v129, v146, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117
+; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v15, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v8, v133, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v114, v7, v134, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v164, v16, v118, 0x7060302
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v129, v147, v148, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v53
+; GFX11-FAKE16-NEXT: v_perm_b32 v86, v51, v50, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v99, v32, v31, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v98, v55, v54, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[112:113]
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v116, v149, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v52
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[102:103]
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v71, v118, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v65
+; GFX11-FAKE16-NEXT: v_perm_b32 v163, v15, v129, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v118
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v129
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[163:164]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[178:179]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[181:182]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[57:58]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v119
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v128
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v145
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v130
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v131
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v132
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v133
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v134
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v135
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v144
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v68
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[114:115]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[100:101]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v134, v15, v66, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v66
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v54
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[134:135]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[149:150]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[162:163]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[176:177]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[179:180]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[96:97]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[84:85]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[80:81]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v55
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[80:81]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v39
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[98:99]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[86:87]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[82:83]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[67:68]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 24, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 8, v135
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 8, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v150
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v150
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v149
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v149
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 24, v163
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v163
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 8, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v177
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v177
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v176
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v176
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v113
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[70:71]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[66:67]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v164
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 8, v164
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v163
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 24, v179
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v179
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v178
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v58
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v58
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v57
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v115
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v114
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v113
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v113
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 16, v112
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v112
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v103
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v103
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v103
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v102
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v102
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v101
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v101
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v100
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v99
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v99
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v98
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v98
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v97
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v97
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v96
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v96
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v87
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v87
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v87
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v86
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v85
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v84
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v82
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v82
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v80
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v58
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v72
; GFX11-FAKE16-NEXT: .LBB90_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v43, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v41, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v129, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v150, v64, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v51, v148, v58, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v183, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v146, v52, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1
; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v103, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v119, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v179, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v177, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v144, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v114, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v133, v37, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3
; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v112, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v48, v181, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v135, v48, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v113, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v118, v180, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v176, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v117, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v51, v134, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v52, v132, v44, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v165, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v164, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v163, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v162, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v160, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v151, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v150, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v115, v149, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v131, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v130, v182, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v128, v178, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8
@@ -156142,62 +156190,62 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v147, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v146, v34, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v145, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v114, v135, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v134, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v133, v33, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v132, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v71, v131, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v119, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v166, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v118, v164, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v163, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v117, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v161, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v116, v160, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v78, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v77, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v67, v65, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v76, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v68, v75, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v74, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v73, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v72, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v178, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v77, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v56, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v76, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v47, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v75, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v45, v74, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v80, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v62, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v43, v68, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v81, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v166, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v42, v73, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18
; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v82, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v60, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v183, v54, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v161, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v180, v63, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v84, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v57, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v177, v53, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v85, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v148, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v176, v62, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v23, v27, v86, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v47, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v165, v50, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v15
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v18, 16, v17
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v20, 16, v19
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v22, 16, v21
; GFX11-FAKE16-NEXT: v_perm_b32 v20, v28, v87, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v144, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v162, v61, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23
; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v96, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v45, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v151, v49, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v97, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v25, v130, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v149, v101, 0xc0c0004
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v98, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v101, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v147, v38, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v99, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v128, v100, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v145, v100, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v23, 16, v22
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v25, 16, v24
@@ -160129,16 +160177,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_readfirstlane_b32 s6, v17
; GFX9-NEXT: v_readfirstlane_b32 s9, v16
; GFX9-NEXT: v_readfirstlane_b32 s8, v15
-; GFX9-NEXT: v_readfirstlane_b32 s11, v14
-; GFX9-NEXT: v_readfirstlane_b32 s10, v13
-; GFX9-NEXT: v_readfirstlane_b32 s13, v12
-; GFX9-NEXT: v_readfirstlane_b32 s12, v11
+; GFX9-NEXT: v_readfirstlane_b32 s13, v14
+; GFX9-NEXT: v_readfirstlane_b32 s12, v13
+; GFX9-NEXT: v_readfirstlane_b32 s11, v12
+; GFX9-NEXT: v_readfirstlane_b32 s10, v11
; GFX9-NEXT: v_readfirstlane_b32 s15, v10
; GFX9-NEXT: v_readfirstlane_b32 s14, v9
-; GFX9-NEXT: v_readfirstlane_b32 s41, v8
-; GFX9-NEXT: v_readfirstlane_b32 s40, v7
-; GFX9-NEXT: v_readfirstlane_b32 s43, v6
-; GFX9-NEXT: v_readfirstlane_b32 s42, v5
+; GFX9-NEXT: v_readfirstlane_b32 s43, v8
+; GFX9-NEXT: v_readfirstlane_b32 s42, v7
+; GFX9-NEXT: v_readfirstlane_b32 s41, v6
+; GFX9-NEXT: v_readfirstlane_b32 s40, v5
; GFX9-NEXT: v_readfirstlane_b32 s45, v4
; GFX9-NEXT: v_readfirstlane_b32 s44, v3
; GFX9-NEXT: v_readfirstlane_b32 s5, v2
@@ -160162,134 +160210,134 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: s_cbranch_scc0 .LBB91_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: s_lshr_b32 s46, s5, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 10
+; GFX9-NEXT: v_writelane_b32 v62, s46, 17
; GFX9-NEXT: s_lshr_b32 s46, s5, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 0
+; GFX9-NEXT: v_writelane_b32 v62, s46, 1
; GFX9-NEXT: s_lshr_b32 s46, s5, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 11
+; GFX9-NEXT: v_writelane_b32 v62, s46, 18
; GFX9-NEXT: s_lshr_b32 s46, s4, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 0
; GFX9-NEXT: s_lshr_b32 s46, s4, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 9
+; GFX9-NEXT: v_writelane_b32 v62, s46, 16
; GFX9-NEXT: s_lshr_b32 s46, s29, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 14
+; GFX9-NEXT: v_writelane_b32 v62, s46, 20
; GFX9-NEXT: s_lshr_b32 s46, s29, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 1
+; GFX9-NEXT: v_writelane_b32 v62, s46, 3
; GFX9-NEXT: s_lshr_b32 s46, s29, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 15
+; GFX9-NEXT: v_writelane_b32 v62, s46, 21
; GFX9-NEXT: s_lshr_b32 s46, s28, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 12
+; GFX9-NEXT: v_writelane_b32 v62, s46, 2
; GFX9-NEXT: s_lshr_b32 s46, s28, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 13
+; GFX9-NEXT: v_writelane_b32 v62, s46, 19
; GFX9-NEXT: s_lshr_b32 s46, s27, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 18
+; GFX9-NEXT: v_writelane_b32 v62, s46, 23
; GFX9-NEXT: s_lshr_b32 s46, s27, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 2
+; GFX9-NEXT: v_writelane_b32 v62, s46, 5
; GFX9-NEXT: s_lshr_b32 s46, s27, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 19
+; GFX9-NEXT: v_writelane_b32 v62, s46, 24
; GFX9-NEXT: s_lshr_b32 s46, s26, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 16
+; GFX9-NEXT: v_writelane_b32 v62, s46, 4
; GFX9-NEXT: s_lshr_b32 s46, s26, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 17
-; GFX9-NEXT: s_lshr_b32 s46, s25, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 22
+; GFX9-NEXT: s_lshr_b32 s46, s25, 24
+; GFX9-NEXT: v_writelane_b32 v62, s46, 26
; GFX9-NEXT: s_lshr_b32 s46, s25, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 3
+; GFX9-NEXT: v_writelane_b32 v62, s46, 7
; GFX9-NEXT: s_lshr_b32 s46, s25, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 23
+; GFX9-NEXT: v_writelane_b32 v62, s46, 27
; GFX9-NEXT: s_lshr_b32 s46, s24, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 20
+; GFX9-NEXT: v_writelane_b32 v62, s46, 6
; GFX9-NEXT: s_lshr_b32 s46, s24, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 21
+; GFX9-NEXT: v_writelane_b32 v62, s46, 25
; GFX9-NEXT: s_lshr_b32 s46, s23, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 26
+; GFX9-NEXT: v_writelane_b32 v62, s46, 29
; GFX9-NEXT: s_lshr_b32 s46, s23, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 4
+; GFX9-NEXT: v_writelane_b32 v62, s46, 9
; GFX9-NEXT: s_lshr_b32 s46, s23, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 27
+; GFX9-NEXT: v_writelane_b32 v62, s46, 30
; GFX9-NEXT: s_lshr_b32 s46, s22, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 24
+; GFX9-NEXT: v_writelane_b32 v62, s46, 8
; GFX9-NEXT: s_lshr_b32 s46, s22, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 25
+; GFX9-NEXT: v_writelane_b32 v62, s46, 28
; GFX9-NEXT: s_lshr_b32 s46, s21, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 30
+; GFX9-NEXT: v_writelane_b32 v62, s46, 32
; GFX9-NEXT: s_lshr_b32 s46, s21, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 5
+; GFX9-NEXT: v_writelane_b32 v62, s46, 11
; GFX9-NEXT: s_lshr_b32 s46, s21, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 31
+; GFX9-NEXT: v_writelane_b32 v62, s46, 33
; GFX9-NEXT: s_lshr_b32 s46, s20, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 28
+; GFX9-NEXT: v_writelane_b32 v62, s46, 10
; GFX9-NEXT: s_lshr_b32 s46, s20, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 29
+; GFX9-NEXT: v_writelane_b32 v62, s46, 31
; GFX9-NEXT: s_lshr_b32 s46, s19, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 34
+; GFX9-NEXT: v_writelane_b32 v62, s46, 35
; GFX9-NEXT: s_lshr_b32 s46, s19, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 6
+; GFX9-NEXT: v_writelane_b32 v62, s46, 13
; GFX9-NEXT: s_lshr_b32 s46, s19, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 35
+; GFX9-NEXT: v_writelane_b32 v62, s46, 36
; GFX9-NEXT: s_lshr_b32 s46, s18, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 32
+; GFX9-NEXT: v_writelane_b32 v62, s46, 12
; GFX9-NEXT: s_lshr_b32 s46, s18, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 33
+; GFX9-NEXT: v_writelane_b32 v62, s46, 34
; GFX9-NEXT: s_lshr_b32 s46, s17, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 38
; GFX9-NEXT: s_lshr_b32 s46, s17, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 7
+; GFX9-NEXT: v_writelane_b32 v62, s46, 15
; GFX9-NEXT: s_lshr_b32 s46, s17, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 39
; GFX9-NEXT: s_lshr_b32 s46, s16, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 36
+; GFX9-NEXT: v_writelane_b32 v62, s46, 14
; GFX9-NEXT: s_lshr_b32 s46, s16, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 37
-; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: s_lshr_b32 s46, s15, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 40
-; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: s_lshr_b32 s46, s15, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 41
; GFX9-NEXT: s_lshr_b32 s46, s43, 24
-; GFX9-NEXT: v_writelane_b32 v62, s46, 44
-; GFX9-NEXT: s_lshr_b32 s46, s43, 8
-; GFX9-NEXT: v_writelane_b32 v62, s46, 45
-; GFX9-NEXT: s_lshr_b32 s46, s42, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 42
-; GFX9-NEXT: s_lshr_b32 s46, s42, 8
+; GFX9-NEXT: s_lshr_b32 s46, s43, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 43
+; GFX9-NEXT: s_lshr_b32 s46, s41, 24
+; GFX9-NEXT: v_writelane_b32 v62, s46, 45
+; GFX9-NEXT: s_lshr_b32 s46, s41, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 46
+; GFX9-NEXT: s_lshr_b32 s46, s40, 8
+; GFX9-NEXT: v_writelane_b32 v62, s46, 44
; GFX9-NEXT: s_lshr_b32 s46, s45, 24
; GFX9-NEXT: v_writelane_b32 v62, s46, 48
; GFX9-NEXT: s_lshr_b32 s46, s45, 8
; GFX9-NEXT: v_writelane_b32 v62, s46, 49
-; GFX9-NEXT: s_lshr_b32 s46, s44, 16
-; GFX9-NEXT: v_writelane_b32 v62, s46, 46
; GFX9-NEXT: s_lshr_b32 s46, s44, 8
-; GFX9-NEXT: s_lshr_b32 s52, s7, 24
+; GFX9-NEXT: s_lshr_b32 s97, s7, 24
; GFX9-NEXT: s_lshr_b32 s67, s7, 16
-; GFX9-NEXT: s_lshr_b32 s55, s7, 8
-; GFX9-NEXT: s_lshr_b32 s65, s6, 16
-; GFX9-NEXT: s_lshr_b32 s64, s6, 8
-; GFX9-NEXT: s_lshr_b32 s48, s9, 24
-; GFX9-NEXT: s_lshr_b32 s68, s9, 16
-; GFX9-NEXT: s_lshr_b32 s51, s9, 8
-; GFX9-NEXT: s_lshr_b32 s54, s8, 16
-; GFX9-NEXT: s_lshr_b32 s53, s8, 8
-; GFX9-NEXT: s_lshr_b32 s98, s11, 24
-; GFX9-NEXT: s_lshr_b32 s69, s11, 16
-; GFX9-NEXT: s_lshr_b32 s39, s11, 8
-; GFX9-NEXT: s_lshr_b32 s50, s10, 16
-; GFX9-NEXT: s_lshr_b32 s49, s10, 8
-; GFX9-NEXT: s_lshr_b32 s86, s13, 24
-; GFX9-NEXT: s_lshr_b32 s70, s13, 16
-; GFX9-NEXT: s_lshr_b32 s97, s13, 8
-; GFX9-NEXT: s_lshr_b32 s38, s12, 16
-; GFX9-NEXT: s_lshr_b32 s99, s12, 8
-; GFX9-NEXT: s_lshr_b32 s82, s15, 24
-; GFX9-NEXT: s_lshr_b32 s71, s15, 16
-; GFX9-NEXT: s_lshr_b32 s85, s15, 8
-; GFX9-NEXT: s_lshr_b32 s96, s14, 16
-; GFX9-NEXT: s_lshr_b32 s87, s14, 8
-; GFX9-NEXT: s_lshr_b32 s80, s41, 16
-; GFX9-NEXT: s_lshr_b32 s84, s40, 16
-; GFX9-NEXT: s_lshr_b32 s83, s40, 8
-; GFX9-NEXT: s_lshr_b32 s81, s43, 16
-; GFX9-NEXT: s_lshr_b32 s66, s45, 16
+; GFX9-NEXT: s_lshr_b32 s99, s7, 8
+; GFX9-NEXT: s_lshr_b32 s81, s6, 16
+; GFX9-NEXT: s_lshr_b32 s49, s6, 8
+; GFX9-NEXT: s_lshr_b32 s86, s9, 24
+; GFX9-NEXT: s_lshr_b32 s66, s9, 16
+; GFX9-NEXT: s_lshr_b32 s96, s9, 8
+; GFX9-NEXT: s_lshr_b32 s80, s8, 16
+; GFX9-NEXT: s_lshr_b32 s48, s8, 8
+; GFX9-NEXT: s_lshr_b32 s85, s13, 24
+; GFX9-NEXT: s_lshr_b32 s65, s13, 16
+; GFX9-NEXT: s_lshr_b32 s39, s13, 8
+; GFX9-NEXT: s_lshr_b32 s71, s12, 16
+; GFX9-NEXT: s_lshr_b32 s98, s12, 8
+; GFX9-NEXT: s_lshr_b32 s82, s11, 24
+; GFX9-NEXT: s_lshr_b32 s64, s11, 16
+; GFX9-NEXT: s_lshr_b32 s84, s11, 8
+; GFX9-NEXT: s_lshr_b32 s70, s10, 16
+; GFX9-NEXT: s_lshr_b32 s87, s10, 8
+; GFX9-NEXT: s_lshr_b32 s55, s15, 16
+; GFX9-NEXT: s_lshr_b32 s69, s14, 16
+; GFX9-NEXT: s_lshr_b32 s38, s14, 8
+; GFX9-NEXT: s_lshr_b32 s54, s43, 16
+; GFX9-NEXT: s_lshr_b32 s68, s42, 16
+; GFX9-NEXT: s_lshr_b32 s83, s42, 8
+; GFX9-NEXT: s_lshr_b32 s52, s41, 16
+; GFX9-NEXT: s_lshr_b32 s53, s40, 16
+; GFX9-NEXT: s_lshr_b32 s50, s45, 16
+; GFX9-NEXT: s_lshr_b32 s51, s44, 16
; GFX9-NEXT: v_writelane_b32 v62, s46, 47
; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
@@ -160301,17 +160349,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: s_lshr_b64 s[76:77], s[16:17], 24
; GFX9-NEXT: s_lshr_b64 s[78:79], s[6:7], 24
; GFX9-NEXT: s_lshr_b64 s[88:89], s[8:9], 24
-; GFX9-NEXT: s_lshr_b64 s[90:91], s[10:11], 24
-; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24
+; GFX9-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
+; GFX9-NEXT: s_lshr_b64 s[92:93], s[10:11], 24
; GFX9-NEXT: s_lshr_b64 s[94:95], s[14:15], 24
-; GFX9-NEXT: s_lshr_b64 s[30:31], s[40:41], 24
-; GFX9-NEXT: s_lshr_b64 s[34:35], s[42:43], 24
+; GFX9-NEXT: s_lshr_b64 s[30:31], s[42:43], 24
+; GFX9-NEXT: s_lshr_b64 s[34:35], s[40:41], 24
; GFX9-NEXT: s_lshr_b64 s[36:37], s[44:45], 24
; GFX9-NEXT: s_cbranch_execnz .LBB91_4
; GFX9-NEXT: .LBB91_2: ; %cmp.true
; GFX9-NEXT: s_and_b32 s46, s45, 0xffff0000
-; GFX9-NEXT: v_mov_b32_e32 v8, 0x40c00000
-; GFX9-NEXT: v_add_f32_e32 v1, s46, v8
+; GFX9-NEXT: v_mov_b32_e32 v13, 0x40c00000
+; GFX9-NEXT: v_add_f32_e32 v1, s46, v13
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -160320,7 +160368,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; GFX9-NEXT: s_lshl_b32 s45, s45, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s45, v8
+; GFX9-NEXT: v_add_f32_e32 v1, s45, v13
; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
@@ -160328,42 +160376,43 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX9-NEXT: s_and_b32 s45, s44, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v2, v4, 16, v1
-; GFX9-NEXT: v_add_f32_e32 v1, s45, v8
+; GFX9-NEXT: v_add_f32_e32 v1, s45, v13
; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
-; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
; GFX9-NEXT: s_lshl_b32 s44, s44, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s44, v13
+; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v1
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; GFX9-NEXT: s_and_b32 s44, s41, 0xffff0000
; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s44, v8
-; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
-; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
-; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s44, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX9-NEXT: s_and_b32 s44, s43, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s44, v8
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v1, v5, 16, v1
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; GFX9-NEXT: s_lshl_b32 s43, s43, 16
+; GFX9-NEXT: s_lshl_b32 s41, s41, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s43, v8
+; GFX9-NEXT: v_add_f32_e32 v3, s41, v13
; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v3
; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4
@@ -160371,42 +160420,43 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; GFX9-NEXT: s_and_b32 s43, s42, 0xffff0000
+; GFX9-NEXT: s_and_b32 s41, s40, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v4, v6, 16, v3
-; GFX9-NEXT: v_add_f32_e32 v3, s43, v8
+; GFX9-NEXT: v_add_f32_e32 v3, s41, v13
; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: s_lshl_b32 s42, s42, 16
; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s42, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX9-NEXT: s_lshl_b32 s40, s40, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX9-NEXT: v_add_f32_e32 v3, s40, v13
+; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: s_and_b32 s40, s43, 0xffff0000
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
+; GFX9-NEXT: v_add_f32_e32 v5, s40, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX9-NEXT: s_and_b32 s42, s41, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v3, v3, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s42, v8
; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
+; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v3, v7, 16, v3
; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: s_lshl_b32 s41, s41, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s41, v8
+; GFX9-NEXT: s_lshl_b32 s40, s43, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s40, v13
; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
@@ -160416,735 +160466,716 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX9-NEXT: s_and_b32 s41, s40, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v12, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s41, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: s_lshl_b32 s40, s40, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s40, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: s_and_b32 s40, s42, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v6, v8, 16, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s40, v13
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX9-NEXT: s_and_b32 s40, s15, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v11, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s40, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: s_lshl_b32 s15, s15, 16
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: s_lshl_b32 s40, s42, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s15, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
+; GFX9-NEXT: v_add_f32_e32 v5, s40, v13
+; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v7, v7, v5
+; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
+; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: s_and_b32 s40, s15, 0xffff0000
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc
+; GFX9-NEXT: v_add_f32_e32 v7, s40, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v5, v9, 16, v5
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: s_lshl_b32 s15, s15, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s15, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s15, s14, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v14, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s15, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s15, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s14, s14, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s14, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v13, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s14, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: s_lshl_b32 s13, s13, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s13, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v16, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s13, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: s_lshl_b32 s12, s12, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s12, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v15, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s12, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s14, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX9-NEXT: s_and_b32 s14, s11, 0xffff0000
+; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshl_or_b32 v10, v10, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s14, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s11, s11, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s11, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s11, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v20, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s11, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v17, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s11, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s10, s10, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s10, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX9-NEXT: s_and_b32 s10, s13, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v16, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: s_lshl_b32 s10, s13, 16
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX9-NEXT: s_and_b32 s10, s12, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v19, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: s_lshl_b32 s10, s12, 16
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v19, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s10, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v18, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s10, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s9, s9, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s9, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s9, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v22, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s9, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v23, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s9, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s8, s8, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s8, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s8, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v21, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s8, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v22, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s8, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s7, s7, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s7, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s7, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v24, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s7, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v25, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s7, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s6, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v23, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v24, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s17, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v27, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s16, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v30, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v26, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v49, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v29, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s18, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v48, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v28, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s21, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v53, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v53, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s20, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v52, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v52, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s23, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v55, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v55, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s22, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v54, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v54, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s25, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v41, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v41, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s24, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v40, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v40, v12, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s27, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v43, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v43, v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s26, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v42, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v42, v57, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s29, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v45, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v45, v56, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s6, s28, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s6, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v9, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v44, v5, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
+; GFX9-NEXT: v_lshl_or_b32 v44, v15, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s6, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s5, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s5, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v61
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v47, v9, 16, v5
-; GFX9-NEXT: v_add_f32_e32 v5, s5, v8
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_lshl_or_b32 v47, v14, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s5, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
; GFX9-NEXT: s_lshl_b32 s4, s4, 16
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_add_f32_e32 v6, s4, v8
-; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v7, v7, v6
-; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7
-; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v8
-; GFX9-NEXT: v_lshl_or_b32 v46, v5, 16, v6
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[23:24]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[21:22]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[19:20]
-; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[42:43]
-; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[40:41]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[54:55]
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[15:16]
-; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[52:53]
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v52
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v52
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v7
+; GFX9-NEXT: v_add_f32_e32 v7, s4, v13
+; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v8, v8, v7
+; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8
+; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v7
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v13
+; GFX9-NEXT: v_lshl_or_b32 v46, v58, 16, v7
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[24:25]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[22:23]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[18:19]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[16:17]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[10:11]
+; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[42:43]
+; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[52:53]
+; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[46:47]
+; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[44:45]
+; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[40:41]
+; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[28:29]
+; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[13:14]
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v22
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20
-; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[11:12]
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
-; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[46:47]
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX9-NEXT: v_lshrrev_b64 v[28:29], 24, v[44:45]
-; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[48:49]
-; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[30:31]
-; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b64 v[32:33], 24, v[1:2]
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v47
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v46
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v45
+; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[54:55]
+; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[26:27]
+; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
+; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[1:2]
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v25
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v23
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v47
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v46
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v45
; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v45
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v44
; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v44
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v43
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v43
; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v43
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v42
; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v41
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v41
; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v40
; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; GFX9-NEXT: v_lshrrev_b32_e32 v27, 24, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v55
; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v55
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v54
; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v53
; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v53
-; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30
-; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v28
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v26
+; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
+; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v20, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1
+; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; GFX9-NEXT: s_branch .LBB91_5
; GFX9-NEXT: .LBB91_3:
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: ; kill: killed $sgpr46
-; GFX9-NEXT: ; implicit-def: $sgpr66
-; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr53
+; GFX9-NEXT: ; implicit-def: $sgpr52
; GFX9-NEXT: ; implicit-def: $sgpr83
+; GFX9-NEXT: ; implicit-def: $sgpr68
+; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr69
+; GFX9-NEXT: ; implicit-def: $sgpr55
+; GFX9-NEXT: ; implicit-def: $sgpr87
+; GFX9-NEXT: ; implicit-def: $sgpr70
; GFX9-NEXT: ; implicit-def: $sgpr84
+; GFX9-NEXT: ; implicit-def: $sgpr64
+; GFX9-NEXT: ; implicit-def: $sgpr82
+; GFX9-NEXT: ; implicit-def: $sgpr98
+; GFX9-NEXT: ; implicit-def: $sgpr71
+; GFX9-NEXT: ; implicit-def: $sgpr39
+; GFX9-NEXT: ; implicit-def: $sgpr65
+; GFX9-NEXT: ; implicit-def: $sgpr85
+; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr80
-; GFX9-NEXT: ; implicit-def: $sgpr87
; GFX9-NEXT: ; implicit-def: $sgpr96
-; GFX9-NEXT: ; implicit-def: $sgpr85
-; GFX9-NEXT: ; implicit-def: $sgpr71
-; GFX9-NEXT: ; implicit-def: $sgpr82
-; GFX9-NEXT: ; implicit-def: $sgpr99
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr97
-; GFX9-NEXT: ; implicit-def: $sgpr70
+; GFX9-NEXT: ; implicit-def: $sgpr66
; GFX9-NEXT: ; implicit-def: $sgpr86
; GFX9-NEXT: ; implicit-def: $sgpr49
-; GFX9-NEXT: ; implicit-def: $sgpr50
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr69
-; GFX9-NEXT: ; implicit-def: $sgpr98
-; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr51
-; GFX9-NEXT: ; implicit-def: $sgpr68
-; GFX9-NEXT: ; implicit-def: $sgpr48
-; GFX9-NEXT: ; implicit-def: $sgpr64
-; GFX9-NEXT: ; implicit-def: $sgpr65
-; GFX9-NEXT: ; implicit-def: $sgpr55
+; GFX9-NEXT: ; implicit-def: $sgpr81
+; GFX9-NEXT: ; implicit-def: $sgpr99
; GFX9-NEXT: ; implicit-def: $sgpr67
-; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr97
; GFX9-NEXT: ; implicit-def: $sgpr76
; GFX9-NEXT: ; implicit-def: $sgpr74
; GFX9-NEXT: ; implicit-def: $sgpr72
@@ -161259,279 +161290,270 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: s_branch .LBB91_2
; GFX9-NEXT: .LBB91_4:
-; GFX9-NEXT: v_mov_b32_e32 v1, s5
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s28
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s29
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s26
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s27
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s24
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s25
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s22
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s23
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s20
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s21
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s18
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s19
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s16
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s17
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s9
+; GFX9-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s9
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s12
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s13
+; GFX9-NEXT: v_mov_b32_e32 v13, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s10
+; GFX9-NEXT: v_readlane_b32 s4, v62, 0
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s11
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s12
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s13
+; GFX9-NEXT: v_mov_b32_e32 v58, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 1
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s14
+; GFX9-NEXT: v_mov_b32_e32 v14, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 2
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s15
+; GFX9-NEXT: v_mov_b32_e32 v15, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 3
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s40
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s41
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s42
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s43
-; GFX9-NEXT: v_mov_b32_e32 v8, s4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s44
-; GFX9-NEXT: v_readlane_b32 s4, v62, 0
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s45
-; GFX9-NEXT: v_mov_b32_e32 v9, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 1
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 2
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 3
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v56, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s43
+; GFX9-NEXT: v_mov_b32_e32 v57, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 5
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 6
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s4
+; GFX9-NEXT: v_mov_b32_e32 v12, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 7
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 8
-; GFX9-NEXT: v_mov_b32_e32 v18, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 9
-; GFX9-NEXT: v_mov_b32_e32 v46, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 10
-; GFX9-NEXT: v_mov_b32_e32 v57, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 11
-; GFX9-NEXT: v_mov_b32_e32 v47, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 12
-; GFX9-NEXT: v_mov_b32_e32 v29, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 13
-; GFX9-NEXT: v_mov_b32_e32 v44, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 14
-; GFX9-NEXT: v_mov_b32_e32 v58, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 15
-; GFX9-NEXT: v_mov_b32_e32 v45, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 16
-; GFX9-NEXT: v_mov_b32_e32 v56, s4
+; GFX9-NEXT: v_mov_b32_e32 v51, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 17
-; GFX9-NEXT: v_mov_b32_e32 v42, s4
+; GFX9-NEXT: v_mov_b32_e32 v35, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 18
-; GFX9-NEXT: v_mov_b32_e32 v59, s4
+; GFX9-NEXT: v_mov_b32_e32 v39, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 19
-; GFX9-NEXT: v_mov_b32_e32 v43, s4
+; GFX9-NEXT: v_mov_b32_e32 v44, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 20
-; GFX9-NEXT: v_mov_b32_e32 v6, s4
+; GFX9-NEXT: v_mov_b32_e32 v46, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 21
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
+; GFX9-NEXT: v_mov_b32_e32 v45, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 22
-; GFX9-NEXT: v_mov_b32_e32 v10, s4
+; GFX9-NEXT: v_mov_b32_e32 v42, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 23
-; GFX9-NEXT: v_mov_b32_e32 v41, s4
+; GFX9-NEXT: v_mov_b32_e32 v47, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 24
-; GFX9-NEXT: v_mov_b32_e32 v61, s4
+; GFX9-NEXT: v_mov_b32_e32 v43, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 25
-; GFX9-NEXT: v_mov_b32_e32 v54, s4
+; GFX9-NEXT: v_mov_b32_e32 v40, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 26
-; GFX9-NEXT: v_mov_b32_e32 v27, s4
-; GFX9-NEXT: v_mov_b32_e32 v26, s78
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s88
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s67
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s68
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s69
+; GFX9-NEXT: v_mov_b32_e32 v59, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 27
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s70
-; GFX9-NEXT: v_mov_b32_e32 v55, s4
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s90
+; GFX9-NEXT: v_mov_b32_e32 v41, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 28
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s71
-; GFX9-NEXT: v_mov_b32_e32 v7, s4
+; GFX9-NEXT: v_mov_b32_e32 v54, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 29
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s80
-; GFX9-NEXT: v_mov_b32_e32 v60, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 30
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v21, s4
+; GFX9-NEXT: v_mov_b32_e32 v20, s78
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s92
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v20, s88
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s81
-; GFX9-NEXT: v_mov_b32_e32 v5, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 31
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s67
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s66
-; GFX9-NEXT: v_mov_b32_e32 v53, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 32
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v20, s90
+; GFX9-NEXT: v_mov_b32_e32 v1, s80
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v49, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 33
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s66
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s71
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v26, s94
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v20, s92
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s65
-; GFX9-NEXT: v_mov_b32_e32 v39, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 34
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s70
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s64
-; GFX9-NEXT: v_mov_b32_e32 v33, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s69
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s55
+; GFX9-NEXT: v_readlane_b32 s4, v62, 30
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s68
+; GFX9-NEXT: v_mov_b32_e32 v55, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 31
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s54
+; GFX9-NEXT: v_mov_b32_e32 v52, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 32
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s40
+; GFX9-NEXT: v_mov_b32_e32 v60, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 33
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s53
+; GFX9-NEXT: v_mov_b32_e32 v53, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 34
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s41
+; GFX9-NEXT: v_mov_b32_e32 v9, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 35
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s52
-; GFX9-NEXT: v_mov_b32_e32 v17, s4
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v7, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 36
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s55
-; GFX9-NEXT: v_mov_b32_e32 v51, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s44
+; GFX9-NEXT: v_mov_b32_e32 v8, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 37
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s54
-; GFX9-NEXT: v_mov_b32_e32 v30, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s51
+; GFX9-NEXT: v_mov_b32_e32 v26, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 38
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s53
-; GFX9-NEXT: v_mov_b32_e32 v48, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s45
+; GFX9-NEXT: v_mov_b32_e32 v28, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 39
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
-; GFX9-NEXT: v_mov_b32_e32 v31, s4
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s51
-; GFX9-NEXT: v_readlane_b32 s4, v62, 40
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s50
-; GFX9-NEXT: v_mov_b32_e32 v16, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 41
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v27, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 40
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s49
-; GFX9-NEXT: v_mov_b32_e32 v12, s4
+; GFX9-NEXT: v_mov_b32_e32 v29, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 41
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s97
+; GFX9-NEXT: v_mov_b32_e32 v11, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 42
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s98
-; GFX9-NEXT: v_mov_b32_e32 v23, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s99
+; GFX9-NEXT: v_mov_b32_e32 v32, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 43
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s39
-; GFX9-NEXT: v_mov_b32_e32 v3, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s48
+; GFX9-NEXT: v_mov_b32_e32 v6, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 44
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s38
-; GFX9-NEXT: v_mov_b32_e32 v21, s4
-; GFX9-NEXT: v_readlane_b32 s4, v62, 45
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s86
-; GFX9-NEXT: v_mov_b32_e32 v4, s4
+; GFX9-NEXT: v_mov_b32_e32 v3, s4
+; GFX9-NEXT: v_readlane_b32 s4, v62, 45
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s96
+; GFX9-NEXT: v_mov_b32_e32 v25, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 46
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s97
-; GFX9-NEXT: v_mov_b32_e32 v22, s4
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v1, s85
+; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 47
-; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 48
-; GFX9-NEXT: v_mov_b32_e32 v26, s30
-; GFX9-NEXT: v_mov_b32_e32 v20, s4
+; GFX9-NEXT: v_mov_b32_e32 v20, s94
+; GFX9-NEXT: v_mov_b32_e32 v22, s4
; GFX9-NEXT: v_readlane_b32 s4, v62, 49
-; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v15, s99
-; GFX9-NEXT: v_mov_b32_e32 v19, s96
-; GFX9-NEXT: v_mov_b32_e32 v13, s87
+; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; GFX9-NEXT: v_mov_b32_e32 v61, s5
+; GFX9-NEXT: v_mov_b32_e32 v18, s98
+; GFX9-NEXT: v_mov_b32_e32 v19, s39
+; GFX9-NEXT: v_mov_b32_e32 v16, s87
; GFX9-NEXT: v_mov_b32_e32 v24, s82
-; GFX9-NEXT: v_mov_b32_e32 v14, s85
-; GFX9-NEXT: v_mov_b32_e32 v52, s84
-; GFX9-NEXT: v_mov_b32_e32 v11, s83
+; GFX9-NEXT: v_mov_b32_e32 v17, s84
+; GFX9-NEXT: v_mov_b32_e32 v10, s38
+; GFX9-NEXT: v_mov_b32_e32 v5, s83
; GFX9-NEXT: v_mov_b32_e32 v2, s4
-; GFX9-NEXT: v_mov_b32_e32 v25, s46
-; GFX9-NEXT: v_mov_b32_e32 v28, s56
-; GFX9-NEXT: v_mov_b32_e32 v34, s58
-; GFX9-NEXT: v_mov_b32_e32 v35, s60
-; GFX9-NEXT: v_mov_b32_e32 v36, s62
-; GFX9-NEXT: v_mov_b32_e32 v37, s72
-; GFX9-NEXT: v_mov_b32_e32 v38, s74
+; GFX9-NEXT: v_mov_b32_e32 v30, s46
+; GFX9-NEXT: v_mov_b32_e32 v33, s56
+; GFX9-NEXT: v_mov_b32_e32 v36, s58
+; GFX9-NEXT: v_mov_b32_e32 v37, s60
+; GFX9-NEXT: v_mov_b32_e32 v38, s62
+; GFX9-NEXT: v_mov_b32_e32 v48, s72
+; GFX9-NEXT: v_mov_b32_e32 v49, s74
; GFX9-NEXT: v_mov_b32_e32 v50, s76
-; GFX9-NEXT: v_mov_b32_e32 v26, s34
-; GFX9-NEXT: v_mov_b32_e32 v32, s36
+; GFX9-NEXT: v_mov_b32_e32 v20, s30
+; GFX9-NEXT: v_mov_b32_e32 v31, s34
+; GFX9-NEXT: v_mov_b32_e32 v34, s36
; GFX9-NEXT: .LBB91_5: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v18, v18, v25, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v50, v51, v50, s4
-; GFX9-NEXT: v_perm_b32 v23, v23, v26, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v50
-; GFX9-NEXT: v_perm_b32 v38, v49, v38, s4
-; GFX9-NEXT: v_perm_b32 v7, v7, v37, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX9-NEXT: v_perm_b32 v36, v61, v36, s4
-; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_perm_b32 v34, v56, v34, s4
-; GFX9-NEXT: v_perm_b32 v28, v29, v28, s4
-; GFX9-NEXT: v_perm_b32 v22, v22, v32, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v15, v15, v33, s4
+; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v12, v12, v37, s4
+; GFX9-NEXT: v_perm_b32 v36, v57, v36, s4
+; GFX9-NEXT: v_perm_b32 v30, v58, v30, s4
; GFX9-NEXT: v_readlane_b32 s99, v63, 35
; GFX9-NEXT: v_readlane_b32 s98, v63, 34
; GFX9-NEXT: v_readlane_b32 s97, v63, 33
@@ -161568,288 +161590,297 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: v_readlane_b32 s34, v63, 2
; GFX9-NEXT: v_readlane_b32 s31, v63, 1
; GFX9-NEXT: v_readlane_b32 s30, v63, 0
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v30, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v25, v26
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v25, v25, v31, s4
+; GFX9-NEXT: v_perm_b32 v50, v23, v50, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v33, v33, v34, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v49, v23, v49, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v31, v34, v31, s4
+; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v48, v23, v48, s4
+; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v26, v34, v26, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v34, 16, v50
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v34
+; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(2)
+; GFX9-NEXT: v_perm_b32 v38, v23, v38, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v26, v26, v48, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX9-NEXT: v_or_b32_e32 v25, v25, v26
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v38
+; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4
+; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v39, s4
-; GFX9-NEXT: v_or_b32_e32 v25, v25, v26
-; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v27, v27, v28, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; GFX9-NEXT: v_or_b32_e32 v26, v26, v27
+; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:4
+; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v25, v17, s4
-; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v49
+; GFX9-NEXT: v_or_b32_e32 v9, v9, v26
+; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:8
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v25, v25, v33, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; GFX9-NEXT: v_or_b32_e32 v17, v17, v25
-; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v9, v8, s4
+; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v7, v9, v7, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX9-NEXT: v_or_b32_e32 v7, v8, v7
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v48
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v17, v17, v60, s4
-; GFX9-NEXT: v_or_b32_e32 v7, v17, v7
+; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v17, v5, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX9-NEXT: v_or_b32_e32 v5, v7, v5
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v36
+; GFX9-NEXT: v_perm_b32 v8, v8, v60, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v38
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v54, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v54, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v55, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v55, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v7, v7, v27, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v7
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v8, v21, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:28
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v12
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v40, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v40, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v41, s4
+; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v10, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v34
+; GFX9-NEXT: v_perm_b32 v8, v8, v59, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v36
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v42, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v42, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:40
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v43, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v59, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v28
+; GFX9-NEXT: v_perm_b32 v7, v7, v43, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v44, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v5, v5, v45, s4
+; GFX9-NEXT: v_perm_b32 v8, v8, v47, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v15
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v6, v6, v58, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v5, v8, v46, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v18
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v6, v9, v57, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX9-NEXT: v_perm_b32 v7, v7, v44, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:48
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v8, v56, v46, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v5, v5, v47, s4
-; GFX9-NEXT: v_or_b32_e32 v5, v5, v6
-; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:60
-; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v7, v7, v45, s4
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:52
+; GFX9-NEXT: v_perm_b32 v7, v13, v51, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v30
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: v_perm_b32 v8, v14, v35, s4
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:56
+; GFX9-NEXT: v_perm_b32 v7, v61, v39, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:60
+; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v5, v1, s4
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v22
-; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
+; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4
+; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v33
+; GFX9-NEXT: v_or_b32_e32 v1, v1, v7
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v20, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v31
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_perm_b32 v1, v1, v4, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v21, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v25, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v52, v2, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v12, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v6, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v16, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v32, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v2, v19, v2, s4
-; GFX9-NEXT: v_perm_b32 v1, v1, v13, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v10, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(1)
-; GFX9-NEXT: v_perm_b32 v1, v1, v14, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v24, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: s_nop 0
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v15, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v1, v1, v17, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: v_perm_b32 v1, v1, v18, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v1, v1, v19, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: s_waitcnt vmcnt(1)
+; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
-; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT: s_nop 0
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -161968,148 +161999,148 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s5, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s5, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 17
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s5, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s5, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s4, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s5, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s4, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s4, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s7, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s7, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s7, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 18
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s7, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s6, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s6, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s6, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s9, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s9, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s9, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s9, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s9, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s8, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s8, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s11, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s11, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 20
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s11, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s11, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s10, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s11, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s11, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s10, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s10, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s13, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s13, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s13, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s13, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 21
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s13, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s12, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s12, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s13, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s12, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s12, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s15, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s15, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s15, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s15, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s15, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s15, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 19
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s14, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s14, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s14, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s41, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 23
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s41, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s41, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s40, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s41, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s41, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s40, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s40, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s40, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s29, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s29, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s29, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 24
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s29, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s28, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s28, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s28, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 22
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 26
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16
; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 27
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16
; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 25
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 29
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 9
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 30
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 28
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 11
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 10
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 31
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 13
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 12
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 15
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 7
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 14
; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5
@@ -162123,7 +162154,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s29
; GFX11-TRUE16-NEXT: s_and_b32 s42, s28, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s28, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s29, s41, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28
@@ -162132,711 +162163,686 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s29, s41, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s29
-; GFX11-TRUE16-NEXT: s_lshl_b32 s41, s41, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s41, s41, 16
; GFX11-TRUE16-NEXT: s_and_b32 s28, s40, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s29, s40, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s41
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v51.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v5, v7
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s29
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s28, s15, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s15, s15, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-TRUE16-NEXT: s_and_b32 s15, s14, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s14, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
-; GFX11-TRUE16-NEXT: s_and_b32 s14, s13, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v54.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, v10, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s13, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s13, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX11-TRUE16-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s12, s12, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s12, s11, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: s_lshl_b32 s11, s11, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v12, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v52.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v11, v12
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v11.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s11
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s11, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v13, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: s_and_b32 s11, s10, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s10, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v11
-; GFX11-TRUE16-NEXT: s_and_b32 s10, s9, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v8
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v12
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v13, v14
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s9, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v15, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s9, s9, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v11
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v14, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v7
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v54.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v13.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s9
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
; GFX11-TRUE16-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s8, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v13
-; GFX11-TRUE16-NEXT: s_and_b32 s8, s7, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v10
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s7, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v13
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v16, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s9
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v15, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v17, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v66.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v16, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v15.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v17
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s7, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v17, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s7, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v13, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-TRUE16-NEXT: s_and_b32 s7, s6, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s6, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v11
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v16, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
-; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v15
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v14, v18, v16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s7
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v68.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v14, v17, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v17.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v16, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v19
-; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v18, 16, 1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v17
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s5, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v18, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v20, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v21, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s5
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s4
; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v21, 16, 1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v13.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v19, v21
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v22, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s4
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v21 :: v_dual_add_nc_u32 v16, v19, v20
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v22, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s0, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v21 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v20, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v99.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v24, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v112.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v102.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v113.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v87.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v13.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v24
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v24
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v24, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v101.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v98.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v103.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v24
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v13.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v81.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v71.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v23
; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v116.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.h, v129.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v24, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v20, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v24, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.h, v13.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v20, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v23
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v118.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.h, v132.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v24
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v84.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v82.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v17, v18
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v24, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v97.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v23 :: v_dual_add_nc_u32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v19, v20
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v13.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v86.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v14, v14, v19 :: v_dual_add_nc_u32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v19, v24
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v29, v28, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v14
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v24 :: v_dual_add_nc_u32 v14, v18, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v18, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, v29, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v16
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v22 :: v_dual_add_nc_u32 v16, v17, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v25, v18
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v24, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v22, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v20
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v131.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v29, 0x7fff, v29
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v85.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v24 :: v_dual_add_nc_u32 v14, v18, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v18, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v16
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v19 :: v_dual_add_nc_u32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v24, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v26, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v25 :: v_dual_add_nc_u32 v18, v18, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v17
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v17
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v18, v18, v25 :: v_dual_add_nc_u32 v17, v19, v23
-; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v24, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v97.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v17, v17, v18 :: v_dual_add_nc_u32 v18, 0x7fff, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v25, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v87.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v177.l, v118.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v18, v18, v19 :: v_dual_add_nc_u32 v19, v23, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, v20, v25
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v18
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v17 :: v_dual_add_nc_u32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v177.h, v131.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v26, v18, 16, 1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v19, v23, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v25
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.l, v129.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, v26, v18
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v19
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v20, v23, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v24, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v19
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x7fff, v25
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v16 :: v_dual_add_nc_u32 v16, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v22
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v23
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v16, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v18, v23, v24 :: v_dual_add_nc_u32 v23, v25, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v15, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
-; GFX11-TRUE16-NEXT: v_bfe_u32 v24, v20, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v147.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v22, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v17, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 16, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v15
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, v24, v20
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v20
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v23, v25, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v26, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v24, 0x7fff, v24
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v27, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v27
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, v23, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v19
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v24, v32, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v26
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v23, 0x7fff, v23
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v27
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, 0x400000, v28
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v20
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v23, v23, v24, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, 0x7fff, v25
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v150.h, v147.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v14.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v23
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v24, v29, v32, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v69.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v150.l, v144.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v24
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v25, v25, v33, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v70.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v82.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v86.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.l, v145.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v25
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v84.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v116.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v128.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v119.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v19.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.l, v133.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.h, v135.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.l, v146.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.h, v18.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v13.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v55.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v53.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v17
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v17
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v16, v18, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v22, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v23
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v22
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v161.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v19, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v22
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v18, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v15
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v150.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v164.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v25, v26, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.l, v134.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.h, v149.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.l, v146.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v19
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v18, v27, vcc_lo
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.h, v160.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v145.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.l, v135.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.h, v148.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v18
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v100.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v114.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v117.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v115.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v128.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v119.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.h, v133.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v130.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.h, v144.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v162.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v176.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v163.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v177.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v53.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v65.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v68.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v67.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v71.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v83.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v81.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v96.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v99.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v98.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v100.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v103.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v101.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.l, v102.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v114.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v112.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v113.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v117.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v115.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.l, v130.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.h, v134.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.l, v132.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.h, v17.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[149:150]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[176:177]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[161:162]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[178:179]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v179
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v179
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v67.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v69.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v70.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v80.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v85.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v83.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v96.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.l, v151.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v165.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v166.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v167.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[40:41]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[46:47]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[20:21]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[44:45]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[35:36]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[13:14]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[178:179]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[48:49]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[28:29]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v49
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[163:164]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[50:51]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[36:37]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[30:31]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[21:22]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[5:6]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[182:183]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[9:10]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[5:6]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v179
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 8, v179
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v183
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v41
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v47
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v47
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v46
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v45
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v44
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v150
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 8, v150
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v149
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v149
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 24, v162
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 8, v162
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v161
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 8, v161
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 24, v164
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 8, v164
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v163
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 8, v163
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v167, 24, v177
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 8, v177
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v176
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 8, v176
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 16, v178
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v178
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 16, v50
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v50
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 16, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v31
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 16, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v30
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 24, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v22
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v21
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 24, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v178
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v35
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v29
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 24, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 24, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 24, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 24, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 16, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
; GFX11-TRUE16-NEXT: s_branch .LBB91_5
; GFX11-TRUE16-NEXT: .LBB91_3:
@@ -162858,46 +162864,46 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
@@ -162978,288 +162984,288 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43
; GFX11-TRUE16-NEXT: s_branch .LBB91_2
; GFX11-TRUE16-NEXT: .LBB91_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s2 :: v_dual_mov_b32 v101, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s2 :: v_dual_mov_b32 v115, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v145, s26
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s24 :: v_dual_mov_b32 v133, s25
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s8 :: v_dual_mov_b32 v163, s26
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s24 :: v_dual_mov_b32 v151, s25
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s29
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s22 :: v_dual_mov_b32 v129, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s23 :: v_dual_mov_b32 v119, s18
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s22 :: v_dual_mov_b32 v147, s23
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v135, s18
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s21 :: v_dual_mov_b32 v115, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s19 :: v_dual_mov_b32 v113, s17
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v134, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s9
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s21 :: v_dual_mov_b32 v131, s19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s16 :: v_dual_mov_b32 v119, s17
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s3 :: v_dual_mov_b32 v87, s6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s1 :: v_dual_mov_b32 v85, s7
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v131, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v80, s11
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s3 :: v_dual_mov_b32 v99, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s1 :: v_dual_mov_b32 v87, s7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s4 :: v_dual_mov_b32 v81, s10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s5 :: v_dual_mov_b32 v71, s11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s4 :: v_dual_mov_b32 v83, s10
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v71, s12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s8 :: v_dual_mov_b32 v69, s13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s9 :: v_dual_mov_b32 v67, s14
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v68, s13
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s99 :: v_dual_mov_b32 v101, s98
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s102 :: v_dual_mov_b32 v97, s97
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s12 :: v_dual_mov_b32 v65, s15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s40 :: v_dual_mov_b32 v53, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s101 :: v_dual_mov_b32 v85, s96
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s100 :: v_dual_mov_b32 v81, s87
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v114, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s97 :: v_dual_mov_b32 v86, s99
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s98 :: v_dual_mov_b32 v80, s101
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v103, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s14 :: v_dual_mov_b32 v70, s86
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v64, s40
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s100 :: v_dual_mov_b32 v68, s102
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s103 :: v_dual_mov_b32 v55, s104
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s85 :: v_dual_mov_b32 v66, s84
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s83
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s83 :: v_dual_mov_b32 v36, s55
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s85 :: v_dual_mov_b32 v10, s66
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s28 :: v_dual_mov_b32 v53, s82
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s29 :: v_dual_mov_b32 v51, s81
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s84 :: v_dual_mov_b32 v50, s51
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s71 :: v_dual_mov_b32 v8, s54
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s104 :: v_dual_mov_b32 v20, s80
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s70 :: v_dual_mov_b32 v24, s68
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s71 :: v_dual_mov_b32 v144, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s81 :: v_dual_mov_b32 v178, s53
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s80 :: v_dual_mov_b32 v176, s39
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v35, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s65 :: v_dual_mov_b32 v14, s67
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v103, s103
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s69 :: v_dual_mov_b32 v12, s64
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s69 :: v_dual_mov_b32 v6, s50
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s68 :: v_dual_mov_b32 v40, s48
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s54 :: v_dual_mov_b32 v28, s51
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s66 :: v_dual_mov_b32 v10, s53
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v132, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s65 :: v_dual_mov_b32 v180, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s64 :: v_dual_mov_b32 v46, s37
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s55 :: v_dual_mov_b32 v8, s50
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s48 :: v_dual_mov_b32 v6, s39
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s52 :: v_dual_mov_b32 v44, s36
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, s49 :: v_dual_mov_b32 v4, s34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s52 :: v_dual_mov_b32 v48, s35
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s37 :: v_dual_mov_b32 v36, s36
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v151, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v179, s38 :: v_dual_mov_b32 v26, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v43, vcc_hi :: v_dual_mov_b32 v28, s60
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s49 :: v_dual_mov_b32 v44, s38
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, vcc_hi :: v_dual_mov_b32 v4, s34
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s72 :: v_dual_mov_b32 v32, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s56 :: v_dual_mov_b32 v34, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s62 :: v_dual_mov_b32 v26, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s44 :: v_dual_mov_b32 v13, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s42 :: v_dual_mov_b32 v17, s76
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s44 :: v_dual_mov_b32 v38, s42
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v19, s88
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s90 :: v_dual_mov_b32 v24, s92
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s74 :: v_dual_mov_b32 v16, s76
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s78 :: v_dual_mov_b32 v18, s88
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 19
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v23, s92
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s30 :: v_dual_mov_b32 v22, s96
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s87 :: v_dual_mov_b32 v161, s0
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s30 :: v_dual_mov_b32 v180, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v14, s86
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v16, s82
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s67
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, s70 :: v_dual_mov_b32 v177, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v166, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 22
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 24
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 26
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 28
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 29
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 30
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 0
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 1
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 1
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 2
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 4
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 5
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s0
; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 6
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 7
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 7
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0
; GFX11-TRUE16-NEXT: .LBB91_5: ; %end
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v72, v48, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v101, v73, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v101, v103, v62, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v128, v38, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v115, v73, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v115, v117, v63, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_perm_b32 v103, v100, v63, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v61, v38, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v100, v114, v60, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v112, v112, v58, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v101, 16, v101
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v114, v102, v59, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v58, 16, v100
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v100, v48, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v57, v34, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v102, v112, v38
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v115, v56, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v42, v33, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v112, v128, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v117, v114, v72, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v114, v129, v62, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v117, v47, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, v103, v101
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v103, v114, v58
-; GFX11-TRUE16-NEXT: v_perm_b32 v114, v119, v181, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; GFX11-TRUE16-NEXT: v_perm_b32 v115, v116, v182, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v116, 16, v112
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v112, v34, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v177, v32, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v113, v45, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v114, v33
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v131, v167, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v129, v166, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v164, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v132, v37, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v60, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v144, v33, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v128, v116, v61, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v130, v59, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v148, v32, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v113, v48, v38
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v116
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v118, v165, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v117, v115
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v118, v37
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v128, v129
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v133, v58, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v119, v57, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v119, v135, v46, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v132, v163, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-TRUE16-NEXT: s_clause 0x1
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[100:103], off
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:16
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v100, v33, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v134, v162, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v160, v27, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v101, v34, v32
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v102, v38, v28
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v130, v161, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v33, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v160, v31, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v31, v149, v43, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v119, v32
+; GFX11-TRUE16-NEXT: v_perm_b32 v32, v146, v42, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v30, v164, v30, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v32, v135, v151, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v148, v26, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v33, v146, v150, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v178, v24, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v37, v19, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v34, v133, v149, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v32
-; GFX11-TRUE16-NEXT: v_perm_b32 v48, v145, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v103, v28, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v2, v147, v39, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v33, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v55, v43, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v67, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v51, v23, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v81, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v31, v18, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v34, v38
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, v48, v26
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v144, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v118, v145, v56, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v38, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v134, v41, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v32, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v161, v183, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v47, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v167, v26, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v31
+; GFX11-TRUE16-NEXT: v_perm_b32 v33, v147, v182, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v52, v4, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v70, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v177, v25, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v118
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v37, v38
+; GFX11-TRUE16-NEXT: v_perm_b32 v38, v166, v180, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v70, v23, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v96, v18, 0xc0c0004
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16
+; GFX11-TRUE16-NEXT: v_perm_b32 v116, v163, v178, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v33, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v2, v176, v39, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v51, v45, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v69, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v80, v50, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v84, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v83, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v100, v17, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v86, v30, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v1, v46, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v41, v3, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, v26, v2
-; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v180, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v27, v68, v176, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v23
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v24
-; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v36, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v18
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v29, v17, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v97, v21, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v22, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v99, v25, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v28, v53, v44, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v165, v181, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v116, v25
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v162, v34, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v50, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v71, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v81, v29, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v27, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v115, v151, v179, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v1, v53, v1, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v66, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v25, v2
+; GFX11-TRUE16-NEXT: v_perm_b32 v25, v55, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v26, v67, v35, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v22
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23
+; GFX11-TRUE16-NEXT: v_perm_b32 v23, v85, v28, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v17
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v103, v16, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v101, v21, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v113, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v112, v24, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v37
+; GFX11-TRUE16-NEXT: v_perm_b32 v34, v52, v44, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-TRUE16-NEXT: v_perm_b32 v38, v64, v40, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v37, v64, v49, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v179, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v36, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25
; GFX11-TRUE16-NEXT: v_perm_b32 v6, v65, v6, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v68, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v80, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v82, v12, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v23
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v87, v15, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v85, v16, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v98, v20, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
-; GFX11-TRUE16-NEXT: v_perm_b32 v23, v96, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v98, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v87, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v102, v20, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v99, v19, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v28, v1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v38, v3
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v26
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v27
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v24
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v18
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v17
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v19
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v22
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v23, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v34, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v37, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v25
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v26
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v22
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v23
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v21
; GFX11-TRUE16-NEXT: s_clause 0x5
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[100:103], off offset:32
-; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off offset:48
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
@@ -163426,148 +163432,148 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB91_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s5, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s5, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s5, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s5, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s4, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s5, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s4, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s4, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s7, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s7, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s7, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s6, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s6, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s6, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s9, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s9, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s9, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s9, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s9, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s8, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s8, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s11, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s11, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s11, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s11, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s10, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s11, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s10, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s10, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s13, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s13, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s13, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s13, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s13, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s12, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s12, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s13, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s12, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s12, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s15, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s15, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s15, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s15, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s15, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s15, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s14, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s14, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s14, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s41, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s41, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s41, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s40, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s41, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s41, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s40, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s40, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s40, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s29, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s29, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s29, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s29, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s28, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s28, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s28, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[26:27], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[24:25], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16
; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 16
; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14
; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5
@@ -163604,8 +163610,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s41
; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
@@ -163614,691 +163620,682 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s29
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
; GFX11-FAKE16-NEXT: s_and_b32 s28, s15, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v49
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v1, v11 :: v_dual_add_nc_u32 v4, v6, v9
; GFX11-FAKE16-NEXT: s_lshl_b32 s15, s15, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v5
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s28
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v48
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v5, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s15, s14, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s14, s14, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v39
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v5
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v4, v11 :: v_dual_add_nc_u32 v5, v7, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v9, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v11, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s14, s13, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-FAKE16-NEXT: s_lshl_b32 s13, s13, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v6, v7
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v4, v11 :: v_dual_add_nc_u32 v6, v10, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v9, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v54, 16, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v52
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v3, 16, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v6
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v10, v12
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v6, v8, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v7, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v10, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s13
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v53
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-FAKE16-NEXT: s_and_b32 s13, s12, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s12, s12, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v12, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v11, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v6, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: s_and_b32 s12, s11, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
; GFX11-FAKE16-NEXT: s_lshl_b32 s11, s11, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v3
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v6, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v13, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v11, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v11
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v55
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 16, v1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v13, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 24, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v5, 16, v11
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s12
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v12, v14
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v8, v10, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v14 :: v_dual_add_nc_u32 v8, v9, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v12, v13
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s11
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v65
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v8, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v68, 16, v7
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v14, v12
; GFX11-FAKE16-NEXT: s_and_b32 s11, s10, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v66
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s10, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s10
-; GFX11-FAKE16-NEXT: s_and_b32 s10, s9, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v7, 16, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s10
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s11
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v65
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v13, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v15, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v8, v15, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: s_and_b32 s10, s9, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v70, 16, v7
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v10, v12, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v67
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v11, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-FAKE16-NEXT: s_and_b32 s9, s8, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s8, s8, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v11
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v10, v17, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v71, 16, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s8
-; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v13, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v69
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s9
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v9, 16, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s8
-; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v15, v16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v16, v14
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v17, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v12, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v12
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v10, v17, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v82, 16, v9
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v12, v14, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_and_b32 v9, 0xffff, v80
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v85, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v17
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v17
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v16, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s7, s6, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_bfe_u32 v17, v18, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s6, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v15
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v17, v12, v19 :: v_dual_add_nc_u32 v14, v18, v16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s6
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v16
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v12, v19 :: v_dual_add_nc_u32 v14, v17, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s6, s5, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v13, v13, v21 :: v_dual_add_nc_u32 v14, v16, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v17
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v15, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v17, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v15, v17
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s6
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s5
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v82, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v17
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v80
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v11, 16, v17
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v16, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v20, v21
; GFX11-FAKE16-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s5
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s4
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v81
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v85, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v83
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v19, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v21, v22
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v15
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v16, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v19, v20
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s4, s1, 0xffff0000
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v13, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v49
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v20, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v15
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v15, v16, v19
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-FAKE16-NEXT: s_and_b32 s1, s0, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v84
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v50, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v98, 16, v13
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v84
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v15
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v87
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v23, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v87, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v18, v20, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v21, v23
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000
-; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v13, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v22
; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v20, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v100, 16, v13
; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v96
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v23, v20
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v32, v99, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v21, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v23, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v97
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v18
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v18, v20, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v21, v23
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v51
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v101, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v99
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v13, 16, v14
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v102, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v103
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v114, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v112
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v98
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v117, 16, v13
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v113
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v39, v102, 16, v13
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v118, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v15
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v22
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v19 :: v_dual_add_nc_u32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v100
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v24, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v27, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v115
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v25, v19
+; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v26, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v21, vcc_lo
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v14, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v13
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v130, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v13
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v19
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v26
; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v19, 16, 1
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v101
-; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v22, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v19
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v22, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v15, v20
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v116
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v53
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v128
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v131, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v15, v19, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v20, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v112
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v179, v113, 16, v21
; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v14
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v134, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v178, v13, 16, v23
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v119
; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v14
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v103
-; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v15
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v116, 16, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v133, 16, v20
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v21, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v22, v15
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v23, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v22, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v25, v19
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v18
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 24, v181
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v26, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v181
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v15
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v22, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v115
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v21, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v86, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v21, v28, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v132
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v83
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v129
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v18
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v14, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v15
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v114
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v19, v14
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v165, v118, 16, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v145, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v13
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v14
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v23, v21
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v19, v24 :: v_dual_add_nc_u32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v27, v22
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x7fff, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v18
; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v22, v20
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v26, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v27, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v19, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v117
-; GFX11-FAKE16-NEXT: v_bfe_u32 v23, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v18
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v135
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v144
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v183, v149, 16, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v162, v129, 16, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v23, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v119
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v19, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v147, 16, v19
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v21, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v22, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v18, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v66
; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v28, v19, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v15
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v25, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v26, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v27, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v18, v21, v23 :: v_dual_add_nc_u32 v21, v27, v24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v23, v28, v19
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v29, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v27, v29
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v30, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v21, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27
+; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v26, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v29
-; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v30, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v13, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v15, 0x7fff, v15
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v18
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v26
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v27, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v29, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x7fff, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v27, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v26
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26
+; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v25, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v29, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v21, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v28, v33, v27
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v34, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, 0x400000, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v33, v35, v29
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v28
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v24, v24, v18
-; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v34, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v33, 0x7fff, v33
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v29
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v28, v36, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v29, v29
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v24, 0x7fff, v24
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v30, v30, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v21
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v33, v37, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v27
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v28, 0x7fff, v30
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v29
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v24, v35, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v128
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff, v134
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v28, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v130
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v131
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v167, v133, 16, v23
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v166, v19, 16, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v24
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff, v132
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v161, v15, 16, v28
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v146, v135, 16, v18
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v164, v14, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[180:181]
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v145, v21, 16, v24
+; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v27, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v29, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v18, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v28, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v22, v32 :: v_dual_add_nc_u32 v18, 0x7fff, v18
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v26, v26, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v21
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v27, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v68
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v26
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v18, v29, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v146
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v148
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v160
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v22, v26, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v151
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v97, 16, v11
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v163, 16, v20
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v182, v162, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v161
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v177, v165, 16, v14
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v55, 16, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v81, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v176, v166, 16, v15
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v164, 16, v18
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v150, 16, v13
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v67, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[45:46]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[176:177]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[43:44]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[180:181]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[37:38]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[166:167]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[178:179]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[182:183]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[30:31]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[161:162]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[38:39]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[25:26]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[40:41]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[23:24]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v180
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v179
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v177
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v181
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 8, v180
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v183
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v41
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v43
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[145:146]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[164:165]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[31:32]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v46
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v46
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v45
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v44
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v44
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 24, v146
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 8, v146
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v145
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 8, v145
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 24, v167
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 8, v167
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v166
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 8, v166
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v162
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v161
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v161
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v165
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v165
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v164
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v164
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v178
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v178
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 24, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 16, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v26
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v25
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 24, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v176
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v182
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v30
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v17
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v12
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v11
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 24, v10
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v9
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v5
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
; GFX11-FAKE16-NEXT: s_branch .LBB91_5
; GFX11-FAKE16-NEXT: .LBB91_3:
@@ -164320,46 +164317,46 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
@@ -164440,289 +164437,286 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43
; GFX11-FAKE16-NEXT: s_branch .LBB91_2
; GFX11-FAKE16-NEXT: .LBB91_4:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s2 :: v_dual_mov_b32 v97, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v103, s1
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v50, s41
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s26 :: v_dual_mov_b32 v131, s27
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v134, s24 :: v_dual_mov_b32 v117, s23
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v135, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s11 :: v_dual_mov_b32 v160, s26
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v151, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s24 :: v_dual_mov_b32 v146, s25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v48, s29
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v128, s25 :: v_dual_mov_b32 v119, s20
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v130, s22 :: v_dual_mov_b32 v115, s18
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v133, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v148, s22 :: v_dual_mov_b32 v135, s23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s20 :: v_dual_mov_b32 v129, s21
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s21 :: v_dual_mov_b32 v103, s19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s16 :: v_dual_mov_b32 v101, s17
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s13 :: v_dual_mov_b32 v132, s18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v119, s19 :: v_dual_mov_b32 v128, s16
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v129, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s2 :: v_dual_mov_b32 v164, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v98, s3 :: v_dual_mov_b32 v83, s6
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s1 :: v_dual_mov_b32 v81, s7
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s17 :: v_dual_mov_b32 v113, s3
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s4 :: v_dual_mov_b32 v96, s5
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s4 :: v_dual_mov_b32 v69, s10
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s5 :: v_dual_mov_b32 v67, s11
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s6 :: v_dual_mov_b32 v84, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s8 :: v_dual_mov_b32 v80, s10
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v116, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s8 :: v_dual_mov_b32 v65, s13
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v70, s9 :: v_dual_mov_b32 v55, s14
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v113, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s9 :: v_dual_mov_b32 v68, s12
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v101, s99 :: v_dual_mov_b32 v98, s98
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s12 :: v_dual_mov_b32 v53, s15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s40 :: v_dual_mov_b32 v49, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s102 :: v_dual_mov_b32 v86, s97
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s101 :: v_dual_mov_b32 v82, s96
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v102, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s97 :: v_dual_mov_b32 v82, s99
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s98 :: v_dual_mov_b32 v68, s101
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v99, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s100 :: v_dual_mov_b32 v70, s87
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s14 :: v_dual_mov_b32 v67, s86
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s100 :: v_dual_mov_b32 v64, s102
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s103 :: v_dual_mov_b32 v51, s104
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v53, s40
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s85 :: v_dual_mov_b32 v55, s84
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v146, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s86 :: v_dual_mov_b32 v16, s84
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s71 :: v_dual_mov_b32 v32, s81
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s41 :: v_dual_mov_b32 v52, s83
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v102, s104 :: v_dual_mov_b32 v49, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s82 :: v_dual_mov_b32 v133, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s82 :: v_dual_mov_b32 v12, s70
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s80 :: v_dual_mov_b32 v38, s55
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v48, s81
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s80 :: v_dual_mov_b32 v23, s65
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v144, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v134, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s67 :: v_dual_mov_b32 v10, s66
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s69 :: v_dual_mov_b32 v164, s65
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v37, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s71 :: v_dual_mov_b32 v17, s67
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s69 :: v_dual_mov_b32 v24, s54
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v131, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s68 :: v_dual_mov_b32 v8, s54
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s64 :: v_dual_mov_b32 v178, s53
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v100, s103
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s64 :: v_dual_mov_b32 v9, s66
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s51 :: v_dual_mov_b32 v7, s55
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v130, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s51 :: v_dual_mov_b32 v176, s39
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s52 :: v_dual_mov_b32 v6, s50
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v148, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s53 :: v_dual_mov_b32 v31, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s50 :: v_dual_mov_b32 v5, s52
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s49 :: v_dual_mov_b32 v40, s48
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v180, s35 :: v_dual_mov_b32 v179, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s37 :: v_dual_mov_b32 v6, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v43, s49 :: v_dual_mov_b32 v38, s36
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v117, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v46, s37 :: v_dual_mov_b32 v43, vcc_hi
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v44, s36 :: v_dual_mov_b32 v23, s62
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s35 :: v_dual_mov_b32 v44, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v45, vcc_hi :: v_dual_mov_b32 v4, s34
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v114, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v4, s34 :: v_dual_mov_b32 v27, s72
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v28, s60 :: v_dual_mov_b32 v29, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s62 :: v_dual_mov_b32 v26, s72
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s60 :: v_dual_mov_b32 v28, s58
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s56 :: v_dual_mov_b32 v34, s46
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s44 :: v_dual_mov_b32 v36, s42
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s44 :: v_dual_mov_b32 v35, s42
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s74 :: v_dual_mov_b32 v14, s76
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v19, s88
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v160, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v21, s92
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s94
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, s30
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v151, s0
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s30 :: v_dual_mov_b32 v178, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v26, s96
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v22, s87
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v24, s83
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s85 :: v_dual_mov_b32 v177, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s68
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s70
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v177, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0
; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0
-; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0
; GFX11-FAKE16-NEXT: .LBB91_5: ; %end
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v72, v36, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v97, v73, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v97, v99, v62, 0xc0c0004
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_perm_b32 v99, v96, v63, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v61, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v117, v35, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v112, v73, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v114, v63, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v130, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v103, v72, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v96, v102, v60, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v100, v58, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v97, 16, v97
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v98, v59, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v58, 16, v96
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v96, v36, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v57, v34, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, v100, v35
-; GFX11-FAKE16-NEXT: v_perm_b32 v34, v112, v56, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v35, v113, v47, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v33, v42, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v114, v118, v62, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v112
+; GFX11-FAKE16-NEXT: v_perm_b32 v115, v115, v60, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, v35, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v134, v33, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v113, v61, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v130, 16, v114
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v113, v103, v117
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, v115, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v33, v128, v59, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v34, v131, v58, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v116, v183, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v97, v99, v97
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, v102, v58
-; GFX11-FAKE16-NEXT: v_perm_b32 v36, v101, v45, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v33
-; GFX11-FAKE16-NEXT: v_perm_b32 v103, v103, v182, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v100, 16, v100
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v34, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v177, v29, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v101, v115, v181, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v36, v35
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v103, v100
-; GFX11-FAKE16-NEXT: v_perm_b32 v100, v119, v166, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v163, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v32, v147, v32, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v133, v56, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v118, v130
+; GFX11-FAKE16-NEXT: v_perm_b32 v35, v116, v57, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v132, v46, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v32
+; GFX11-FAKE16-NEXT: v_perm_b32 v118, v119, v47, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v33, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v150, v28, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v145, v42, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v35, v34
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v116, v117
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v118, v103
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v144, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v162, v27, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v101, v102
-; GFX11-FAKE16-NEXT: v_perm_b32 v102, v130, v162, 0xc0c0004
-; GFX11-FAKE16-NEXT: s_clause 0x1
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[96:99], off
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off offset:16
+; GFX11-FAKE16-NEXT: v_perm_b32 v116, v129, v183, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v100, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v129, v160, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v150, v27, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v146, v23, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v102, v28
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v117, v151, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v178, v21, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v118, v167, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v96, v134, v148, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v67, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v117, v148, v182, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v98, v132, v145, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v28, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v2, v135, v144, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v55, v5, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v164, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v103, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v149, v181, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v116, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v164, v26, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v163, v179, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v66, v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v81, v20, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v39, v19, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v101, v114, v165, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v96, v96, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v51, v43, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, v98, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v131, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v85, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v117, v27
+; GFX11-FAKE16-NEXT: v_perm_b32 v27, v135, v180, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v66, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v103, v161, v178, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v166, v25, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26
+; GFX11-FAKE16-NEXT: v_perm_b32 v112, v146, v177, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v1, v50, v1, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v68, v7, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v68, v161, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v69, v9, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v32, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v70, v31, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v80, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v97, v18, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v101, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v133, v149, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v48, v4, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, v23, v2
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v54, v180, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v25
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v27, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v103, v26
+; GFX11-FAKE16-NEXT: v_perm_b32 v2, v165, v167, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v112, v28
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v151, v36, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v36, v48, v45, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v49, v44, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v20
; GFX11-FAKE16-NEXT: v_perm_b32 v8, v65, v8, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v71, v38, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v80, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v82, v30, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v83, v11, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v82, v31, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v97, v128, v147, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v1, v46, v1, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v41, v3, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v27, v64, v176, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v50, v179, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v67, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v55, v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v48, v1
+; GFX11-FAKE16-NEXT: v_perm_b32 v48, v52, v41, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v37, v64, v37, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v69, v10, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v18
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v30, v14, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v100, v14, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v85, v25, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v26, v13, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v87, v24, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v97, v97, v29
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v49, v44, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v52, v40, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v102, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v101, v29, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v113, v160, v176, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v39, v53, v43, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v53, v6, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v12, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v23
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v28, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v36
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v51, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v48
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v54, v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v71, v12, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v83, v16, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v87, v16, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v81, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v84, v17, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v86, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v99, v22, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v84, v15, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v96, v15, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v28, v1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v29, v3
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v27
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v113, v114
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v39, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v36
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v37
; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v17, v19
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v22
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v23, v20
; GFX11-FAKE16-NEXT: s_clause 0x5
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[33:36], off offset:32
-; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[96:99], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:48
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80
; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index 74626bd38f582..ef584301602e2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -85850,44 +85850,44 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: ; implicit-def: $vgpr28
-; GFX9-NEXT: ; implicit-def: $vgpr53
+; GFX9-NEXT: ; implicit-def: $vgpr63
; GFX9-NEXT: ; implicit-def: $vgpr24
; GFX9-NEXT: ; implicit-def: $vgpr29
-; GFX9-NEXT: ; implicit-def: $vgpr57
-; GFX9-NEXT: ; implicit-def: $vgpr52
+; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr53
; GFX9-NEXT: ; implicit-def: $vgpr30
-; GFX9-NEXT: ; implicit-def: $vgpr51
+; GFX9-NEXT: ; implicit-def: $vgpr60
; GFX9-NEXT: ; implicit-def: $vgpr21
; GFX9-NEXT: ; implicit-def: $vgpr31
-; GFX9-NEXT: ; implicit-def: $vgpr46
-; GFX9-NEXT: ; implicit-def: $vgpr50
+; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr52
; GFX9-NEXT: ; implicit-def: $vgpr32
-; GFX9-NEXT: ; implicit-def: $vgpr63
+; GFX9-NEXT: ; implicit-def: $vgpr47
; GFX9-NEXT: ; implicit-def: $vgpr33
-; GFX9-NEXT: ; implicit-def: $vgpr40
-; GFX9-NEXT: ; implicit-def: $vgpr62
+; GFX9-NEXT: ; implicit-def: $vgpr44
+; GFX9-NEXT: ; implicit-def: $vgpr51
; GFX9-NEXT: ; implicit-def: $vgpr34
-; GFX9-NEXT: ; implicit-def: $vgpr61
+; GFX9-NEXT: ; implicit-def: $vgpr43
; GFX9-NEXT: ; implicit-def: $vgpr35
-; GFX9-NEXT: ; implicit-def: $vgpr54
-; GFX9-NEXT: ; implicit-def: $vgpr60
+; GFX9-NEXT: ; implicit-def: $vgpr42
+; GFX9-NEXT: ; implicit-def: $vgpr50
; GFX9-NEXT: ; implicit-def: $vgpr36
-; GFX9-NEXT: ; implicit-def: $vgpr59
+; GFX9-NEXT: ; implicit-def: $vgpr41
; GFX9-NEXT: ; implicit-def: $vgpr37
-; GFX9-NEXT: ; implicit-def: $vgpr58
+; GFX9-NEXT: ; implicit-def: $vgpr40
+; GFX9-NEXT: ; implicit-def: $vgpr62
; GFX9-NEXT: ; implicit-def: $vgpr38
-; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr55
; GFX9-NEXT: ; implicit-def: $vgpr39
-; GFX9-NEXT: ; implicit-def: $vgpr47
+; GFX9-NEXT: ; implicit-def: $vgpr54
+; GFX9-NEXT: ; implicit-def: $vgpr59
; GFX9-NEXT: ; implicit-def: $vgpr48
-; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr49
-; GFX9-NEXT: ; implicit-def: $vgpr44
-; GFX9-NEXT: ; implicit-def: $vgpr43
-; GFX9-NEXT: ; implicit-def: $vgpr42
-; GFX9-NEXT: ; implicit-def: $vgpr41
+; GFX9-NEXT: ; implicit-def: $vgpr57
+; GFX9-NEXT: ; implicit-def: $vgpr56
+; GFX9-NEXT: ; implicit-def: $vgpr46
; GFX9-NEXT: ; kill: killed $vgpr17
-; GFX9-NEXT: ; implicit-def: $vgpr55
+; GFX9-NEXT: ; implicit-def: $vgpr45
; GFX9-NEXT: ; implicit-def: $vgpr26
; GFX9-NEXT: ; implicit-def: $vgpr23
; GFX9-NEXT: ; implicit-def: $vgpr20
@@ -85900,52 +85900,52 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX9-NEXT: ; %bb.1: ; %cmp.false
; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13
; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v16
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v13
; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1
; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
@@ -85982,361 +85982,361 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX9-NEXT: v_add3_u32 v19, v19, v1, s6
; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: s_mov_b32 s7, 0x7060302
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v19, v20, vcc
-; GFX9-NEXT: v_perm_b32 v28, v1, v18, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4
-; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX9-NEXT: v_bfe_u32 v19, v1, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX9-NEXT: v_add3_u32 v19, v19, v1, s6
-; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v1
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX9-NEXT: v_cndmask_b32_e32 v1, v19, v20, vcc
-; GFX9-NEXT: v_bfe_u32 v19, v4, 16, 1
-; GFX9-NEXT: v_add3_u32 v19, v19, v4, s6
-; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v4
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
-; GFX9-NEXT: v_cndmask_b32_e32 v4, v19, v20, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v3
+; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v4
; GFX9-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
; GFX9-NEXT: v_add3_u32 v20, v20, v19, s6
; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v19
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
-; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc
-; GFX9-NEXT: v_bfe_u32 v20, v3, 16, 1
-; GFX9-NEXT: v_add3_u32 v20, v20, v3, s6
-; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v20, v21, vcc
-; GFX9-NEXT: v_perm_b32 v30, v3, v19, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v6
-; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX9-NEXT: v_bfe_u32 v20, v3, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX9-NEXT: v_add3_u32 v20, v20, v3, s6
-; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v20, v21, vcc
-; GFX9-NEXT: v_bfe_u32 v20, v6, 16, 1
-; GFX9-NEXT: v_add3_u32 v20, v20, v6, s6
-; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v6
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; GFX9-NEXT: v_cndmask_b32_e32 v6, v20, v21, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v5
+; GFX9-NEXT: v_bfe_u32 v20, v4, 16, 1
+; GFX9-NEXT: v_add3_u32 v20, v20, v4, s6
+; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v4
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
+; GFX9-NEXT: v_cndmask_b32_e32 v4, v20, v21, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v3
; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
+; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6
; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20
-; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX9-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc
-; GFX9-NEXT: v_bfe_u32 v21, v5, 16, 1
-; GFX9-NEXT: v_add3_u32 v21, v21, v5, s6
-; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v21, v22, vcc
-; GFX9-NEXT: v_perm_b32 v32, v5, v20, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v8
-; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX9-NEXT: v_bfe_u32 v21, v5, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX9-NEXT: v_add3_u32 v21, v21, v5, s6
-; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v21, v22, vcc
-; GFX9-NEXT: v_bfe_u32 v21, v8, 16, 1
-; GFX9-NEXT: v_add3_u32 v21, v21, v8, s6
-; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v8
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
-; GFX9-NEXT: v_cndmask_b32_e32 v8, v21, v22, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v7
+; GFX9-NEXT: v_bfe_u32 v21, v3, 16, 1
+; GFX9-NEXT: v_add3_u32 v21, v21, v3, s6
+; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v3
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v21, v22, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v6
; GFX9-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; GFX9-NEXT: v_bfe_u32 v22, v21, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
+; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; GFX9-NEXT: v_add3_u32 v22, v22, v21, s6
; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v21
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
-; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; GFX9-NEXT: v_cndmask_b32_e32 v21, v22, v23, vcc
-; GFX9-NEXT: v_bfe_u32 v22, v7, 16, 1
-; GFX9-NEXT: v_add3_u32 v22, v22, v7, s6
-; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v22, v23, vcc
-; GFX9-NEXT: v_perm_b32 v34, v7, v21, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v10
-; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX9-NEXT: v_bfe_u32 v22, v7, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX9-NEXT: v_add3_u32 v22, v22, v7, s6
-; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v7
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
-; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX9-NEXT: v_cndmask_b32_e32 v7, v22, v23, vcc
-; GFX9-NEXT: v_bfe_u32 v22, v10, 16, 1
-; GFX9-NEXT: v_add3_u32 v22, v22, v10, s6
-; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v10
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10
-; GFX9-NEXT: v_cndmask_b32_e32 v10, v22, v23, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v9
+; GFX9-NEXT: v_bfe_u32 v22, v6, 16, 1
+; GFX9-NEXT: v_add3_u32 v22, v22, v6, s6
+; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v6
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v22, v23, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v5
; GFX9-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; GFX9-NEXT: v_bfe_u32 v23, v22, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
; GFX9-NEXT: v_add3_u32 v23, v23, v22, s6
; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v22
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v22, v22
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; GFX9-NEXT: v_cndmask_b32_e32 v22, v23, v24, vcc
-; GFX9-NEXT: v_bfe_u32 v23, v9, 16, 1
-; GFX9-NEXT: v_add3_u32 v23, v23, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v23, v24, vcc
-; GFX9-NEXT: v_perm_b32 v36, v9, v22, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v12
-; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX9-NEXT: v_bfe_u32 v23, v9, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX9-NEXT: v_add3_u32 v23, v23, v9, s6
-; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v9
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
-; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX9-NEXT: v_cndmask_b32_e32 v9, v23, v24, vcc
-; GFX9-NEXT: v_bfe_u32 v23, v12, 16, 1
-; GFX9-NEXT: v_add3_u32 v23, v23, v12, s6
-; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v12
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12
-; GFX9-NEXT: v_cndmask_b32_e32 v12, v23, v24, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v11
+; GFX9-NEXT: v_bfe_u32 v23, v5, 16, 1
+; GFX9-NEXT: v_add3_u32 v23, v23, v5, s6
+; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v5
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
+; GFX9-NEXT: v_cndmask_b32_e32 v5, v23, v24, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v8
; GFX9-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
; GFX9-NEXT: v_bfe_u32 v24, v23, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; GFX9-NEXT: v_add3_u32 v24, v24, v23, s6
; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v23
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
-; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; GFX9-NEXT: v_cndmask_b32_e32 v23, v24, v25, vcc
-; GFX9-NEXT: v_bfe_u32 v24, v11, 16, 1
-; GFX9-NEXT: v_add3_u32 v24, v24, v11, s6
-; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v24, v25, vcc
-; GFX9-NEXT: v_perm_b32 v38, v11, v23, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v14
-; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX9-NEXT: v_bfe_u32 v24, v11, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX9-NEXT: v_add3_u32 v24, v24, v11, s6
-; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v11
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX9-NEXT: v_cndmask_b32_e32 v11, v24, v25, vcc
-; GFX9-NEXT: v_bfe_u32 v24, v14, 16, 1
-; GFX9-NEXT: v_add3_u32 v24, v24, v14, s6
-; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v14
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
-; GFX9-NEXT: v_cndmask_b32_e32 v14, v24, v25, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v13
+; GFX9-NEXT: v_bfe_u32 v24, v8, 16, 1
+; GFX9-NEXT: v_add3_u32 v24, v24, v8, s6
+; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v8
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; GFX9-NEXT: v_cndmask_b32_e32 v8, v24, v25, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v7
; GFX9-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
; GFX9-NEXT: v_bfe_u32 v25, v24, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; GFX9-NEXT: v_add3_u32 v25, v25, v24, s6
; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v24
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v24, v24
-; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; GFX9-NEXT: v_cndmask_b32_e32 v24, v25, v26, vcc
-; GFX9-NEXT: v_bfe_u32 v25, v13, 16, 1
-; GFX9-NEXT: v_add3_u32 v25, v25, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v13
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v25, v26, vcc
-; GFX9-NEXT: v_perm_b32 v48, v13, v24, s7
-; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v16
-; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX9-NEXT: v_bfe_u32 v25, v13, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX9-NEXT: v_add3_u32 v25, v25, v13, s6
-; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v13
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
-; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v13, v25, v26, vcc
-; GFX9-NEXT: v_bfe_u32 v25, v16, 16, 1
-; GFX9-NEXT: v_add3_u32 v25, v25, v16, s6
-; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v16
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
-; GFX9-NEXT: v_cndmask_b32_e32 v16, v25, v26, vcc
-; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v15
+; GFX9-NEXT: v_bfe_u32 v25, v7, 16, 1
+; GFX9-NEXT: v_add3_u32 v25, v25, v7, s6
+; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v7
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v25, v26, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v10
; GFX9-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; GFX9-NEXT: v_bfe_u32 v26, v25, 16, 1
-; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
; GFX9-NEXT: v_add3_u32 v26, v26, v25, s6
; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v25
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v25, v25
-; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; GFX9-NEXT: v_cndmask_b32_e32 v25, v26, v27, vcc
-; GFX9-NEXT: v_bfe_u32 v26, v15, 16, 1
-; GFX9-NEXT: v_add3_u32 v26, v26, v15, s6
-; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v15
+; GFX9-NEXT: v_bfe_u32 v26, v10, 16, 1
+; GFX9-NEXT: v_add3_u32 v26, v26, v10, s6
+; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v10
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10
+; GFX9-NEXT: v_cndmask_b32_e32 v10, v26, v27, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v9
+; GFX9-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; GFX9-NEXT: v_bfe_u32 v27, v26, 16, 1
+; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
+; GFX9-NEXT: v_add3_u32 v27, v27, v26, s6
+; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v26
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v26, v26
+; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; GFX9-NEXT: v_cndmask_b32_e32 v26, v27, v36, vcc
+; GFX9-NEXT: v_bfe_u32 v27, v9, 16, 1
+; GFX9-NEXT: v_add3_u32 v27, v27, v9, s6
+; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v9
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
+; GFX9-NEXT: v_cndmask_b32_e32 v9, v27, v36, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v12
+; GFX9-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
+; GFX9-NEXT: v_bfe_u32 v38, v27, 16, 1
+; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
+; GFX9-NEXT: v_add3_u32 v38, v38, v27, s6
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v27
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v27, v27
+; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; GFX9-NEXT: v_cndmask_b32_e32 v27, v38, v39, vcc
+; GFX9-NEXT: v_bfe_u32 v38, v12, 16, 1
+; GFX9-NEXT: v_add3_u32 v38, v38, v12, s6
+; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v12
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12
+; GFX9-NEXT: v_cndmask_b32_e32 v12, v38, v39, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v38, 16, v11
+; GFX9-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
+; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
+; GFX9-NEXT: v_bfe_u32 v48, v38, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; GFX9-NEXT: v_add3_u32 v48, v48, v38, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v38
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v38, v38
+; GFX9-NEXT: v_bfe_u32 v38, v11, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v52, v48, v49, vcc
+; GFX9-NEXT: v_add3_u32 v38, v38, v11, s6
+; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v11
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
+; GFX9-NEXT: v_cndmask_b32_e32 v11, v38, v48, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v14
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v50, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v14, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v53, v49, v50, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v14, s6
+; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v14
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
+; GFX9-NEXT: v_cndmask_b32_e32 v14, v48, v49, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v13
+; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48
+; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; GFX9-NEXT: v_bfe_u32 v50, v48, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; GFX9-NEXT: v_add3_u32 v50, v50, v48, s6
+; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v48
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48
+; GFX9-NEXT: v_bfe_u32 v48, v13, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v54, v50, v51, vcc
+; GFX9-NEXT: v_add3_u32 v48, v48, v13, s6
+; GFX9-NEXT: v_or_b32_e32 v50, 0x400000, v13
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
+; GFX9-NEXT: v_cndmask_b32_e32 v13, v48, v50, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v16
+; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
+; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; GFX9-NEXT: v_bfe_u32 v51, v50, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; GFX9-NEXT: v_add3_u32 v51, v51, v50, s6
+; GFX9-NEXT: v_or_b32_e32 v55, 0x400000, v50
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50
+; GFX9-NEXT: v_bfe_u32 v50, v16, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v55, v51, v55, vcc
+; GFX9-NEXT: v_add3_u32 v50, v50, v16, s6
+; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v16
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
+; GFX9-NEXT: v_cndmask_b32_e32 v16, v50, v51, vcc
+; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v15
+; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50
+; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX9-NEXT: v_bfe_u32 v40, v50, 16, 1
+; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX9-NEXT: v_add3_u32 v40, v40, v50, s6
+; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v50
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50
+; GFX9-NEXT: v_bfe_u32 v50, v15, 16, 1
+; GFX9-NEXT: v_cndmask_b32_e32 v40, v40, v41, vcc
+; GFX9-NEXT: v_add3_u32 v50, v50, v15, s6
+; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v15
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
-; GFX9-NEXT: v_cndmask_b32_e32 v15, v26, v27, vcc
-; GFX9-NEXT: v_perm_b32 v51, v16, v13, s7
-; GFX9-NEXT: v_perm_b32 v50, v15, v25, s7
+; GFX9-NEXT: s_mov_b32 s7, 0x7060302
+; GFX9-NEXT: v_cndmask_b32_e32 v15, v50, v41, vcc
+; GFX9-NEXT: v_perm_b32 v51, v16, v55, s7
+; GFX9-NEXT: v_perm_b32 v50, v15, v40, s7
; GFX9-NEXT: v_perm_b32 v29, v2, v17, s7
-; GFX9-NEXT: v_perm_b32 v31, v4, v1, s7
-; GFX9-NEXT: v_perm_b32 v49, v14, v11, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v2
+; GFX9-NEXT: v_perm_b32 v28, v1, v18, s7
+; GFX9-NEXT: v_perm_b32 v49, v14, v53, s7
+; GFX9-NEXT: v_perm_b32 v48, v13, v54, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v17
+; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v18
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51]
-; GFX9-NEXT: v_perm_b32 v33, v6, v3, s7
-; GFX9-NEXT: v_perm_b32 v39, v12, v9, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v6
-; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v19
+; GFX9-NEXT: v_perm_b32 v31, v4, v19, s7
+; GFX9-NEXT: v_perm_b32 v39, v12, v27, s7
+; GFX9-NEXT: v_perm_b32 v38, v11, v52, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v19
; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[48:49]
-; GFX9-NEXT: v_perm_b32 v35, v8, v5, s7
-; GFX9-NEXT: v_perm_b32 v37, v10, v7, s7
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v16
-; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v13
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v12
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v8
-; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v20
+; GFX9-NEXT: v_perm_b32 v30, v3, v20, s7
+; GFX9-NEXT: v_perm_b32 v35, v8, v23, s7
+; GFX9-NEXT: v_perm_b32 v34, v7, v24, s7
+; GFX9-NEXT: v_perm_b32 v37, v10, v25, s7
+; GFX9-NEXT: v_perm_b32 v36, v9, v26, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3
+; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v20
; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[38:39]
-; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v24
-; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v9
-; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7
-; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v21
+; GFX9-NEXT: v_perm_b32 v33, v6, v21, s7
+; GFX9-NEXT: v_perm_b32 v32, v5, v22, s7
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v23
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7
+; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21
; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[36:37]
; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[34:35]
-; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v25
-; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v40
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v27
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10
+; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v22
; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[32:33]
; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[30:31]
; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[28:29]
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v51
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v50
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v49
+; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v55
+; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v53
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v50
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v49
; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v49
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v48
; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v48
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v39
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v39
; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v39
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38
; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v38
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v37
; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v37
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v36
; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v35
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v35
; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v35
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v34
; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v33
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v33
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33
-; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v32
; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v31
; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v30
; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v29
; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v29
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v28
; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v28
; GFX9-NEXT: .LBB108_4: ; %end
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v22, v53, v24, s4
+; GFX9-NEXT: v_perm_b32 v22, v63, v24, s4
; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1
; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; GFX9-NEXT: v_perm_b32 v1, v57, v52, s4
+; GFX9-NEXT: v_perm_b32 v1, v61, v53, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2
-; GFX9-NEXT: v_perm_b32 v21, v51, v21, s4
+; GFX9-NEXT: v_perm_b32 v21, v60, v21, s4
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; GFX9-NEXT: v_perm_b32 v1, v3, v30, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; GFX9-NEXT: v_perm_b32 v1, v4, v31, s4
-; GFX9-NEXT: v_perm_b32 v2, v46, v50, s4
+; GFX9-NEXT: v_perm_b32 v2, v58, v52, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_perm_b32 v1, v5, v32, s4
-; GFX9-NEXT: v_perm_b32 v2, v63, v26, s4
+; GFX9-NEXT: v_perm_b32 v2, v47, v26, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; GFX9-NEXT: v_perm_b32 v1, v6, v33, s4
-; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v51, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; GFX9-NEXT: v_perm_b32 v1, v7, v34, s4
-; GFX9-NEXT: v_perm_b32 v2, v61, v23, s4
+; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_perm_b32 v1, v8, v35, s4
-; GFX9-NEXT: v_perm_b32 v2, v54, v60, s4
+; GFX9-NEXT: v_perm_b32 v2, v42, v50, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; GFX9-NEXT: v_perm_b32 v1, v9, v36, s4
-; GFX9-NEXT: v_perm_b32 v2, v59, v20, s4
+; GFX9-NEXT: v_perm_b32 v2, v41, v20, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v10, v37, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v58, s4
+; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; GFX9-NEXT: v_perm_b32 v1, v11, v38, s4
-; GFX9-NEXT: v_perm_b32 v2, v56, v19, s4
+; GFX9-NEXT: v_perm_b32 v2, v55, v19, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v12, v39, s4
-; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v47, s4
+; GFX9-NEXT: v_perm_b32 v2, v54, v59, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v13, v48, s4
-; GFX9-NEXT: v_perm_b32 v2, v45, v18, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v18, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT: v_perm_b32 v1, v14, v49, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v44, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v57, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v1, v15, v43, s4
-; GFX9-NEXT: v_perm_b32 v2, v42, v17, s4
+; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; GFX9-NEXT: v_perm_b32 v1, v15, v56, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v1, v16, v41, s4
+; GFX9-NEXT: v_perm_b32 v1, v16, v46, s4
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v2, v2, v55, s4
+; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -86390,18 +86390,18 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr27_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr115_hi16
@@ -86410,9 +86410,9 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr81_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_hi16
-; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr71_lo16
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16
; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_hi16
@@ -86430,15 +86430,15 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v14
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v13
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v12
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v11
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v10
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v9
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v8
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v8
@@ -86471,13 +86471,13 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v7.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v8.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v8.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.h, v9.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v9.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v9.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v10.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v10.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v98.h, v11.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v97.h, v11.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v11.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v12.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v71.h, v12.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v12.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.h, v13.l
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v13.h
@@ -86653,54 +86653,55 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v9
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v26, v2, v7 :: v_dual_lshlrev_b32 v9, 16, v13
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v66.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v26, v2, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v66.h
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v67.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 24, v24
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v24
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v23
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v25, v2, v6, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v68.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 8, v24
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 8, v23
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v82, v2, v3, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v81, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
-; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v8 :: v_dual_lshlrev_b32 v5, 16, v14
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v82.h
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v80, v1, v2 :: v_dual_lshlrev_b32 v1, 16, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v81.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v71, v1, v2, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v26
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 8, v26
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 8, v25
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v4, 0x40c00000, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v4, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v26
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 8, v26
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v3, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v71.h
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v27, v2, v3 :: v_dual_add_f32 v2, 0x40c00000, v4
; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
@@ -86710,74 +86711,75 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v28
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v98, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v97, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v8, v3, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v1, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v4, v5, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v16
-; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v97.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v99, v6, v7, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v98.h
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v28
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v99.h
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v32, v3, v4, vcc_lo
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v16
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
-; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v2, 0x7fff
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[27:28]
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[23:24]
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v115, v4, v6 :: v_dual_add_f32 v6, 0x40c00000, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v115, v4, v6, vcc_lo
+; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v5 :: v_dual_add_f32 v6, 0x40c00000, v8
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1
-; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
-; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
-; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v117, v2, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v115.h
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v117, v2, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[21:22]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[19:20]
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v118, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v33
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v33
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v33
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 8, v32
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 8, v28
+; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v27
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v118, v7, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v49, v4, v8, vcc_lo
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v117.h
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 8, v27
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v48, v2, v3, vcc_lo
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.l, v118.h
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v49
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 8, v49
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[48:49]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[32:33]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v48
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v48
; GFX11-TRUE16-NEXT: .LBB108_4: ; %end
; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v53.h
@@ -86814,11 +86816,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v23.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v66.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v24.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v82.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v81.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v25.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v68.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v26.h
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v98.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v97.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v27.h
; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v103, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v36, 0xc0c0004
@@ -86826,7 +86828,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v101, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v100, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v35, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v97, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v98, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v87, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v34, 0xc0c0004
@@ -86834,7 +86836,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v10, 16, v9
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v12, 16, v11
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v14, 16, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v80.h
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v71.h
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v28.h
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v11, v16, 16, v15
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v115.h
@@ -86850,8 +86852,8 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v84, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v30, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v83, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v81, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v80, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v29, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v69, 0xc0c0004
@@ -86872,53 +86874,53 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v17
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr25
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr24
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr27
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr28
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr23
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr29
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr22
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr22
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr21
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr21
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr20
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr20
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr19
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr55
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr19
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr18
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr32
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr51
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr18
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr31
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr17
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr30
-; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT: s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0
@@ -86932,45 +86934,45 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v13
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 24, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 24, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v3
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 8, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 24, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 8, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v1
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v1
; GFX11-FAKE16-NEXT: .LBB108_2: ; %Flow
; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -87000,342 +87002,349 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) {
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v2, 0x7fff
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v2, v21, v23 :: v_dual_lshlrev_b32 v21, 16, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v21, v23, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v19
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_perm_b32 v27, v2, v1, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_add_f32 v18, 0x40c00000, v21 :: v_dual_lshlrev_b32 v21, 16, v3
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v17, v22, v17, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v20, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v18, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v26, v19, v17, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v4, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v20, v18, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v18
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v24, 0x40c00000, v3 :: v_dual_add_f32 v21, 0x40c00000, v21
+; GFX11-FAKE16-NEXT: v_bfe_u32 v28, v20, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
+; GFX11-FAKE16-NEXT: v_add3_u32 v19, v19, v21, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v21, v28, v20, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v19, v23, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v19, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v6
+; GFX11-FAKE16-NEXT: v_add3_u32 v19, v19, v24, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v18, v17, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v17
-; GFX11-FAKE16-NEXT: v_add3_u32 v19, v19, v4, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v22, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v4
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v26
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v19, v23 :: v_dual_lshlrev_b32 v23, 16, v6
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; GFX11-FAKE16-NEXT: v_add3_u32 v19, v24, v21, 0x7fff
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_perm_b32 v29, v4, v18, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v3, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v3
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v19, v19, v22 :: v_dual_lshlrev_b32 v22, 16, v5
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v4, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v22, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v20, v3, 0x7fff
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v18
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v20, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v29, v4, v3, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v4
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v20, v21, v22 :: v_dual_add_f32 v21, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v19, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v21
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_perm_b32 v28, v3, v19, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v20, v20, v21, 0x7fff
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v28
-; GFX11-FAKE16-NEXT: v_add3_u32 v3, v3, v6, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v20, v20, v23 :: v_dual_add_f32 v5, 0x40c00000, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v21, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; GFX11-FAKE16-NEXT: v_perm_b32 v28, v19, v20, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v19
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v22, v25 :: v_dual_add_f32 v6, 0x40c00000, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v6
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add3_u32 v6, v25, v22, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v22
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v24, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v5, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v5
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v5, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v6, v23, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v24, v6, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v24, v30 :: v_dual_and_b32 v5, 0xffff0000, v5
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_lshlrev_b32 v30, 16, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v23, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v23
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v97, v6, v21, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v31, v23, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v5
; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v86, v3, v20, 0x7060302
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v6
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v21, v25 :: v_dual_add_f32 v8, 0x40c00000, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v85, v5, v22, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v6, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v86
-; GFX11-FAKE16-NEXT: v_add3_u32 v5, v5, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v21, v24, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v5, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v24, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v30
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v97
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v22, v31, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v24, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v24
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add3_u32 v22, v22, v24, 0x7fff
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v8, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v96, v5, v23, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v23
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v22, v31, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v85
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v10
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v82, v5, v6, 0x7060302
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v23, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, 0x400000, v23
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v82
-; GFX11-FAKE16-NEXT: v_add3_u32 v8, v30, v23, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v23, v8, v24 :: v_dual_lshlrev_b32 v24, 16, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v25
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v24, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v7
; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v96
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v8, v30, v32 :: v_dual_add_f32 v25, 0x40c00000, v25
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v32, 16, v10
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v25, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v25
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v33, v25, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v25, v30, v31 :: v_dual_and_b32 v10, 0xffff0000, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v32
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v7
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v7, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v21, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v10
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_perm_b32 v81, v7, v23, 0x7060302
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v8, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v81
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v10, 0x40c00000, v10 :: v_dual_lshlrev_b32 v31, 16, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v24, v7, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v10, 16, 1
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_add3_u32 v7, v7, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v21, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v31
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v24, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v24, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v32, v10, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add3_u32 v24, v24, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_perm_b32 v85, v8, v22, 0x7060302
+; GFX11-FAKE16-NEXT: v_perm_b32 v84, v7, v25, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v24, v33, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_add3_u32 v10, v31, v24, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v24
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v30 :: v_dual_lshlrev_b32 v30, 16, v12
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v10, v32, v34 :: v_dual_and_b32 v9, 0xffff0000, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v31
; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_perm_b32 v70, v7, v8, 0x7060302
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v10, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v30
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v70
-; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v12, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v12, 0x7fff
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v21, v9, 0x7fff
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v21, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v69, v9, v24, 0x7060302
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v35, v31, 0x7fff
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v21
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v25, v10, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v31, 0x40c00000, v34 :: v_dual_add_f32 v12, 0x40c00000, v12
+; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v9
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v32, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v9, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v31
+; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v83, v10, v24, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v32, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v30, v35, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v11
; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v69
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v21, v25, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v33, v33, v12, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v32, v34, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_add_f32 v30, 0x40c00000, v30 :: v_dual_add_f32 v11, 0x40c00000, v11
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_add3_u32 v21, v32, v9, 0x7fff
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v30, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v14
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; GFX11-FAKE16-NEXT: v_perm_b32 v65, v12, v10, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v21, v25, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v30
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
-; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_perm_b32 v82, v9, v38, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v83
+; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v30, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v33, v35 :: v_dual_lshlrev_b32 v33, 16, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v11, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add3_u32 v31, v36, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v69, v12, v37, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v82
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v31, v32, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v31, v34, v11, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v11
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v21, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v65
-; GFX11-FAKE16-NEXT: v_add3_u32 v25, v31, v11, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v25, v30, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v25, 0x40c00000, v31
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v32, v21, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v14, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v25, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v25
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v30, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v30, v32, v14, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v14
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v33
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v30, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v33
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v30
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
+; GFX11-FAKE16-NEXT: v_perm_b32 v68, v11, v36, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v34, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v33, v32, v33 :: v_dual_and_b32 v14, 0xffff0000, v14
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v14, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v14
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-FAKE16-NEXT: v_add3_u32 v32, v33, v25, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v33, 16, v16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v30, v31, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_add3_u32 v30, v34, v14, 0x7fff
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v30, v32, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v31
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v33
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; GFX11-FAKE16-NEXT: v_perm_b32 v64, v11, v9, 0x7060302
-; GFX11-FAKE16-NEXT: v_perm_b32 v52, v14, v21, 0x7060302
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v25, v32, v34 :: v_dual_lshlrev_b32 v34, 16, v15
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_perm_b32 v65, v14, v33, 0x7060302
+; GFX11-FAKE16-NEXT: v_add3_u32 v34, v35, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v35, 16, v16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v65
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v34, v34, v39 :: v_dual_add_f32 v13, 0x40c00000, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v35
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v39, 16, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v13, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v13
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v30, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; GFX11-FAKE16-NEXT: v_add3_u32 v31, v35, v13, 0x7fff
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v24
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v30, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; GFX11-FAKE16-NEXT: v_add3_u32 v31, v48, v13, 0x7fff
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v15
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v31, v32, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v34
-; GFX11-FAKE16-NEXT: v_add3_u32 v32, v33, v30, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v39
+; GFX11-FAKE16-NEXT: v_add3_u32 v32, v35, v30, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v30
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30
-; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v31, 16, 1
; GFX11-FAKE16-NEXT: v_bfe_u32 v30, v15, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, 0x400000, v31
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v15
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v32, v33, vcc_lo
-; GFX11-FAKE16-NEXT: v_add3_u32 v33, v34, v16, 0x7fff
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, 0x400000, v16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
-; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v31, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v31
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v32, v35, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_add3_u32 v30, v30, v15, 0x7fff
-; GFX11-FAKE16-NEXT: v_perm_b32 v51, v13, v25, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v25
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v33, v34, vcc_lo
+; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v31, 0x7fff
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; GFX11-FAKE16-NEXT: v_perm_b32 v64, v13, v34, 0x7060302
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v64
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v16, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16
+; GFX11-FAKE16-NEXT: v_add3_u32 v35, v39, v16, 0x7fff
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v35, v39, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v23
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v51
-; GFX11-FAKE16-NEXT: v_perm_b32 v39, v16, v32, 0x7060302
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v35, v36, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v48, v49, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v5
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v22
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v39
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 8, v39
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v30, v37, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v25
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v30, v50, vcc_lo
+; GFX11-FAKE16-NEXT: v_perm_b32 v51, v16, v32, 0x7060302
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v16
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v38, v15, v31, 0x7060302
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[38:39]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[51:52]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[64:65]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v21
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[69:70]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[81:82]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[85:86]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX11-FAKE16-NEXT: v_perm_b32 v50, v15, v35, 0x7060302
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v33
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v34
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v12
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[64:65]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[68:69]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[82:83]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v37
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v38
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v22
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[84:85]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[96:97]
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v35
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v36
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v24
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[28:29]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[24:25], 24, v[26:27]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v38
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v51
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 24, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v64
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v64
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v70
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v69
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v82
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v86
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v29
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 8, v51
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 8, v50
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 24, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v85
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v97
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 8, v29
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 8, v28
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 24, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 8, v27
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 8, v26
; GFX11-FAKE16-NEXT: .LBB108_4: ; %end
; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v25, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v97, v24, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v85, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v81, v24, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v55, v22, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v28, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v87, v23, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v64, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v55, v19, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v81, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v80, v21, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v69, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v68, v20, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v67, v23, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v68, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v35, v19, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v84, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v49, v21, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v80, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v37, v20, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v27, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v25, v66, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v25, v71, v97, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v24, 16, v1
; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v29, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v24, v54, v86, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v26, v50, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v24, v66, v96, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v86, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v26, v52, v85, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v22, 16, v5
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v71, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v36, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v83, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v38, v82, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v23, 16, v3
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v67, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v23, v33, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v70, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v23, v36, v69, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v19, 16, v11
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v53, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v32, v52, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v34, v64, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v21, 16, v7
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v20, 16, v9
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v51, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v49, v18, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v48, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v31, v39, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v38, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v37, v17, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v35, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v21, v30, v34, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v33, v18, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v32, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v50, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v31, v17, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v16, v48, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v21, v30, v39, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v25, 16, v2
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v24, 16, v4
; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v26, 16, v6
@@ -88838,46 +88847,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT: s_cbranch_scc0 .LBB109_3
; GFX9-NEXT: ; %bb.1: ; %cmp.false
-; GFX9-NEXT: s_lshr_b32 s34, s5, 24
-; GFX9-NEXT: s_lshr_b32 s55, s5, 16
-; GFX9-NEXT: s_lshr_b32 s37, s5, 8
-; GFX9-NEXT: s_lshr_b32 s39, s4, 16
-; GFX9-NEXT: s_lshr_b32 s38, s4, 8
-; GFX9-NEXT: s_lshr_b32 s94, s29, 24
-; GFX9-NEXT: s_lshr_b32 s54, s29, 16
-; GFX9-NEXT: s_lshr_b32 s31, s29, 8
-; GFX9-NEXT: s_lshr_b32 s36, s28, 16
-; GFX9-NEXT: s_lshr_b32 s35, s28, 8
-; GFX9-NEXT: s_lshr_b32 s90, s27, 24
-; GFX9-NEXT: s_lshr_b32 s53, s27, 16
-; GFX9-NEXT: s_lshr_b32 s93, s27, 8
-; GFX9-NEXT: s_lshr_b32 s30, s26, 16
-; GFX9-NEXT: s_lshr_b32 s95, s26, 8
-; GFX9-NEXT: s_lshr_b32 s78, s25, 24
-; GFX9-NEXT: s_lshr_b32 s52, s25, 16
-; GFX9-NEXT: s_lshr_b32 s89, s25, 8
-; GFX9-NEXT: s_lshr_b32 s92, s24, 16
-; GFX9-NEXT: s_lshr_b32 s91, s24, 8
-; GFX9-NEXT: s_lshr_b32 s74, s23, 24
-; GFX9-NEXT: s_lshr_b32 s51, s23, 16
-; GFX9-NEXT: s_lshr_b32 s77, s23, 8
-; GFX9-NEXT: s_lshr_b32 s88, s22, 16
-; GFX9-NEXT: s_lshr_b32 s79, s22, 8
-; GFX9-NEXT: s_lshr_b32 s62, s21, 24
-; GFX9-NEXT: s_lshr_b32 s50, s21, 16
-; GFX9-NEXT: s_lshr_b32 s73, s21, 8
-; GFX9-NEXT: s_lshr_b32 s76, s20, 16
+; GFX9-NEXT: s_lshr_b32 s91, s5, 24
+; GFX9-NEXT: s_lshr_b32 s54, s5, 16
+; GFX9-NEXT: s_lshr_b32 s93, s5, 8
+; GFX9-NEXT: s_lshr_b32 s55, s4, 16
+; GFX9-NEXT: s_lshr_b32 s95, s4, 8
+; GFX9-NEXT: s_lshr_b32 s88, s29, 24
+; GFX9-NEXT: s_lshr_b32 s52, s29, 16
+; GFX9-NEXT: s_lshr_b32 s90, s29, 8
+; GFX9-NEXT: s_lshr_b32 s53, s28, 16
+; GFX9-NEXT: s_lshr_b32 s94, s28, 8
+; GFX9-NEXT: s_lshr_b32 s77, s27, 24
+; GFX9-NEXT: s_lshr_b32 s50, s27, 16
+; GFX9-NEXT: s_lshr_b32 s79, s27, 8
+; GFX9-NEXT: s_lshr_b32 s51, s26, 16
+; GFX9-NEXT: s_lshr_b32 s92, s26, 8
+; GFX9-NEXT: s_lshr_b32 s74, s25, 24
+; GFX9-NEXT: s_lshr_b32 s48, s25, 16
+; GFX9-NEXT: s_lshr_b32 s76, s25, 8
+; GFX9-NEXT: s_lshr_b32 s49, s24, 16
+; GFX9-NEXT: s_lshr_b32 s89, s24, 8
+; GFX9-NEXT: s_lshr_b32 s63, s23, 24
+; GFX9-NEXT: s_lshr_b32 s38, s23, 16
+; GFX9-NEXT: s_lshr_b32 s73, s23, 8
+; GFX9-NEXT: s_lshr_b32 s39, s22, 16
+; GFX9-NEXT: s_lshr_b32 s78, s22, 8
+; GFX9-NEXT: s_lshr_b32 s60, s21, 24
+; GFX9-NEXT: s_lshr_b32 s36, s21, 16
+; GFX9-NEXT: s_lshr_b32 s62, s21, 8
+; GFX9-NEXT: s_lshr_b32 s37, s20, 16
; GFX9-NEXT: s_lshr_b32 s75, s20, 8
; GFX9-NEXT: s_lshr_b32 s58, s19, 24
-; GFX9-NEXT: s_lshr_b32 s49, s19, 16
-; GFX9-NEXT: s_lshr_b32 s61, s19, 8
-; GFX9-NEXT: s_lshr_b32 s72, s18, 16
-; GFX9-NEXT: s_lshr_b32 s63, s18, 8
+; GFX9-NEXT: s_lshr_b32 s34, s19, 16
+; GFX9-NEXT: s_lshr_b32 s59, s19, 8
+; GFX9-NEXT: s_lshr_b32 s35, s18, 16
+; GFX9-NEXT: s_lshr_b32 s72, s18, 8
; GFX9-NEXT: s_lshr_b32 s56, s17, 24
-; GFX9-NEXT: s_lshr_b32 s48, s17, 16
+; GFX9-NEXT: s_lshr_b32 s30, s17, 16
; GFX9-NEXT: s_lshr_b32 s57, s17, 8
-; GFX9-NEXT: s_lshr_b32 s60, s16, 16
-; GFX9-NEXT: s_lshr_b32 s59, s16, 8
+; GFX9-NEXT: s_lshr_b32 s31, s16, 16
+; GFX9-NEXT: s_lshr_b32 s61, s16, 8
; GFX9-NEXT: s_lshr_b64 s[44:45], s[4:5], 24
; GFX9-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
; GFX9-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
@@ -88918,20 +88927,20 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc
; GFX9-NEXT: s_lshl_b32 s6, s16, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v3, v3, v2
+; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc
-; GFX9-NEXT: v_add_f32_e32 v3, s6, v1
-; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v3
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
-; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v3
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v30
+; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v30
; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v3, v2, 16, v3
+; GFX9-NEXT: v_lshl_or_b32 v3, v31, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88940,7 +88949,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s19, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88948,30 +88957,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v31
+; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v32
; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v11, v28, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v11, v29, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s18, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v35
; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v10, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v10, v37, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -88988,8 +88997,8 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v29
+; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v28
; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000
; GFX9-NEXT: v_lshl_or_b32 v15, v27, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
@@ -88998,20 +89007,9 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: s_lshl_b32 s6, s20, 16
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v38
-; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v5
+; GFX9-NEXT: s_lshl_b32 s6, s20, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89019,8 +89017,10 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: s_lshl_b32 s6, s23, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v50
+; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000
+; GFX9-NEXT: v_lshl_or_b32 v14, v36, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89028,30 +89028,39 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
+; GFX9-NEXT: s_lshl_b32 s6, s23, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v33
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v34
; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v20, v32, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v20, v33, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s22, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v36
+; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v48
; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v19, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v19, v38, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89060,7 +89069,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s25, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89068,30 +89077,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v37
+; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v49
; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v22, v35, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v22, v39, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s24, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v48
+; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v53
; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v21, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v21, v51, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89100,7 +89109,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s27, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89108,30 +89117,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v49
+; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v54
; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v24, v39, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v24, v52, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s26, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v51
+; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v41
; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v23, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v23, v55, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89140,7 +89149,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s29, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89148,30 +89157,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v52
+; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v42
; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v26, v50, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v26, v40, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s6, s28, 16
+; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2
+; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
+; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
+; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
+; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
+; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_add_f32_e32 v5, s6, v1
-; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v6, v6, v5
-; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6
-; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5
-; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
-; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v5
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v54
+; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v45
; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v25, v2, 16, v5
+; GFX9-NEXT: v_lshl_or_b32 v25, v43, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s6, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89180,7 +89189,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
; GFX9-NEXT: s_lshl_b32 s5, s5, 16
-; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
@@ -89188,178 +89197,170 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v55
+; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v2
+; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v46
; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000
-; GFX9-NEXT: v_lshl_or_b32 v42, v53, 16, v2
+; GFX9-NEXT: v_lshl_or_b32 v58, v44, 16, v2
; GFX9-NEXT: v_add_f32_e32 v2, s5, v1
; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX9-NEXT: v_add_u32_e32 v5, v5, v2
-; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
-; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc
-; GFX9-NEXT: v_bfe_u32 v5, v1, 16, 1
-; GFX9-NEXT: v_add_u32_e32 v5, v5, v1
-; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5
-; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1
+; GFX9-NEXT: v_add_f32_e32 v1, s4, v1
+; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v2
+; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1
+; GFX9-NEXT: v_add_u32_e32 v2, v2, v1
+; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2
+; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1
; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
-; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc
-; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v1
+; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc
+; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1
; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[25:26]
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v40
+; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v56
; GFX9-NEXT: v_lshrrev_b64 v[6:7], 24, v[23:24]
-; GFX9-NEXT: v_lshl_or_b32 v41, v2, 16, v1
+; GFX9-NEXT: v_lshl_or_b32 v57, v47, 16, v1
; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[21:22]
; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11]
-; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[41:42]
+; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[57:58]
; GFX9-NEXT: v_lshrrev_b64 v[8:9], 24, v[19:20]
; GFX9-NEXT: v_lshrrev_b64 v[12:13], 24, v[14:15]
; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
-; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v42
-; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v41
-; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v26
-; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v25
-; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v24
+; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v58
+; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v57
+; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v26
+; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v25
+; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v24
; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24
-; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v23
; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23
-; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v22
+; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v22
; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22
-; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v21
; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21
-; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v20
+; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v20
; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20
-; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v19
; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19
-; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v15
+; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v15
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v15
-; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v14
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v11
+; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v11
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11
-; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v10
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10
-; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4
-; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3
; GFX9-NEXT: s_branch .LBB109_5
; GFX9-NEXT: .LBB109_3:
-; GFX9-NEXT: ; implicit-def: $sgpr59
-; GFX9-NEXT: ; implicit-def: $sgpr60
+; GFX9-NEXT: ; implicit-def: $sgpr61
+; GFX9-NEXT: ; implicit-def: $sgpr31
; GFX9-NEXT: ; implicit-def: $sgpr6
; GFX9-NEXT: ; implicit-def: $sgpr57
-; GFX9-NEXT: ; implicit-def: $sgpr48
+; GFX9-NEXT: ; implicit-def: $sgpr30
; GFX9-NEXT: ; implicit-def: $sgpr56
-; GFX9-NEXT: ; implicit-def: $sgpr63
; GFX9-NEXT: ; implicit-def: $sgpr72
+; GFX9-NEXT: ; implicit-def: $sgpr35
; GFX9-NEXT: ; implicit-def: $sgpr8
-; GFX9-NEXT: ; implicit-def: $sgpr61
-; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr59
+; GFX9-NEXT: ; implicit-def: $sgpr34
; GFX9-NEXT: ; implicit-def: $sgpr58
; GFX9-NEXT: ; implicit-def: $sgpr75
-; GFX9-NEXT: ; implicit-def: $sgpr76
+; GFX9-NEXT: ; implicit-def: $sgpr37
; GFX9-NEXT: ; implicit-def: $sgpr10
-; GFX9-NEXT: ; implicit-def: $sgpr73
-; GFX9-NEXT: ; implicit-def: $sgpr50
; GFX9-NEXT: ; implicit-def: $sgpr62
-; GFX9-NEXT: ; implicit-def: $sgpr79
-; GFX9-NEXT: ; implicit-def: $sgpr88
+; GFX9-NEXT: ; implicit-def: $sgpr36
+; GFX9-NEXT: ; implicit-def: $sgpr60
+; GFX9-NEXT: ; implicit-def: $sgpr78
+; GFX9-NEXT: ; implicit-def: $sgpr39
; GFX9-NEXT: ; implicit-def: $sgpr12
-; GFX9-NEXT: ; implicit-def: $sgpr77
-; GFX9-NEXT: ; implicit-def: $sgpr51
+; GFX9-NEXT: ; implicit-def: $sgpr73
+; GFX9-NEXT: ; implicit-def: $sgpr38
+; GFX9-NEXT: ; implicit-def: $sgpr63
+; GFX9-NEXT: ; implicit-def: $sgpr89
+; GFX9-NEXT: ; implicit-def: $sgpr49
+; GFX9-NEXT: ; implicit-def: $sgpr14
+; GFX9-NEXT: ; implicit-def: $sgpr76
+; GFX9-NEXT: ; implicit-def: $sgpr48
; GFX9-NEXT: ; implicit-def: $sgpr74
-; GFX9-NEXT: ; implicit-def: $sgpr91
; GFX9-NEXT: ; implicit-def: $sgpr92
-; GFX9-NEXT: ; implicit-def: $sgpr14
-; GFX9-NEXT: ; implicit-def: $sgpr89
-; GFX9-NEXT: ; implicit-def: $sgpr52
-; GFX9-NEXT: ; implicit-def: $sgpr78
-; GFX9-NEXT: ; implicit-def: $sgpr95
-; GFX9-NEXT: ; implicit-def: $sgpr30
+; GFX9-NEXT: ; implicit-def: $sgpr51
; GFX9-NEXT: ; implicit-def: $sgpr40
-; GFX9-NEXT: ; implicit-def: $sgpr93
+; GFX9-NEXT: ; implicit-def: $sgpr79
+; GFX9-NEXT: ; implicit-def: $sgpr50
+; GFX9-NEXT: ; implicit-def: $sgpr77
+; GFX9-NEXT: ; implicit-def: $sgpr94
; GFX9-NEXT: ; implicit-def: $sgpr53
-; GFX9-NEXT: ; implicit-def: $sgpr90
-; GFX9-NEXT: ; implicit-def: $sgpr35
-; GFX9-NEXT: ; implicit-def: $sgpr36
; GFX9-NEXT: ; implicit-def: $sgpr42
-; GFX9-NEXT: ; implicit-def: $sgpr31
-; GFX9-NEXT: ; implicit-def: $sgpr54
-; GFX9-NEXT: ; implicit-def: $sgpr94
-; GFX9-NEXT: ; implicit-def: $sgpr38
-; GFX9-NEXT: ; implicit-def: $sgpr39
-; GFX9-NEXT: ; implicit-def: $sgpr44
-; GFX9-NEXT: ; implicit-def: $sgpr37
+; GFX9-NEXT: ; implicit-def: $sgpr90
+; GFX9-NEXT: ; implicit-def: $sgpr52
+; GFX9-NEXT: ; implicit-def: $sgpr88
+; GFX9-NEXT: ; implicit-def: $sgpr95
; GFX9-NEXT: ; implicit-def: $sgpr55
-; GFX9-NEXT: ; implicit-def: $sgpr34
+; GFX9-NEXT: ; implicit-def: $sgpr44
+; GFX9-NEXT: ; implicit-def: $sgpr93
+; GFX9-NEXT: ; implicit-def: $sgpr54
+; GFX9-NEXT: ; implicit-def: $sgpr91
; GFX9-NEXT: s_branch .LBB109_2
; GFX9-NEXT: .LBB109_4:
; GFX9-NEXT: v_mov_b32_e32 v1, s17
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v1, s48
-; GFX9-NEXT: v_mov_b32_e32 v40, s4
-; GFX9-NEXT: v_mov_b32_e32 v55, s5
-; GFX9-NEXT: v_mov_b32_e32 v53, s55
-; GFX9-NEXT: v_mov_b32_e32 v54, s28
-; GFX9-NEXT: v_mov_b32_e32 v52, s29
-; GFX9-NEXT: v_mov_b32_e32 v50, s54
-; GFX9-NEXT: v_mov_b32_e32 v51, s26
-; GFX9-NEXT: v_mov_b32_e32 v49, s27
-; GFX9-NEXT: v_mov_b32_e32 v39, s53
-; GFX9-NEXT: v_mov_b32_e32 v48, s24
-; GFX9-NEXT: v_mov_b32_e32 v37, s25
-; GFX9-NEXT: v_mov_b32_e32 v35, s52
-; GFX9-NEXT: v_mov_b32_e32 v36, s22
-; GFX9-NEXT: v_mov_b32_e32 v33, s23
-; GFX9-NEXT: v_mov_b32_e32 v32, s51
-; GFX9-NEXT: v_mov_b32_e32 v38, s20
-; GFX9-NEXT: v_mov_b32_e32 v29, s21
-; GFX9-NEXT: v_mov_b32_e32 v27, s50
-; GFX9-NEXT: v_mov_b32_e32 v34, s18
-; GFX9-NEXT: v_mov_b32_e32 v31, s19
-; GFX9-NEXT: v_mov_b32_e32 v28, s49
+; GFX9-NEXT: v_mov_b32_e32 v1, s30
+; GFX9-NEXT: v_mov_b32_e32 v56, s4
+; GFX9-NEXT: v_mov_b32_e32 v47, s55
+; GFX9-NEXT: v_mov_b32_e32 v46, s5
+; GFX9-NEXT: v_mov_b32_e32 v44, s54
+; GFX9-NEXT: v_mov_b32_e32 v45, s28
+; GFX9-NEXT: v_mov_b32_e32 v43, s53
+; GFX9-NEXT: v_mov_b32_e32 v42, s29
+; GFX9-NEXT: v_mov_b32_e32 v40, s52
+; GFX9-NEXT: v_mov_b32_e32 v41, s26
+; GFX9-NEXT: v_mov_b32_e32 v55, s51
+; GFX9-NEXT: v_mov_b32_e32 v54, s27
+; GFX9-NEXT: v_mov_b32_e32 v52, s50
+; GFX9-NEXT: v_mov_b32_e32 v53, s24
+; GFX9-NEXT: v_mov_b32_e32 v51, s49
+; GFX9-NEXT: v_mov_b32_e32 v49, s25
+; GFX9-NEXT: v_mov_b32_e32 v39, s48
+; GFX9-NEXT: v_mov_b32_e32 v48, s22
+; GFX9-NEXT: v_mov_b32_e32 v38, s39
+; GFX9-NEXT: v_mov_b32_e32 v34, s23
+; GFX9-NEXT: v_mov_b32_e32 v33, s38
+; GFX9-NEXT: v_mov_b32_e32 v50, s20
+; GFX9-NEXT: v_mov_b32_e32 v36, s37
+; GFX9-NEXT: v_mov_b32_e32 v28, s21
+; GFX9-NEXT: v_mov_b32_e32 v27, s36
+; GFX9-NEXT: v_mov_b32_e32 v35, s18
+; GFX9-NEXT: v_mov_b32_e32 v37, s35
+; GFX9-NEXT: v_mov_b32_e32 v32, s19
+; GFX9-NEXT: v_mov_b32_e32 v29, s34
; GFX9-NEXT: v_mov_b32_e32 v30, s16
+; GFX9-NEXT: v_mov_b32_e32 v31, s31
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; GFX9-NEXT: v_mov_b32_e32 v13, s39
-; GFX9-NEXT: v_mov_b32_e32 v18, s38
-; GFX9-NEXT: v_mov_b32_e32 v2, s34
-; GFX9-NEXT: v_mov_b32_e32 v9, s37
-; GFX9-NEXT: v_mov_b32_e32 v43, s36
-; GFX9-NEXT: v_mov_b32_e32 v44, s35
-; GFX9-NEXT: v_mov_b32_e32 v41, s94
-; GFX9-NEXT: v_mov_b32_e32 v42, s31
-; GFX9-NEXT: v_mov_b32_e32 v46, s30
-; GFX9-NEXT: v_mov_b32_e32 v23, s95
-; GFX9-NEXT: v_mov_b32_e32 v45, s90
-; GFX9-NEXT: v_mov_b32_e32 v24, s93
-; GFX9-NEXT: v_mov_b32_e32 v56, s92
-; GFX9-NEXT: v_mov_b32_e32 v21, s91
-; GFX9-NEXT: v_mov_b32_e32 v47, s78
-; GFX9-NEXT: v_mov_b32_e32 v22, s89
-; GFX9-NEXT: v_mov_b32_e32 v58, s88
-; GFX9-NEXT: v_mov_b32_e32 v19, s79
-; GFX9-NEXT: v_mov_b32_e32 v57, s74
-; GFX9-NEXT: v_mov_b32_e32 v20, s77
-; GFX9-NEXT: v_mov_b32_e32 v60, s76
+; GFX9-NEXT: v_mov_b32_e32 v13, s95
+; GFX9-NEXT: v_mov_b32_e32 v2, s91
+; GFX9-NEXT: v_mov_b32_e32 v9, s93
+; GFX9-NEXT: v_mov_b32_e32 v58, s94
+; GFX9-NEXT: v_mov_b32_e32 v18, s88
+; GFX9-NEXT: v_mov_b32_e32 v57, s90
+; GFX9-NEXT: v_mov_b32_e32 v23, s92
+; GFX9-NEXT: v_mov_b32_e32 v59, s77
+; GFX9-NEXT: v_mov_b32_e32 v24, s79
+; GFX9-NEXT: v_mov_b32_e32 v21, s89
+; GFX9-NEXT: v_mov_b32_e32 v60, s74
+; GFX9-NEXT: v_mov_b32_e32 v22, s76
+; GFX9-NEXT: v_mov_b32_e32 v19, s78
+; GFX9-NEXT: v_mov_b32_e32 v61, s63
+; GFX9-NEXT: v_mov_b32_e32 v20, s73
; GFX9-NEXT: v_mov_b32_e32 v14, s75
-; GFX9-NEXT: v_mov_b32_e32 v59, s62
-; GFX9-NEXT: v_mov_b32_e32 v15, s73
-; GFX9-NEXT: v_mov_b32_e32 v62, s72
-; GFX9-NEXT: v_mov_b32_e32 v10, s63
-; GFX9-NEXT: v_mov_b32_e32 v61, s58
-; GFX9-NEXT: v_mov_b32_e32 v11, s61
-; GFX9-NEXT: v_mov_b32_e32 v26, s60
-; GFX9-NEXT: v_mov_b32_e32 v3, s59
-; GFX9-NEXT: v_mov_b32_e32 v25, s56
+; GFX9-NEXT: v_mov_b32_e32 v62, s60
+; GFX9-NEXT: v_mov_b32_e32 v15, s62
+; GFX9-NEXT: v_mov_b32_e32 v10, s72
+; GFX9-NEXT: v_mov_b32_e32 v25, s58
+; GFX9-NEXT: v_mov_b32_e32 v11, s59
+; GFX9-NEXT: v_mov_b32_e32 v3, s61
+; GFX9-NEXT: v_mov_b32_e32 v26, s56
; GFX9-NEXT: v_mov_b32_e32 v4, s57
; GFX9-NEXT: v_mov_b32_e32 v1, s44
; GFX9-NEXT: v_mov_b32_e32 v5, s42
@@ -89371,16 +89372,16 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_mov_b32_e32 v17, s6
; GFX9-NEXT: .LBB109_5: ; %end
; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004
-; GFX9-NEXT: v_perm_b32 v17, v26, v17, s4
+; GFX9-NEXT: v_perm_b32 v17, v31, v17, s4
; GFX9-NEXT: v_perm_b32 v3, v30, v3, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX9-NEXT: v_or_b32_e32 v3, v3, v17
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; GFX9-NEXT: v_perm_b32 v16, v62, v16, s4
-; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4
+; GFX9-NEXT: v_perm_b32 v16, v37, v16, s4
+; GFX9-NEXT: v_perm_b32 v1, v47, v1, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX9-NEXT: v_perm_b32 v2, v53, v2, s4
+; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX9-NEXT: v_readlane_b32 s55, v63, 15
; GFX9-NEXT: v_readlane_b32 s54, v63, 14
@@ -89402,73 +89403,73 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4
; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_perm_b32 v4, v4, v25, s4
+; GFX9-NEXT: v_perm_b32 v4, v4, v26, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
-; GFX9-NEXT: v_perm_b32 v3, v34, v10, s4
+; GFX9-NEXT: v_perm_b32 v3, v35, v10, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v16
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v28, v61, s4
+; GFX9-NEXT: v_perm_b32 v4, v29, v25, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
-; GFX9-NEXT: v_perm_b32 v3, v31, v11, s4
+; GFX9-NEXT: v_perm_b32 v3, v32, v11, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v60, v12, s4
+; GFX9-NEXT: v_perm_b32 v4, v36, v12, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:12
-; GFX9-NEXT: v_perm_b32 v3, v38, v14, s4
+; GFX9-NEXT: v_perm_b32 v3, v50, v14, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v27, v59, s4
+; GFX9-NEXT: v_perm_b32 v4, v27, v62, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:16
-; GFX9-NEXT: v_perm_b32 v3, v29, v15, s4
+; GFX9-NEXT: v_perm_b32 v3, v28, v15, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v58, v8, s4
+; GFX9-NEXT: v_perm_b32 v4, v38, v8, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20
-; GFX9-NEXT: v_perm_b32 v3, v36, v19, s4
+; GFX9-NEXT: v_perm_b32 v3, v48, v19, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v32, v57, s4
+; GFX9-NEXT: v_perm_b32 v4, v33, v61, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
-; GFX9-NEXT: v_perm_b32 v3, v33, v20, s4
+; GFX9-NEXT: v_perm_b32 v3, v34, v20, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v56, v7, s4
+; GFX9-NEXT: v_perm_b32 v4, v51, v7, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
-; GFX9-NEXT: v_perm_b32 v3, v48, v21, s4
+; GFX9-NEXT: v_perm_b32 v3, v53, v21, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v35, v47, s4
+; GFX9-NEXT: v_perm_b32 v4, v39, v60, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:32
-; GFX9-NEXT: v_perm_b32 v3, v37, v22, s4
+; GFX9-NEXT: v_perm_b32 v3, v49, v22, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v46, v6, s4
+; GFX9-NEXT: v_perm_b32 v4, v55, v6, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:36
-; GFX9-NEXT: v_perm_b32 v3, v51, v23, s4
+; GFX9-NEXT: v_perm_b32 v3, v41, v23, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v39, v45, s4
+; GFX9-NEXT: v_perm_b32 v4, v52, v59, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
-; GFX9-NEXT: v_perm_b32 v3, v49, v24, s4
+; GFX9-NEXT: v_perm_b32 v3, v54, v24, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: v_perm_b32 v4, v43, v5, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
-; GFX9-NEXT: v_perm_b32 v3, v54, v44, s4
+; GFX9-NEXT: v_perm_b32 v3, v45, v58, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX9-NEXT: v_perm_b32 v4, v50, v41, s4
+; GFX9-NEXT: v_perm_b32 v4, v40, v18, s4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
-; GFX9-NEXT: v_perm_b32 v3, v52, v42, s4
+; GFX9-NEXT: v_perm_b32 v3, v42, v57, s4
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
-; GFX9-NEXT: v_perm_b32 v3, v40, v18, s4
+; GFX9-NEXT: v_perm_b32 v3, v56, v13, s4
; GFX9-NEXT: v_or_b32_e32 v1, v3, v1
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
-; GFX9-NEXT: v_perm_b32 v1, v55, v9, s4
+; GFX9-NEXT: v_perm_b32 v1, v46, v9, s4
; GFX9-NEXT: v_or_b32_e32 v1, v1, v2
; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
@@ -89512,46 +89513,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s49, 9
; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s27, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s27, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s27, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s26, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s26, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s25, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s25, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s25, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s24, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s24, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s23, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s23, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s23, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s22, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s22, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s21, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s21, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s21, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s20, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s19, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s19, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s18, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s17, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s17, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s16, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s25, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s19, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s30, s19, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s19, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s31, s18, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s18, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s17, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s17, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s17, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s16, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s16, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s3, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s3, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s3, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s3, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s94, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s2, 8
; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s1, 16
; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s1, 8
-; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s0, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s56, s0, 8
; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
@@ -89569,7 +89570,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s1
; GFX11-TRUE16-NEXT: s_and_b32 s4, s0, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s4
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
@@ -89578,21 +89579,21 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v4, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9
@@ -89600,472 +89601,465 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v2
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v16.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v5, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v17.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16
; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v1
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v3
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v7, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, v10, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v21.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v5
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v9.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v10, v12
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v11
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9
; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v5
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v5
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v1
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v9, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v38, 0x40c00000, s1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v6
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v10, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v39, v38, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v22.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v23.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v13
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v5
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, v39, v38
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v23.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v8.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v19.l
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v39, 0x7fff, v39
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v20.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v7
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v14 :: v_dual_add_nc_u32 v7, v9, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v7
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v12 :: v_dual_add_nc_u32 v7, v9, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1
; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v10, 16, 1
-; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.l, v25.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
-; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v15, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v14 :: v_dual_add_nc_u32 v9, v9, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v13
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v15, v12
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v82.h, v26.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v28.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v7.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc_lo
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v14, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v21.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v8
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v14 :: v_dual_add_nc_u32 v8, v10, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-TRUE16-NEXT: v_bfe_u32 v30, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v9, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1
; GFX11-TRUE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.l, v27.l
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v9 :: v_dual_add_nc_u32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v15, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v7
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v14 :: v_dual_add_nc_u32 v7, v9, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v14, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v30, v13
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v70.h, v29.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v15, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v17.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v8.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v10, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v31.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v11 :: v_dual_add_nc_u32 v10, 0x7fff, v10
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v8
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v12 :: v_dual_add_nc_u32 v8, v9, v10
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v11, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v15 :: v_dual_add_nc_u32 v9, v11, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v10
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v11
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v30.l
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v10 :: v_dual_add_nc_u32 v10, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v14
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v32.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v18.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v11 :: v_dual_add_nc_u32 v11, v12, v14
-; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v15, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v9.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v10
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v12, v15
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v8 :: v_dual_add_nc_u32 v8, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v10, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v34.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v8
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v9, v13
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.l, v34.l
-; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v10, 16, 1
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v13 :: v_dual_add_nc_u32 v12, 0x7fff, v12
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v15
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v33, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v48.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v38.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.l, v30.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v33.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v8
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.l, v35.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v83.h, v36.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.l, v28.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.h, v29.l
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v10 :: v_dual_add_nc_u32 v10, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_add_nc_u32 v13, 0x7fff, v14
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v39.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v31.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v10, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v32.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, v12, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v33.l
-; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v13, v14 :: v_dual_add_nc_u32 v13, v15, v11
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v12, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v11
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v36, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, v14, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-TRUE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, 0x400000, v12
-; GFX11-TRUE16-NEXT: v_add_f32_e64 v37, 0x40c00000, s0
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc_lo
-; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v36, 16, 1
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v9
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v12, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v13, 16, 1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v52, 0x400000, v13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v12
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v49.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v51 :: v_dual_add_nc_u32 v10, v10, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v12
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
-; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v37, 16, 1
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, 0x400000, v37
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v13, v36
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v14, v48, vcc_lo
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v36
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v15, v37
-; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, 0x400000, v38
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.l, v35.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v10.l
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v12
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 24, v66
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v39, v48, vcc_lo
-; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v11
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v38.l
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.l, v36.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v14
-; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v49, vcc_lo
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.l, v39.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 8, v66
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 24, v52
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v37.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v15
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 24, v70
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 8, v70
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 24, v82
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v82
-; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v11.l
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v6
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v5
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v4
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[51:52]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[53:54]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[65:66]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[69:70]
-; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[81:82]
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, 0x400000, v14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v50.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v53.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v55.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v25.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v15, v51, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v8
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v26.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v27.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v20.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v52, vcc_lo
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v11
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.l, v51.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v22.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v24.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v10
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.l, v52.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v18.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v19.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 24, v67
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v54.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 24, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 8, v80
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 24, v84
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[66:67]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[68:69]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[80:81]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[83:84]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[85:86]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[5:6]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4]
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[1:2]
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v52
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 8, v51
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 24, v54
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 8, v54
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v53
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 8, v53
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v65
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 8, v65
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v69
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v81
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 8, v67
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v66
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 24, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 8, v81
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 8, v84
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 8, v83
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 24, v86
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 8, v86
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 24, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2
-; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v1
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX11-TRUE16-NEXT: s_branch .LBB109_5
; GFX11-TRUE16-NEXT: .LBB109_3:
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr45
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr95
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
; GFX11-TRUE16-NEXT: s_branch .LBB109_2
; GFX11-TRUE16-NEXT: .LBB109_4:
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s26 :: v_dual_mov_b32 v36, s27
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s49 :: v_dual_mov_b32 v39, s24
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s25 :: v_dual_mov_b32 v34, s22
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s48 :: v_dual_mov_b32 v30, s23
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s39 :: v_dual_mov_b32 v31, s20
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s21 :: v_dual_mov_b32 v28, s18
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s38 :: v_dual_mov_b32 v26, s37
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s19 :: v_dual_mov_b32 v24, s16
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s17 :: v_dual_mov_b32 v23, s36
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v20, s35
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s3 :: v_dual_mov_b32 v18, s0
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v17, s34
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s31 :: v_dual_mov_b32 v49, s93
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s30 :: v_dual_mov_b32 v15, vcc_hi
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s95 :: v_dual_mov_b32 v53, s94
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s89 :: v_dual_mov_b32 v51, s92
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v66, s91 :: v_dual_mov_b32 v65, s90
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s77 :: v_dual_mov_b32 v55, s88
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s79 :: v_dual_mov_b32 v69, s78
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s73 :: v_dual_mov_b32 v67, s76
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s75 :: v_dual_mov_b32 v81, s74
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s61 :: v_dual_mov_b32 v71, s72
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s63 :: v_dual_mov_b32 v5, s62
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s57 :: v_dual_mov_b32 v6, s60
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s59 :: v_dual_mov_b32 v3, s58
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s45 :: v_dual_mov_b32 v4, s56
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s47 :: v_dual_mov_b32 v1, s46
-; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s43 :: v_dual_mov_b32 v2, s44
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s26 :: v_dual_mov_b32 v51, s27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s49 :: v_dual_mov_b32 v53, s48
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s24 :: v_dual_mov_b32 v50, s39
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s25 :: v_dual_mov_b32 v48, s22
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v39, s38 :: v_dual_mov_b32 v38, s37
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s23 :: v_dual_mov_b32 v37, s36
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s20 :: v_dual_mov_b32 v36, s35
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v33, s34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s18 :: v_dual_mov_b32 v32, s31
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s19 :: v_dual_mov_b32 v29, s30
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s16 :: v_dual_mov_b32 v27, vcc_hi
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v22, s2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s95 :: v_dual_mov_b32 v24, s94
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s3 :: v_dual_mov_b32 v21, s93
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s92
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v17, s91
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v64, s90 :: v_dual_mov_b32 v65, s78
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s88 :: v_dual_mov_b32 v68, s89
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s75 :: v_dual_mov_b32 v66, s77
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s79 :: v_dual_mov_b32 v70, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v69, s74 :: v_dual_mov_b32 v82, s61
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s76 :: v_dual_mov_b32 v80, s63
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s73 :: v_dual_mov_b32 v84, s58
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s60 :: v_dual_mov_b32 v86, s47
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s62 :: v_dual_mov_b32 v6, s57
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s59 :: v_dual_mov_b32 v4, s46
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v96, s43
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s44
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s40 :: v_dual_mov_b32 v8, s28
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v10, s12
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, s8
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s6 :: v_dual_mov_b32 v14, s4
; GFX11-TRUE16-NEXT: .LBB109_5: ; %end
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v96, v14, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v19, v14, 0xc0c0004
; GFX11-TRUE16-NEXT: v_perm_b32 v1, v18, v1, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v96, 0xc0c0004
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-TRUE16-NEXT: v_perm_b32 v13, v86, v13, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v12, v84, v12, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v13, v24, v13, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v12, v27, v12, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_perm_b32 v2, v16, v2, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v3, v21, v3, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v3, v22, v3, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v23, v83, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v20, v85, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v24, v5, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v11, v82, v11, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v25, v86, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v21, v87, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v26, v5, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v11, v32, v11, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v22, v6, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v23, v6, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v13
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v17
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v11
; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v5, v12
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v26, v80, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v29, v84, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX11-TRUE16-NEXT: v_perm_b32 v4, v19, v4, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v28, v81, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v4, v20, v4, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v31, v85, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v6, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v70, v10, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v14, v29, v68, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v66, v9, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v25, v71, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v36, v10, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v14, v33, v82, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v38, v9, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v28, v83, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v13
; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v16, v17
-; GFX11-TRUE16-NEXT: v_perm_b32 v16, v31, v69, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v16, v35, v81, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v17, v27, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v17, v30, v80, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v34, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v48, v71, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v6, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v5, v32, v64, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v5, v37, v70, 0xc0c0004
; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v10
; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v17, v18
; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v9
-; GFX11-TRUE16-NEXT: v_perm_b32 v6, v54, v8, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v10, v33, v52, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v7, v50, v7, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v19, v38, v49, 0xc0c0004
-; GFX11-TRUE16-NEXT: v_perm_b32 v8, v30, v55, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v6, v50, v8, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v10, v39, v67, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v7, v54, v7, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v19, v53, v65, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v8, v34, v69, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX11-TRUE16-NEXT: v_perm_b32 v9, v39, v53, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v9, v55, v68, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-TRUE16-NEXT: v_perm_b32 v20, v35, v51, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v20, v49, v66, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX11-TRUE16-NEXT: v_perm_b32 v21, v37, v48, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v21, v52, v64, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX11-TRUE16-NEXT: v_perm_b32 v15, v36, v15, 0xc0c0004
+; GFX11-TRUE16-NEXT: v_perm_b32 v15, v51, v15, 0xc0c0004
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v19
; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v8, v5
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v6
@@ -90113,46 +90107,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s49, 9
; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB109_3
; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
-; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s27, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s27, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s27, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s26, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s26, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s25, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s25, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s25, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s24, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s24, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s23, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s23, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s23, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s22, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s22, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s21, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s21, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s21, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s20, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s20, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s19, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s19, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s19, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s18, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s18, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s17, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s17, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s17, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s16, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s19, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s30, s19, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s19, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s31, s18, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s18, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s17, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s17, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s17, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s16, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s16, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s3, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s3, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s3, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s3, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s3, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s94, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s2, 8
; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s1, 24
-; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s1, 16
; GFX11-FAKE16-NEXT: s_lshr_b32 s44, s1, 8
-; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s0, 16
-; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s0, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s0, 8
; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[26:27], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[28:29], s[24:25], 24
; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[22:23], 24
@@ -90193,7 +90187,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v11, v6
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v7
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s3
@@ -90203,473 +90197,468 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v4
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo
; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v1
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v4
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v4, v4, v6 :: v_dual_and_b32 v5, 0xffff, v16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v3
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v16
; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v4
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v1, v11 :: v_dual_add_nc_u32 v4, v6, v9
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v8, v10
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v5
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v7
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v4
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v5, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v8, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v17, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v4, v7, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v18, 16, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v4, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v19, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v9, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v10, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s16, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v19
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v3, v11, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v13, v10
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v3, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v20
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v12, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v22, 16, v6
; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v22, 16, 1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v10, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v9
; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v11, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v22
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v12, v8
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v2
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v14
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v4
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v3
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v15, 16, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s19, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v5
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v11, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v20
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v2
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v6
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v10
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v23
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v84, v21, 16, v11
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v21
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v12, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v10
; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s1
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v83, v5, 16, v13
-; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v25
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v97, v23, 16, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v96, v27, 16, v12
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 24, v97
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v5
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v15, 16, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v96
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v6
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v9, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v7
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v24
; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v6, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v84, v26, 16, v10
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v22
-; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v7, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v7
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v8
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v82, v24, 16, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v11, v6
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v8
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v7
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v10
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 24, v82
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v82
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v10, v25, vcc_lo
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v10, v28, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v12, v26, vcc_lo
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v12, v29, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v11, v30, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v11, v27, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v7
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v27
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v28
; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v6, 16, 1
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v25
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v6
-; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v6
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v68, v26, 16, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v82, v29, 16, v7
; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s23, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v12, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v11
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v9, v28 :: v_dual_add_nc_u32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v31, v11, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v12, v12, v10
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v29, v12
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v31, v11
; GFX11-FAKE16-NEXT: s_and_b32 s0, s22, 0xffff0000
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v30, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v33, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v7
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc_lo
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, 0x400000, v12
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v7
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16
-; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v11, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v28, vcc_lo
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v11
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v28
-; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v10, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v34
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v31
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v81, v5, 16, v10
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v66, v29, 16, v9
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v11
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v31, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v30
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v70, v33, 16, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v6, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v13, v8
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 24, v66
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v32, v31, 16, 1
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v81, v35, 16, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v11, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v12, 16, 1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v8, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, 0x400000, v31
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v34, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v7
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v39, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v13, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v36, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v39, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x7fff, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v8, v11, v13 :: v_dual_add_nc_u32 v11, v32, v31
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v33, v9
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v36, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v34, 16, 1
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v7, v39
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v49, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v10, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v39
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v49, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v11
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v9
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v33, v33, v34
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 8, v66
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v81
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v33
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v34
-; GFX11-FAKE16-NEXT: v_bfe_u32 v33, v36, 16, 1
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v8, v35, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v30
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v81
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v33, v36
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v6, v13, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v11, v49
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v6
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v35, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s0
; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v11
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v38, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v11, 16, 1
; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000
-; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v35, 16, 1
-; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v8, 16, 1
-; GFX11-FAKE16-NEXT: v_add_f32_e64 v48, 0x40c00000, s0
-; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v38, 16, 1
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v37, vcc_lo
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v36, v39, v35
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v35
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v39, v49, v38
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v34, v34, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v36, 0x7fff, v36
-; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v48, 16, 1
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v38
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v39, 0x7fff, v39
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v34, 0x7fff, v34
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v36, v50, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v37, v37, v48
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v31
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v39, v51, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
-; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v36, 0x7fff, v37
-; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v48
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v52, v33, 16, v13
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v67, v6, 16, v12
-; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v34, v49, vcc_lo
-; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v38
-; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v39, v36, v37 :: v_dual_and_b32 v48, 0xffff, v32
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v11
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v8
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v34
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v38, 0xffff, v35
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v39
-; GFX11-FAKE16-NEXT: v_and_b32_e32 v39, 0xffff, v37
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v65, v7, 16, v48
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v50, v36, 16, v8
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v49, v11, 16, v38
-; GFX11-FAKE16-NEXT: v_lshl_or_b32 v51, v9, 16, v39
+; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v13, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v6, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v12 :: v_dual_add_nc_u32 v12, v50, v11
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v51, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v50, v52, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v11
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v8, v6
+; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v51, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v50, 0x7fff, v50
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v12, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v49, v49, v51
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v51
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v50, v54, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v36
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x7fff, v49
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v8, v52, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v37
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v67, v39, 16, v10
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v83, v32, 16, v9
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v12, v53, vcc_lo
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v49
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v50
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v69, v38, 16, v11
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v53
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v65, v51, 16, v6
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 24, v82
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v64, v52, 16, v7
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v66, v48, 16, v8
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 8, v81
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 24, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 8, v65
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[49:50]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[51:52]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[65:66]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[67:68]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[81:82]
-; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[83:84]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[5:6], 24, v[64:65]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[66:67]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[69:70]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[81:82]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[83:84]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[96:97]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[3:4]
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[12:13], 24, v[1:2]
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v50
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v49
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v49
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 24, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v52
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v51
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 8, v51
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 24, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 8, v68
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v67
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v65
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v64
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 24, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 8, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 8, v69
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v82
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 24, v84
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v84
-; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v83
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v97
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 24, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1
; GFX11-FAKE16-NEXT: s_branch .LBB109_5
; GFX11-FAKE16-NEXT: .LBB109_3:
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr44
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr59
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr56
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr46
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr45
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr57
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr47
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr63
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr61
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr79
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr73
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr91
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr95
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr28
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr89
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr31
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
-; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr77
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr75
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
-; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr93
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
; GFX11-FAKE16-NEXT: s_branch .LBB109_2
; GFX11-FAKE16-NEXT: .LBB109_4:
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s26 :: v_dual_mov_b32 v34, s27
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s49 :: v_dual_mov_b32 v37, s24
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s25 :: v_dual_mov_b32 v32, s22
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s48 :: v_dual_mov_b32 v28, s23
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s39 :: v_dual_mov_b32 v30, s20
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s21 :: v_dual_mov_b32 v26, s38
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v22, s19
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s37 :: v_dual_mov_b32 v23, s16
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s17 :: v_dual_mov_b32 v21, s36
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v19, s2 :: v_dual_mov_b32 v18, s35
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s3 :: v_dual_mov_b32 v16, s0
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v15, s34
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v48, s31 :: v_dual_mov_b32 v39, s93
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s30 :: v_dual_mov_b32 v13, vcc_hi
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s95 :: v_dual_mov_b32 v51, s94
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s89 :: v_dual_mov_b32 v49, s92
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s91 :: v_dual_mov_b32 v55, s90
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s77 :: v_dual_mov_b32 v53, s88
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v68, s79 :: v_dual_mov_b32 v67, s78
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v66, s73 :: v_dual_mov_b32 v65, s76
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s75 :: v_dual_mov_b32 v71, s74
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v70, s61 :: v_dual_mov_b32 v69, s72
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s63 :: v_dual_mov_b32 v83, s62
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s57 :: v_dual_mov_b32 v81, s60
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s59 :: v_dual_mov_b32 v3, s58
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s45 :: v_dual_mov_b32 v4, s56
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s47 :: v_dual_mov_b32 v1, s46
-; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s43 :: v_dual_mov_b32 v2, s44
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s26 :: v_dual_mov_b32 v49, s27
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s49 :: v_dual_mov_b32 v51, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s24 :: v_dual_mov_b32 v48, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s25 :: v_dual_mov_b32 v39, s38
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s22 :: v_dual_mov_b32 v38, s37
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s23 :: v_dual_mov_b32 v34, s20
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v33, s36 :: v_dual_mov_b32 v28, s21
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s35 :: v_dual_mov_b32 v30, s18
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v29, s34 :: v_dual_mov_b32 v32, s31
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s19 :: v_dual_mov_b32 v25, s16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s30 :: v_dual_mov_b32 v27, vcc_hi
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s17 :: v_dual_mov_b32 v20, s2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s95 :: v_dual_mov_b32 v22, s94
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s3 :: v_dual_mov_b32 v19, s93
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s0 :: v_dual_mov_b32 v17, s92
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v14, s1 :: v_dual_mov_b32 v15, s91
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s90 :: v_dual_mov_b32 v55, s78
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s88 :: v_dual_mov_b32 v66, s89
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s75 :: v_dual_mov_b32 v64, s77
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s79 :: v_dual_mov_b32 v68, s72
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s74 :: v_dual_mov_b32 v80, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s76 :: v_dual_mov_b32 v70, s63
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s73 :: v_dual_mov_b32 v82, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s60 :: v_dual_mov_b32 v86, s47
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s62 :: v_dual_mov_b32 v84, s57
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s59 :: v_dual_mov_b32 v4, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s45 :: v_dual_mov_b32 v96, s43
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s44
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s40 :: v_dual_mov_b32 v6, s28
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v8, s12
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s8
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s4
; GFX11-FAKE16-NEXT: .LBB109_5: ; %end
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v96, v12, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v87, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v17, v12, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v96, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v1, v16, v1, 0xc0c0004
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-FAKE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v11, v22, v11, 0xc0c0004
; GFX11-FAKE16-NEXT: v_perm_b32 v2, v14, v2, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v10, v84, v10, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v3, v19, v3, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v10, v27, v10, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v3, v20, v3, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v18, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v19, v87, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v21, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v23, v86, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v23, v83, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v9, v80, v9, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v25, v85, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v9, v32, v9, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v11
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v20, v81, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v21, v84, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v4, v17, v4, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v27, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v4, v18, v4, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v30, v83, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v9
; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v10
-; GFX11-FAKE16-NEXT: v_perm_b32 v14, v24, v70, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v68, v8, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v14, v26, v82, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v35, v8, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v12
-; GFX11-FAKE16-NEXT: v_perm_b32 v15, v26, v66, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v15, v29, v80, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v11
; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v17
-; GFX11-FAKE16-NEXT: v_perm_b32 v12, v22, v69, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v12, v24, v81, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX11-FAKE16-NEXT: v_perm_b32 v16, v30, v67, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v64, v7, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v16, v34, v71, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v38, v7, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v25, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v28, v70, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v32, v55, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v37, v69, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v14
; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v16, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v8, v29, v54, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v8, v33, v68, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v15
-; GFX11-FAKE16-NEXT: v_perm_b32 v6, v52, v6, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v17, v33, v50, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v5, v48, v5, 0xc0c0004
-; GFX11-FAKE16-NEXT: v_perm_b32 v20, v36, v39, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v6, v48, v6, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v17, v39, v65, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v5, v52, v5, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v20, v51, v55, 0xc0c0004
; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v18, v7
-; GFX11-FAKE16-NEXT: v_perm_b32 v7, v28, v53, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v7, v31, v67, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX11-FAKE16-NEXT: v_perm_b32 v18, v37, v51, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v18, v53, v66, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX11-FAKE16-NEXT: v_perm_b32 v19, v31, v49, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v19, v36, v64, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v17
-; GFX11-FAKE16-NEXT: v_perm_b32 v22, v35, v38, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v22, v50, v54, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v5
-; GFX11-FAKE16-NEXT: v_perm_b32 v13, v34, v13, 0xc0c0004
+; GFX11-FAKE16-NEXT: v_perm_b32 v13, v49, v13, 0xc0c0004
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v7, v8
; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v18, v6
diff --git a/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll b/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
index 4647f747c3b58..7ce3586fd442c 100644
--- a/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
+++ b/llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
@@ -8,20 +8,15 @@ define amdgpu_kernel void @lshl1_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v1, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s7, s4
-; CHECK-NEXT: s_mov_b32 s3, s4
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_mov_b32 s2, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[2:3], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v1, v1, 1, s0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b16 v0, v1, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
@@ -38,20 +33,15 @@ define amdgpu_kernel void @lshl2_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v1, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s7, s4
-; CHECK-NEXT: s_mov_b32 s3, s4
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_mov_b32 s2, s1
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[2:3], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v1, v1, 2, s0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
@@ -68,21 +58,16 @@ define amdgpu_kernel void @lshl3_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v2, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s7, s4
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_mov_b32 s2, s1
-; CHECK-NEXT: s_mov_b32 s3, s4
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[2:3], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v2, v2, 3, s0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b64 v[0:1], v2, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
@@ -99,23 +84,18 @@ define amdgpu_kernel void @lshl4_add(ptr addrspace(1) %in, ptr addrspace(7) %in2
; CHECK-NEXT: s_load_b64 s[6:7], s[4:5], 0x24
; CHECK-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; CHECK-NEXT: v_mov_b32_e32 v0, 0
-; CHECK-NEXT: s_load_b32 s5, s[4:5], 0x54
-; CHECK-NEXT: s_mov_b32 s4, 0
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; CHECK-NEXT: s_mov_b32 s9, s4
+; CHECK-NEXT: s_delay_alu instid0(VALU_DEP_1)
; CHECK-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, v0
; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: global_load_b32 v3, v0, s[6:7] scope:SCOPE_SYS
; CHECK-NEXT: s_wait_loadcnt 0x0
-; CHECK-NEXT: s_mov_b32 s7, s4
-; CHECK-NEXT: s_mov_b32 s6, s3
-; CHECK-NEXT: s_mov_b32 s8, s1
-; CHECK-NEXT: s_or_b64 s[6:7], s[6:7], s[4:5]
+; CHECK-NEXT: s_load_b32 s7, s[4:5], 0x54
+; CHECK-NEXT: s_mov_b32 s4, s1
; CHECK-NEXT: s_mov_b32 s5, s2
-; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; CHECK-NEXT: s_or_b64 s[4:5], s[8:9], s[4:5]
+; CHECK-NEXT: s_mov_b32 s6, s3
; CHECK-NEXT: v_lshl_add_u32 v4, v3, 4, s0
; CHECK-NEXT: v_mov_b32_e32 v3, v0
+; CHECK-NEXT: s_wait_kmcnt 0x0
; CHECK-NEXT: buffer_store_b128 v[0:3], v4, s[4:7], null offen
; CHECK-NEXT: s_endpgm
%vaddr = load volatile i32, ptr addrspace(1) %in, align 4
diff --git a/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll b/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
index 2f0e36619d513..212d80efa9428 100644
--- a/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
+++ b/llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
@@ -2,30 +2,20 @@
; RUN: llc -mtriple=amdgcn-- -mcpu=gfx950 < %s | FileCheck -check-prefix=GFX950 %s
; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250 %s
-; fold (srl (bitcast (build_vector e0, ..., eN)), N * eltsize) -> (zext eN)
-;
-; On targets with native i16, the generic (srl (shl x, c), c) -> and combine
-; does not fire because the i16 value goes through a v2i16 packing chain
-; rather than an any_extend. Without this fold, a lshl+lshr pair remains where
-; a single AND would suffice.
-
-define void @srl_bv_extract_last(ptr addrspace(1) %out, i16 %a, i16 %b, i16 %c, i16 %d) {
-; GFX950-LABEL: srl_bv_extract_last:
+define i64 @srl_bv_v4i16_extract_last(i16 %a, i16 %b, i16 %c, i16 %d) {
+; GFX950-LABEL: srl_bv_v4i16_extract_last:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_and_b32_e32 v2, 0xffff, v5
-; GFX950-NEXT: v_mov_b32_e32 v3, 0
-; GFX950-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
-; GFX950-NEXT: s_waitcnt vmcnt(0)
+; GFX950-NEXT: v_and_b32_e32 v0, 0xffff, v3
+; GFX950-NEXT: v_mov_b32_e32 v1, 0
; GFX950-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1250-LABEL: srl_bv_extract_last:
+; GFX1250-LABEL: srl_bv_v4i16_extract_last:
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_and_b32_e32 v2, 0xffff, v5
-; GFX1250-NEXT: v_mov_b32_e32 v3, 0
-; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX1250-NEXT: v_and_b32_e32 v0, 0xffff, v3
+; GFX1250-NEXT: v_mov_b32_e32 v1, 0
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%bv0 = insertelement <4 x i16> poison, i16 %a, i32 0
%bv1 = insertelement <4 x i16> %bv0, i16 %b, i32 1
@@ -33,32 +23,51 @@ define void @srl_bv_extract_last(ptr addrspace(1) %out, i16 %a, i16 %b, i16 %c,
%bv3 = insertelement <4 x i16> %bv2, i16 %d, i32 3
%bc = bitcast <4 x i16> %bv3 to i64
%srl = lshr i64 %bc, 48
- store i64 %srl, ptr addrspace(1) %out
- ret void
+ ret i64 %srl
+}
+
+define i64 @srl_bv_v2f32_extract_last(float %a, float %b) {
+; GFX950-LABEL: srl_bv_v2f32_extract_last:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_mov_b32_e32 v0, v1
+; GFX950-NEXT: v_mov_b32_e32 v1, 0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-LABEL: srl_bv_v2f32_extract_last:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_dual_mov_b32 v0, v1 :: v_dual_mov_b32 v1, 0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
+ %bv0 = insertelement <2 x float> poison, float %a, i32 0
+ %bv1 = insertelement <2 x float> %bv0, float %b, i32 1
+ %bc = bitcast <2 x float> %bv1 to i64
+ %srl = lshr i64 %bc, 32
+ ret i64 %srl
}
-; Negative test: shift amount is not (NumElts-1) * EltSize, fold does not fire.
-define void @srl_bv_not_last(ptr addrspace(1) %out, i16 %a, i16 %b, i16 %c, i16 %d) {
+; Negative test: shift amount is not (NumElts-1) * EltSize.
+define i64 @srl_bv_not_last(i16 %a, i16 %b, i16 %c, i16 %d) {
; GFX950-LABEL: srl_bv_not_last:
; GFX950: ; %bb.0:
; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX950-NEXT: s_mov_b32 s0, 0x5040100
-; GFX950-NEXT: v_perm_b32 v5, v5, v4, s0
-; GFX950-NEXT: v_perm_b32 v4, v3, v2, s0
-; GFX950-NEXT: v_lshrrev_b64 v[2:3], 16, v[4:5]
-; GFX950-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
-; GFX950-NEXT: s_waitcnt vmcnt(0)
+; GFX950-NEXT: v_perm_b32 v2, v3, v2, s0
+; GFX950-NEXT: v_perm_b32 v0, v1, v0, s0
+; GFX950-NEXT: v_alignbit_b32 v0, v2, v0, 16
+; GFX950-NEXT: v_and_b32_e32 v1, 0xffff, v3
; GFX950-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-LABEL: srl_bv_not_last:
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_perm_b32 v5, v5, v4, 0x5040100
-; GFX1250-NEXT: v_perm_b32 v4, v3, v2, 0x5040100
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_lshrrev_b64 v[2:3], 16, v[4:5]
-; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX1250-NEXT: v_perm_b32 v2, v3, v2, 0x5040100
+; GFX1250-NEXT: v_perm_b32 v0, v1, v0, 0x5040100
+; GFX1250-NEXT: v_and_b32_e32 v1, 0xffff, v3
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250-NEXT: v_alignbit_b32 v0, v2, v0, 16
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%bv0 = insertelement <4 x i16> poison, i16 %a, i32 0
%bv1 = insertelement <4 x i16> %bv0, i16 %b, i32 1
@@ -66,6 +75,5 @@ define void @srl_bv_not_last(ptr addrspace(1) %out, i16 %a, i16 %b, i16 %c, i16
%bv3 = insertelement <4 x i16> %bv2, i16 %d, i32 3
%bc = bitcast <4 x i16> %bv3 to i64
%srl = lshr i64 %bc, 16
- store i64 %srl, ptr addrspace(1) %out
- ret void
+ ret i64 %srl
}
>From d365124082dc69062632f7db68f1ce9873b8a2ab Mon Sep 17 00:00:00 2001
From: Frederick Vu <100011202+FrederickVu at users.noreply.github.com>
Date: Mon, 13 Apr 2026 20:50:17 +0000
Subject: [PATCH 3/3] Remove defensive undef check
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 172771ad75c9f..c4282ccdc14fc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11589,13 +11589,11 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
unsigned NumElts = BVVT.getVectorNumElements();
if (N1C->getZExtValue() == (NumElts - 1) * EltSizeInBits) {
SDValue LastElt = BV.getOperand(NumElts - 1);
- if (!LastElt.isUndef()) {
- EVT IntEltVT = EVT::getIntegerVT(*DAG.getContext(), EltSizeInBits);
- LastElt = DAG.getBitcast(LastElt.getValueType().changeTypeToInteger(),
- LastElt);
- return DAG.getZExtOrTrunc(DAG.getZExtOrTrunc(LastElt, DL, IntEltVT),
- DL, VT);
- }
+ EVT IntEltVT = EVT::getIntegerVT(*DAG.getContext(), EltSizeInBits);
+ LastElt = DAG.getBitcast(LastElt.getValueType().changeTypeToInteger(),
+ LastElt);
+ return DAG.getZExtOrTrunc(DAG.getZExtOrTrunc(LastElt, DL, IntEltVT),
+ DL, VT);
}
}
}
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