[llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)

Anshil Gandhi via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 13 08:58:14 PDT 2026

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gandhi56 wrote:

This PR generates long MFMA chains, resulting in a dramatic increase in register pressure. I have an alternative solution to address the problem, which I will upload soon.

https://github.com/llvm/llvm-project/pull/170242

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