[llvm] 3f45921 - [RISCV] Add an initial set of InstAliases for P extension. (#180315)

via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 13 08:17:55 PDT 2026


Author: Craig Topper
Date: 2026-04-13T08:17:49-07:00
New Revision: 3f45921068c31935f7d34e9131c68284ddfccdb6

URL: https://github.com/llvm/llvm-project/commit/3f45921068c31935f7d34e9131c68284ddfccdb6
DIFF: https://github.com/llvm/llvm-project/commit/3f45921068c31935f7d34e9131c68284ddfccdb6.diff

LOG: [RISCV] Add an initial set of InstAliases for P extension. (#180315)

These are now listed in the asciidoc spec here
https://github.com/riscv/riscv-p-spec

I got some help on this from AI, but I reviewed it. Test cases were
fully generated with AI.

Added: 
    llvm/test/MC/RISCV/rv32p-aliases-valid.s
    llvm/test/MC/RISCV/rv64p-aliases-valid.s

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    llvm/test/CodeGen/RISCV/rv32p.ll
    llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
    llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
    llvm/test/MC/RISCV/rv32p-valid.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
index 09dae41887dbf..8a82550f569cc 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
@@ -1663,6 +1663,172 @@ let Predicates = [HasStdExtP, IsRV32] in {
   def PMAXU_DB     : RVPPairBinaryExchanged_rr<0b1111, 0b10, "pmaxu.db", Commutable=1>;
 } // Predicates = [HasStdExtP, IsRV32]
 
+//===----------------------------------------------------------------------===//
+// Assembler Pseudo Instructions
+//===----------------------------------------------------------------------===//
+
+let Predicates = [HasStdExtP] in {
+  def : InstAlias<"pmv.bs $rd, $rs", (PADD_BS GPR:$rd, X0, GPR:$rs)>;
+  def : InstAlias<"pmv.hs $rd, $rs", (PADD_HS GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pneg.b $rd, $rs", (PSUB_B GPR:$rd, X0, GPR:$rs)>;
+  def : InstAlias<"pneg.h $rd, $rs", (PSUB_H GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pabs.b $rd, $rs", (PABD_B GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pabs.h $rd, $rs", (PABD_H GPR:$rd, GPR:$rs, X0)>;
+  // No pabd.w instruction
+
+  def : InstAlias<"pzext.h.b $rd, $rs", (PPAIRE_B GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pmseqz.b $rd, $rs", (PMSEQ_B GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pmseqz.h $rd, $rs", (PMSEQ_H GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pmsnez.b $rd, $rs", (PMSLTU_B GPR:$rd, X0, GPR:$rs)>;
+  def : InstAlias<"pmsnez.h $rd, $rs", (PMSLTU_H GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pmsltz.b $rd, $rs", (PMSLT_B GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pmsltz.h $rd, $rs", (PMSLT_H GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pmsgtz.b $rd, $rs", (PMSLT_B GPR:$rd, X0, GPR:$rs)>;
+  def : InstAlias<"pmsgtz.h $rd, $rs", (PMSLT_H GPR:$rd, X0, GPR:$rs)>;
+
+  // The canonical pmslt(u) form will always be printed. Therefore,
+  // set a zero weight.
+  def : InstAlias<"pmsgt.b $rd, $rs, $rt",  (PMSLT_B GPR:$rd, GPR:$rt, GPR:$rs),  0>;
+  def : InstAlias<"pmsgt.h $rd, $rs, $rt",  (PMSLT_H GPR:$rd, GPR:$rt, GPR:$rs),  0>;
+  def : InstAlias<"pmsgtu.b $rd, $rs, $rt", (PMSLTU_B GPR:$rd, GPR:$rt, GPR:$rs), 0>;
+  def : InstAlias<"pmsgtu.h $rd, $rs, $rt", (PMSLTU_H GPR:$rd, GPR:$rt, GPR:$rs), 0>;
+}
+let Predicates = [HasStdExtP, IsRV32] in {
+  def : InstAlias<"mseqz $rd, $rs", (MSEQ GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"msnez $rd, $rs", (MSLTU GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"msltz $rd, $rs", (MSLT GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"msgtz $rd, $rs", (MSLT GPR:$rd, X0, GPR:$rs)>;
+
+  // The canonical mslt(u) form will always be printed. Therefore,
+  // set a zero weight.
+  def : InstAlias<"msgt $rd, $rs, $rt",  (MSLT GPR:$rd, GPR:$rt, GPR:$rs), 0>;
+  def : InstAlias<"msgtu $rd, $rs, $rt", (MSLTU GPR:$rd, GPR:$rt, GPR:$rs), 0>;
+}
+let Predicates = [HasStdExtP, IsRV64] in {
+  def : InstAlias<"pmv.ws $rd, $rs", (PADD_WS GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pneg.w $rd, $rs", (PSUB_W GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pzext.w.h $rd, $rs", (PPAIRE_H GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pmseqz.w $rd, $rs", (PMSEQ_W GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pmsnez.w $rd, $rs", (PMSLTU_W GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pmsltz.w $rd, $rs", (PMSLT_W GPR:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pmsgtz.w $rd, $rs", (PMSLT_W GPR:$rd, X0, GPR:$rs)>;
+
+  // The canonical pmslt(u) form will always be printed. Therefore,
+  // set a zero weight.
+  def : InstAlias<"pmsgt.w $rd, $rs, $rt", (PMSLT_W GPR:$rd, GPR:$rt, GPR:$rs), 0>;
+  def : InstAlias<"pmsgtu.w $rd, $rs, $rt", (PMSLTU_W GPR:$rd, GPR:$rt, GPR:$rs), 0>;
+
+  // No pwcvt.b/h for RV64.
+  def : InstAlias<"pwcvtu.b $rd, $rs", (ZIP8P GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pwcvtu.h $rd, $rs", (ZIP16P GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pwcvth.b $rd, $rs", (ZIP8P GPR:$rd, X0, GPR:$rs)>;
+  def : InstAlias<"pwcvth.h $rd, $rs", (ZIP16P GPR:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pncvt.b $rd, $rs", (UNZIP8P GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pncvt.h $rd, $rs", (UNZIP16P GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pncvth.b $rd, $rs", (UNZIP8HP GPR:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pncvth.h $rd, $rs", (UNZIP16HP GPR:$rd, GPR:$rs, X0)>;
+}
+
+let Predicates = [HasStdExtP, IsRV32] in {
+  def : InstAlias<"pmv.dbs $rd, $rs",
+                  (PADD_DBS GPRPairRV32:$rd, X0_Pair, GPR:$rs)>;
+  def : InstAlias<"pmv.dhs $rd, $rs",
+                  (PADD_DHS GPRPairRV32:$rd, X0_Pair, GPR:$rs)>;
+  def : InstAlias<"pmv.dws $rd, $rs",
+                  (PADD_DWS GPRPairRV32:$rd, X0_Pair, GPR:$rs)>;
+
+  def : InstAlias<"pneg.db $rd, $rs",
+                  (PSUB_DB GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"pneg.dh $rd, $rs",
+                  (PSUB_DH GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"pneg.dw $rd, $rs",
+                  (PSUB_DW GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"negd $rd, $rs",
+                  (SUBD GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+
+  def : InstAlias<"pabs.db $rd, $rs",
+                  (PABD_DB GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  def : InstAlias<"pabs.dh $rd, $rs",
+                  (PABD_DH GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  // No pabd.dw instruction
+
+  def : InstAlias<"pzext.dh.b $rd, $rs",
+                  (PPAIRE_DB GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  def : InstAlias<"pzext.dw.h $rd, $rs",
+                  (PPAIRE_DH GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+
+  def : InstAlias<"pmseqz.db $rd, $rs",
+                  (PMSEQ_DB GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  def : InstAlias<"pmseqz.dh $rd, $rs",
+                  (PMSEQ_DH GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  def : InstAlias<"pmseqz.dw $rd, $rs",
+                  (PMSEQ_DW GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+
+  def : InstAlias<"pmsnez.db $rd, $rs",
+                  (PMSLTU_DB GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"pmsnez.dh $rd, $rs",
+                  (PMSLTU_DH GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"pmsnez.dw $rd, $rs",
+                  (PMSLTU_DW GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+
+  def : InstAlias<"pmsltz.db $rd, $rs",
+                  (PMSLT_DB GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  def : InstAlias<"pmsltz.dh $rd, $rs",
+                  (PMSLT_DH GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+  def : InstAlias<"pmsltz.dw $rd, $rs",
+                  (PMSLT_DW GPRPairRV32:$rd, GPRPairRV32:$rs, X0_Pair)>;
+
+  def : InstAlias<"pmsgtz.db $rd, $rs",
+                  (PMSLT_DB GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"pmsgtz.dh $rd, $rs",
+                  (PMSLT_DH GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+  def : InstAlias<"pmsgtz.dw $rd, $rs",
+                  (PMSLT_DW GPRPairRV32:$rd, X0_Pair, GPRPairRV32:$rs)>;
+
+  // The canonical pmslt(u) form will always be printed. Therefore,
+  // set a zero weight.
+  def : InstAlias<"pmsgt.db $rd, $rs, $rt",
+                  (PMSLT_DB GPRPairRV32:$rd, GPRPairRV32:$rt, GPRPairRV32:$rs), 0>;
+  def : InstAlias<"pmsgt.dh $rd, $rs, $rt",
+                  (PMSLT_DH GPRPairRV32:$rd, GPRPairRV32:$rt, GPRPairRV32:$rs), 0>;
+  def : InstAlias<"pmsgt.dw $rd, $rs, $rt",
+                  (PMSLT_DW GPRPairRV32:$rd, GPRPairRV32:$rt, GPRPairRV32:$rs), 0>;
+  def : InstAlias<"pmsgtu.db $rd, $rs, $rt",
+                  (PMSLTU_DB GPRPairRV32:$rd, GPRPairRV32:$rt, GPRPairRV32:$rs), 0>;
+  def : InstAlias<"pmsgtu.dh $rd, $rs, $rt",
+                  (PMSLTU_DH GPRPairRV32:$rd, GPRPairRV32:$rt, GPRPairRV32:$rs), 0>;
+  def : InstAlias<"pmsgtu.dw $rd, $rs, $rt",
+                  (PMSLTU_DW GPRPairRV32:$rd, GPRPairRV32:$rt, GPRPairRV32:$rs), 0>;
+
+  def : InstAlias<"pwcvt.b $rd, $rs", (PWADD_B GPRPairRV32:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pwcvt.h $rd, $rs", (PWADD_H GPRPairRV32:$rd, GPR:$rs, X0)>;
+
+  def : InstAlias<"pwcvtu.b $rd, $rs", (WZIP8P GPRPairRV32:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pwcvtu.h $rd, $rs", (WZIP16P GPRPairRV32:$rd, GPR:$rs, X0)>;
+  def : InstAlias<"pwcvth.b $rd, $rs", (WZIP8P GPRPairRV32:$rd, X0, GPR:$rs)>;
+  def : InstAlias<"pwcvth.h $rd, $rs", (WZIP16P GPRPairRV32:$rd, X0, GPR:$rs)>;
+
+  def : InstAlias<"pncvt.b $rd, $rs", (PNSRLI_B GPR:$rd, GPRPairRV32:$rs, 0)>;
+  def : InstAlias<"pncvt.h $rd, $rs", (PNSRLI_H GPR:$rd, GPRPairRV32:$rs, 0)>;
+  def : InstAlias<"pncvth.b $rd, $rs", (PNSRLI_B GPR:$rd, GPRPairRV32:$rs, 8)>;
+  def : InstAlias<"pncvth.h $rd, $rs", (PNSRLI_H GPR:$rd, GPRPairRV32:$rs, 16)>;
+}
 
 //===----------------------------------------------------------------------===//
 // Codegen patterns

diff  --git a/llvm/test/CodeGen/RISCV/rv32p.ll b/llvm/test/CodeGen/RISCV/rv32p.ll
index 9cb15821034c4..f2c0b914943c1 100644
--- a/llvm/test/CodeGen/RISCV/rv32p.ll
+++ b/llvm/test/CodeGen/RISCV/rv32p.ll
@@ -16,7 +16,7 @@ define i64 @abs_i64(i64 %x) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    bgez a1, .LBB1_2
 ; CHECK-NEXT:  # %bb.1:
-; CHECK-NEXT:    subd a0, zero, a0
+; CHECK-NEXT:    negd a0, a0
 ; CHECK-NEXT:  .LBB1_2:
 ; CHECK-NEXT:    ret
   %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)

diff  --git a/llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll b/llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
index 3c03eaebeb06b..bbf5c313f1163 100644
--- a/llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
@@ -313,7 +313,7 @@ define <4 x i8> @test_paaddu_b(<4 x i8> %a, <4 x i8> %b) {
 define <2 x i16> @test_pabs_h(<2 x i16> %a) {
 ; CHECK-LABEL: test_pabs_h:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pabd.h a0, a0, zero
+; CHECK-NEXT:    pabs.h a0, a0
 ; CHECK-NEXT:    ret
   %res = call <2 x i16> @llvm.abs.v2i16(<2 x i16> %a, i1 0)
   ret <2 x i16> %res
@@ -322,7 +322,7 @@ define <2 x i16> @test_pabs_h(<2 x i16> %a) {
 define <4 x i8> @test_pabs_b(<4 x i8> %a) {
 ; CHECK-LABEL: test_pabs_b:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pabd.b a0, a0, zero
+; CHECK-NEXT:    pabs.b a0, a0
 ; CHECK-NEXT:    ret
   %res = call <4 x i8> @llvm.abs.v4i8(<4 x i8> %a, i1 0)
   ret <4 x i8> %res
@@ -608,7 +608,7 @@ define <4 x i8> @test_insert_vector_8_elem2(<4 x i8> %a, i8 %val) {
 define <4 x i8> @test_non_const_splat_i8(i8 %elt) {
 ; CHECK-LABEL: test_non_const_splat_i8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    padd.bs a0, zero, a0
+; CHECK-NEXT:    pmv.bs a0, a0
 ; CHECK-NEXT:    ret
   %insert = insertelement <4 x i8> poison, i8 %elt, i32 0
   %splat = shufflevector <4 x i8> %insert, <4 x i8> poison, <4 x i32> zeroinitializer
@@ -618,7 +618,7 @@ define <4 x i8> @test_non_const_splat_i8(i8 %elt) {
 define <2 x i16> @test_non_const_splat_i16(i16 %elt) {
 ; CHECK-LABEL: test_non_const_splat_i16:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    padd.hs a0, zero, a0
+; CHECK-NEXT:    pmv.hs a0, a0
 ; CHECK-NEXT:    ret
   %insert = insertelement <2 x i16> poison, i16 %elt, i32 0
   %splat = shufflevector <2 x i16> %insert, <2 x i16> poison, <2 x i32> zeroinitializer
@@ -739,7 +739,7 @@ define <2 x i16> @test_psslai_h(<2 x i16> %a) {
 define <4 x i8> @test_psslai_b(<4 x i8> %a) {
 ; CHECK-LABEL: test_psslai_b:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pmslt.b a1, a0, zero
+; CHECK-NEXT:    pmsltz.b a1, a0
 ; CHECK-NEXT:    pli.b a2, -128
 ; CHECK-NEXT:    pli.b a3, 127
 ; CHECK-NEXT:    merge a1, a3, a2
@@ -756,11 +756,11 @@ define <4 x i8> @test_psslai_b(<4 x i8> %a) {
 define <2 x i16> @test_pssla_hs(<2 x i16> %a, i16 %shamt) {
 ; CHECK-LABEL: test_pssla_hs:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pmslt.h a2, a0, zero
+; CHECK-NEXT:    pmsltz.h a2, a0
 ; CHECK-NEXT:    lui a3, 8
 ; CHECK-NEXT:    plui.h a4, -512
 ; CHECK-NEXT:    addi a3, a3, -1
-; CHECK-NEXT:    padd.hs a3, zero, a3
+; CHECK-NEXT:    pmv.hs a3, a3
 ; CHECK-NEXT:    merge a2, a3, a4
 ; CHECK-NEXT:    psll.hs a3, a0, a1
 ; CHECK-NEXT:    psra.hs a1, a3, a1
@@ -782,7 +782,7 @@ define <2 x i16> @test_pssla_h(<2 x i16> %a, <2 x i16> %b) {
 ; CHECK-RV32-NEXT:    srli a4, a0, 16
 ; CHECK-RV32-NEXT:    sext.h a5, a2
 ; CHECK-RV32-NEXT:    sra a1, a5, a1
-; CHECK-RV32-NEXT:    pmslt.h a5, a0, zero
+; CHECK-RV32-NEXT:    pmsltz.h a5, a0
 ; CHECK-RV32-NEXT:    sll a4, a4, a3
 ; CHECK-RV32-NEXT:    pack a2, a2, a4
 ; CHECK-RV32-NEXT:    sext.h a4, a4
@@ -791,7 +791,7 @@ define <2 x i16> @test_pssla_h(<2 x i16> %a, <2 x i16> %b) {
 ; CHECK-RV32-NEXT:    pack a1, a1, a3
 ; CHECK-RV32-NEXT:    plui.h a3, -512
 ; CHECK-RV32-NEXT:    addi a4, a4, -1
-; CHECK-RV32-NEXT:    padd.hs a4, zero, a4
+; CHECK-RV32-NEXT:    pmv.hs a4, a4
 ; CHECK-RV32-NEXT:    pmseq.h a0, a0, a1
 ; CHECK-RV32-NEXT:    merge a5, a4, a3
 ; CHECK-RV32-NEXT:    merge a0, a5, a2
@@ -806,7 +806,7 @@ define <2 x i16> @test_pssla_h(<2 x i16> %a, <2 x i16> %b) {
 ; CHECK-RV64-NEXT:    sll a6, a0, a1
 ; CHECK-RV64-NEXT:    srli a7, a1, 16
 ; CHECK-RV64-NEXT:    srli t0, a0, 16
-; CHECK-RV64-NEXT:    pmslt.h t1, a0, zero
+; CHECK-RV64-NEXT:    pmsltz.h t1, a0
 ; CHECK-RV64-NEXT:    sll a3, a3, a2
 ; CHECK-RV64-NEXT:    sll a5, a5, a4
 ; CHECK-RV64-NEXT:    sll t0, t0, a7
@@ -822,7 +822,7 @@ define <2 x i16> @test_pssla_h(<2 x i16> %a, <2 x i16> %b) {
 ; CHECK-RV64-NEXT:    addi t2, t2, -1
 ; CHECK-RV64-NEXT:    sext.h a5, a5
 ; CHECK-RV64-NEXT:    sext.h t0, t0
-; CHECK-RV64-NEXT:    padd.hs t2, zero, t2
+; CHECK-RV64-NEXT:    pmv.hs t2, t2
 ; CHECK-RV64-NEXT:    sra a4, a5, a4
 ; CHECK-RV64-NEXT:    sra a5, t0, a7
 ; CHECK-RV64-NEXT:    ppaire.h a2, a4, a2
@@ -1332,7 +1332,7 @@ define <2 x i16> @test_pmul_h(<2 x i16> %a, <2 x i16> %b) {
 ; CHECK-RV32-LABEL: test_pmul_h:
 ; CHECK-RV32:       # %bb.0:
 ; CHECK-RV32-NEXT:    pwmul.h a0, a0, a1
-; CHECK-RV32-NEXT:    pnsrli.h a0, a0, 0
+; CHECK-RV32-NEXT:    pncvt.h a0, a0
 ; CHECK-RV32-NEXT:    ret
 ;
 ; CHECK-RV64-LABEL: test_pmul_h:
@@ -1350,7 +1350,7 @@ define <4 x i8> @test_pmul_b(<4 x i8> %a, <4 x i8> %b) {
 ; CHECK-RV32-LABEL: test_pmul_b:
 ; CHECK-RV32:       # %bb.0:
 ; CHECK-RV32-NEXT:    pwmul.b a0, a0, a1
-; CHECK-RV32-NEXT:    pnsrli.b a0, a0, 0
+; CHECK-RV32-NEXT:    pncvt.b a0, a0
 ; CHECK-RV32-NEXT:    ret
 ;
 ; CHECK-RV64-LABEL: test_pmul_b:

diff  --git a/llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll b/llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
index c431d8a2a1197..0df24837f9cba 100644
--- a/llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+++ b/llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
@@ -377,7 +377,7 @@ define <8 x i8> @test_paaddu_b(<8 x i8> %a, <8 x i8> %b) {
 define <2 x i32> @test_pabs_w(<2 x i32> %a) {
 ; CHECK-LABEL: test_pabs_w:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    psub.w a1, zero, a0
+; CHECK-NEXT:    pneg.w a1, a0
 ; CHECK-NEXT:    pmax.w a0, a0, a1
 ; CHECK-NEXT:    ret
   %res = call <2 x i32> @llvm.abs.v2i32(<2 x i32> %a, i1 0)
@@ -387,7 +387,7 @@ define <2 x i32> @test_pabs_w(<2 x i32> %a) {
 define <4 x i16> @test_pabs_h(<4 x i16> %a) {
 ; CHECK-LABEL: test_pabs_h:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pabd.h a0, a0, zero
+; CHECK-NEXT:    pabs.h a0, a0
 ; CHECK-NEXT:    ret
   %res = call <4 x i16> @llvm.abs.v4i16(<4 x i16> %a, i1 0)
   ret <4 x i16> %res
@@ -396,7 +396,7 @@ define <4 x i16> @test_pabs_h(<4 x i16> %a) {
 define <8 x i8> @test_pabs_b(<8 x i8> %a) {
 ; CHECK-LABEL: test_pabs_b:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pabd.b a0, a0, zero
+; CHECK-NEXT:    pabs.b a0, a0
 ; CHECK-NEXT:    ret
   %res = call <8 x i8> @llvm.abs.v8i8(<8 x i8> %a, i1 0)
   ret <8 x i8> %res
@@ -856,7 +856,7 @@ define <2 x i32> @test_pasubu_w(<2 x i32> %a, <2 x i32> %b) {
 define <2 x i32> @test_non_const_splat_i32(i32 %elt) {
 ; CHECK-LABEL: test_non_const_splat_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    padd.ws a0, zero, a0
+; CHECK-NEXT:    pmv.ws a0, a0
 ; CHECK-NEXT:    ret
   %insert = insertelement <2 x i32> poison, i32 %elt, i32 0
   %splat = shufflevector <2 x i32> %insert, <2 x i32> poison, <2 x i32> zeroinitializer
@@ -1086,7 +1086,7 @@ define <4 x i16> @test_psslai_h(<4 x i16> %a) {
 define <8 x i8> @test_psslai_b(<8 x i8> %a) {
 ; CHECK-LABEL: test_psslai_b:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pmslt.b a1, a0, zero
+; CHECK-NEXT:    pmsltz.b a1, a0
 ; CHECK-NEXT:    pli.b a2, -128
 ; CHECK-NEXT:    pli.b a3, 127
 ; CHECK-NEXT:    merge a1, a3, a2
@@ -1103,11 +1103,11 @@ define <8 x i8> @test_psslai_b(<8 x i8> %a) {
 define <4 x i16> @test_pssla_hs(<4 x i16> %a, i16 %shamt) {
 ; CHECK-LABEL: test_pssla_hs:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pmslt.h a2, a0, zero
+; CHECK-NEXT:    pmsltz.h a2, a0
 ; CHECK-NEXT:    lui a3, 8
 ; CHECK-NEXT:    plui.h a4, -512
 ; CHECK-NEXT:    addi a3, a3, -1
-; CHECK-NEXT:    padd.hs a3, zero, a3
+; CHECK-NEXT:    pmv.hs a3, a3
 ; CHECK-NEXT:    merge a2, a3, a4
 ; CHECK-NEXT:    psll.hs a3, a0, a1
 ; CHECK-NEXT:    psra.hs a1, a3, a1
@@ -1124,11 +1124,11 @@ define <4 x i16> @test_pssla_hs(<4 x i16> %a, i16 %shamt) {
 define <2 x i32> @test_pssla_ws(<2 x i32> %a, i32 %shamt) {
 ; CHECK-LABEL: test_pssla_ws:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pmslt.w a2, a0, zero
+; CHECK-NEXT:    pmsltz.w a2, a0
 ; CHECK-NEXT:    lui a3, 524288
 ; CHECK-NEXT:    plui.w a4, -512
 ; CHECK-NEXT:    addiw a3, a3, -1
-; CHECK-NEXT:    padd.ws a3, zero, a3
+; CHECK-NEXT:    pmv.ws a3, a3
 ; CHECK-NEXT:    merge a2, a3, a4
 ; CHECK-NEXT:    psll.ws a3, a0, a1
 ; CHECK-NEXT:    psra.ws a1, a3, a1
@@ -1152,7 +1152,7 @@ define <4 x i16> @test_pssla_h(<4 x i16> %a, <4 x i16> %b) {
 ; CHECK-NEXT:    sll a6, a0, a1
 ; CHECK-NEXT:    srli a7, a1, 16
 ; CHECK-NEXT:    srli t0, a0, 16
-; CHECK-NEXT:    pmslt.h t1, a0, zero
+; CHECK-NEXT:    pmsltz.h t1, a0
 ; CHECK-NEXT:    sll a3, a3, a2
 ; CHECK-NEXT:    sll a5, a5, a4
 ; CHECK-NEXT:    sll t0, t0, a7
@@ -1168,7 +1168,7 @@ define <4 x i16> @test_pssla_h(<4 x i16> %a, <4 x i16> %b) {
 ; CHECK-NEXT:    addi t2, t2, -1
 ; CHECK-NEXT:    sext.h a5, a5
 ; CHECK-NEXT:    sext.h t0, t0
-; CHECK-NEXT:    padd.hs t2, zero, t2
+; CHECK-NEXT:    pmv.hs t2, t2
 ; CHECK-NEXT:    sra a4, a5, a4
 ; CHECK-NEXT:    sra a5, t0, a7
 ; CHECK-NEXT:    ppaire.h a2, a4, a2
@@ -1189,7 +1189,7 @@ define <2 x i32> @test_pssla_w(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-NEXT:    sllw a2, a0, a1
 ; CHECK-NEXT:    srli a3, a1, 32
 ; CHECK-NEXT:    srli a4, a0, 32
-; CHECK-NEXT:    pmslt.w a5, a0, zero
+; CHECK-NEXT:    pmsltz.w a5, a0
 ; CHECK-NEXT:    sllw a4, a4, a3
 ; CHECK-NEXT:    sraw a1, a2, a1
 ; CHECK-NEXT:    pack a2, a2, a4
@@ -1198,7 +1198,7 @@ define <2 x i32> @test_pssla_w(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-NEXT:    pack a1, a1, a3
 ; CHECK-NEXT:    plui.w a3, -512
 ; CHECK-NEXT:    addiw a4, a4, -1
-; CHECK-NEXT:    padd.ws a4, zero, a4
+; CHECK-NEXT:    pmv.ws a4, a4
 ; CHECK-NEXT:    pmseq.w a0, a0, a1
 ; CHECK-NEXT:    merge a5, a4, a3
 ; CHECK-NEXT:    merge a0, a5, a2
@@ -2596,7 +2596,7 @@ define <2 x i32> @test_bswap_v2i32(<2 x i32> %a) {
 ; CHECK-NEXT:    lui a2, 16
 ; CHECK-NEXT:    psrli.w a3, a0, 24
 ; CHECK-NEXT:    addi a2, a2, -256
-; CHECK-NEXT:    padd.ws a2, zero, a2
+; CHECK-NEXT:    pmv.ws a2, a2
 ; CHECK-NEXT:    and a1, a1, a2
 ; CHECK-NEXT:    and a2, a0, a2
 ; CHECK-NEXT:    or a1, a1, a3
@@ -2671,7 +2671,7 @@ define <2 x i32> @test_bitreverse_v2i32(<2 x i32> %a) {
 ; CHECK-NEXT:    lui a2, 16
 ; CHECK-NEXT:    psrli.w a3, a0, 24
 ; CHECK-NEXT:    addi a2, a2, -256
-; CHECK-NEXT:    padd.ws a2, zero, a2
+; CHECK-NEXT:    pmv.ws a2, a2
 ; CHECK-NEXT:    and a1, a1, a2
 ; CHECK-NEXT:    and a2, a0, a2
 ; CHECK-NEXT:    pslli.w a0, a0, 24

diff  --git a/llvm/test/MC/RISCV/rv32p-aliases-valid.s b/llvm/test/MC/RISCV/rv32p-aliases-valid.s
new file mode 100644
index 0000000000000..3eed22812280c
--- /dev/null
+++ b/llvm/test/MC/RISCV/rv32p-aliases-valid.s
@@ -0,0 +1,272 @@
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-p -M no-aliases \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-p \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-p < %s \
+# RUN:     | llvm-objdump --no-print-imm-hex -d -r -M no-aliases --mattr=+experimental-p - \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-p < %s \
+# RUN:     | llvm-objdump --no-print-imm-hex -d -r --mattr=+experimental-p - \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
+
+# Tests for aliases that are available on both RV32 and RV64
+
+# CHECK-S-OBJ-NOALIAS: padd.bs a0, zero, a1
+# CHECK-S-OBJ: pmv.bs a0, a1
+pmv.bs a0, a1
+
+# CHECK-S-OBJ-NOALIAS: padd.hs a2, zero, a3
+# CHECK-S-OBJ: pmv.hs a2, a3
+pmv.hs a2, a3
+
+# CHECK-S-OBJ-NOALIAS: psub.b a0, zero, a1
+# CHECK-S-OBJ: pneg.b a0, a1
+pneg.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: psub.h a2, zero, a3
+# CHECK-S-OBJ: pneg.h a2, a3
+pneg.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pabd.b a0, a1, zero
+# CHECK-S-OBJ: pabs.b a0, a1
+pabs.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pabd.h a2, a3, zero
+# CHECK-S-OBJ: pabs.h a2, a3
+pabs.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: ppaire.b a0, a1, zero
+# CHECK-S-OBJ: pzext.h.b a0, a1
+pzext.h.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmseq.b a0, a1, zero
+# CHECK-S-OBJ: pmseqz.b a0, a1
+pmseqz.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmseq.h a2, a3, zero
+# CHECK-S-OBJ: pmseqz.h a2, a3
+pmseqz.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.b a0, zero, a1
+# CHECK-S-OBJ: pmsnez.b a0, a1
+pmsnez.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.h a2, zero, a3
+# CHECK-S-OBJ: pmsnez.h a2, a3
+pmsnez.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmslt.b a0, a1, zero
+# CHECK-S-OBJ: pmsltz.b a0, a1
+pmsltz.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.h a2, a3, zero
+# CHECK-S-OBJ: pmsltz.h a2, a3
+pmsltz.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmslt.b a0, zero, a1
+# CHECK-S-OBJ: pmsgtz.b a0, a1
+pmsgtz.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.h a2, zero, a3
+# CHECK-S-OBJ: pmsgtz.h a2, a3
+pmsgtz.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmslt.b a0, a2, a1
+# CHECK-S-OBJ: pmslt.b a0, a2, a1
+pmsgt.b a0, a1, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.h a3, a5, a4
+# CHECK-S-OBJ: pmslt.h a3, a5, a4
+pmsgt.h a3, a4, a5
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.b a0, a2, a1
+# CHECK-S-OBJ: pmsltu.b a0, a2, a1
+pmsgtu.b a0, a1, a2
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.h a3, a5, a4
+# CHECK-S-OBJ: pmsltu.h a3, a5, a4
+pmsgtu.h a3, a4, a5
+
+# Tests for RV32-only aliases (pair operations)
+
+# CHECK-S-OBJ-NOALIAS: padd.dbs a0, zero, a1
+# CHECK-S-OBJ: pmv.dbs a0, a1
+pmv.dbs a0, a1
+
+# CHECK-S-OBJ-NOALIAS: padd.dhs a2, zero, a3
+# CHECK-S-OBJ: pmv.dhs a2, a3
+pmv.dhs a2, a3
+
+# CHECK-S-OBJ-NOALIAS: padd.dws a4, zero, a5
+# CHECK-S-OBJ: pmv.dws a4, a5
+pmv.dws a4, a5
+
+# CHECK-S-OBJ-NOALIAS: pabd.db a0, a2, zero
+# CHECK-S-OBJ: pabs.db a0, a2
+pabs.db a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pabd.dh a4, a6, zero
+# CHECK-S-OBJ: pabs.dh a4, a6
+pabs.dh a4, a6
+
+# CHECK-S-OBJ-NOALIAS: psub.db a0, zero, a2
+# CHECK-S-OBJ: pneg.db a0, a2
+pneg.db a0, a2
+
+# CHECK-S-OBJ-NOALIAS: psub.dh a4, zero, a6
+# CHECK-S-OBJ: pneg.dh a4, a6
+pneg.dh a4, a6
+
+# CHECK-S-OBJ-NOALIAS: psub.dw a0, zero, a2
+# CHECK-S-OBJ: pneg.dw a0, a2
+pneg.dw a0, a2
+
+# CHECK-S-OBJ-NOALIAS: ppaire.db a0, a2, zero
+# CHECK-S-OBJ: pzext.dh.b a0, a2
+pzext.dh.b a0, a2
+
+# CHECK-S-OBJ-NOALIAS: ppaire.dh a4, a6, zero
+# CHECK-S-OBJ: pzext.dw.h a4, a6
+pzext.dw.h a4, a6
+
+# CHECK-S-OBJ-NOALIAS: pmseq.db a0, a2, zero
+# CHECK-S-OBJ: pmseqz.db a0, a2
+pmseqz.db a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmseq.dh a4, a6, zero
+# CHECK-S-OBJ: pmseqz.dh a4, a6
+pmseqz.dh a4, a6
+
+# CHECK-S-OBJ-NOALIAS: pmseq.dw a0, a2, zero
+# CHECK-S-OBJ: pmseqz.dw a0, a2
+pmseqz.dw a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.db a0, zero, a2
+# CHECK-S-OBJ: pmsnez.db a0, a2
+pmsnez.db a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.dh a4, zero, a6
+# CHECK-S-OBJ: pmsnez.dh a4, a6
+pmsnez.dh a4, a6
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.dw a0, zero, a2
+# CHECK-S-OBJ: pmsnez.dw a0, a2
+pmsnez.dw a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.db a0, a2, zero
+# CHECK-S-OBJ: pmsltz.db a0, a2
+pmsltz.db a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.dh a4, a6, zero
+# CHECK-S-OBJ: pmsltz.dh a4, a6
+pmsltz.dh a4, a6
+
+# CHECK-S-OBJ-NOALIAS: pmslt.dw a0, a2, zero
+# CHECK-S-OBJ: pmsltz.dw a0, a2
+pmsltz.dw a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.db a0, zero, a2
+# CHECK-S-OBJ: pmsgtz.db a0, a2
+pmsgtz.db a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.dh a4, zero, a6
+# CHECK-S-OBJ: pmsgtz.dh a4, a6
+pmsgtz.dh a4, a6
+
+# CHECK-S-OBJ-NOALIAS: pmslt.dw a0, zero, a2
+# CHECK-S-OBJ: pmsgtz.dw a0, a2
+pmsgtz.dw a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.db a0, a4, a2
+# CHECK-S-OBJ: pmslt.db a0, a4, a2
+pmsgt.db a0, a2, a4
+
+# CHECK-S-OBJ-NOALIAS: pmslt.dh a6, a2, a0
+# CHECK-S-OBJ: pmslt.dh a6, a2, a0
+pmsgt.dh a6, a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.dw a4, a6, a2
+# CHECK-S-OBJ: pmslt.dw a4, a6, a2
+pmsgt.dw a4, a2, a6
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.db a0, a4, a2
+# CHECK-S-OBJ: pmsltu.db a0, a4, a2
+pmsgtu.db a0, a2, a4
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.dh a6, a2, a0
+# CHECK-S-OBJ: pmsltu.dh a6, a2, a0
+pmsgtu.dh a6, a0, a2
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.dw a4, a6, a2
+# CHECK-S-OBJ: pmsltu.dw a4, a6, a2
+pmsgtu.dw a4, a2, a6
+
+# Tests for RV32-only scalar aliases (MSEQ/MSLT/MSLTU and NEGD)
+
+# CHECK-S-OBJ-NOALIAS: subd a4, zero, a6
+# CHECK-S-OBJ: negd a4, a6
+negd a4, a6
+
+# CHECK-S-OBJ-NOALIAS: mseq a0, a1, zero
+# CHECK-S-OBJ: mseqz a0, a1
+mseqz a0, a1
+
+# CHECK-S-OBJ-NOALIAS: msltu a0, zero, a1
+# CHECK-S-OBJ: msnez a0, a1
+msnez a0, a1
+
+# CHECK-S-OBJ-NOALIAS: mslt a0, a1, zero
+# CHECK-S-OBJ: msltz a0, a1
+msltz a0, a1
+
+# CHECK-S-OBJ-NOALIAS: mslt a0, zero, a1
+# CHECK-S-OBJ: msgtz a0, a1
+msgtz a0, a1
+
+# CHECK-S-OBJ-NOALIAS: mslt a0, a2, a1
+# CHECK-S-OBJ: mslt a0, a2, a1
+msgt a0, a1, a2
+
+# CHECK-S-OBJ-NOALIAS: msltu a3, a5, a4
+# CHECK-S-OBJ: msltu a3, a5, a4
+msgtu a3, a4, a5
+
+# CHECK-S-OBJ-NOALIAS: pwadd.b a0, a1, zero
+# CHECK-S-OBJ: pwcvt.b a0, a1
+pwcvt.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pwadd.h a2, a3, zero
+# CHECK-S-OBJ: pwcvt.h a2, a3
+pwcvt.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: wzip8p a4, a5, zero
+# CHECK-S-OBJ: pwcvtu.b a4, a5
+pwcvtu.b a4, a5
+
+# CHECK-S-OBJ-NOALIAS: wzip16p a6, a7, zero
+# CHECK-S-OBJ: pwcvtu.h a6, a7
+pwcvtu.h a6, a7
+
+# CHECK-S-OBJ-NOALIAS: wzip8p s0, zero, s1
+# CHECK-S-OBJ: pwcvth.b s0, s1
+pwcvth.b s0, s1
+
+# CHECK-S-OBJ-NOALIAS: wzip16p s2, zero, s3
+# CHECK-S-OBJ: pwcvth.h s2, s3
+pwcvth.h s2, s3
+
+# CHECK-S-OBJ-NOALIAS: pnsrli.b s3, s4, 0
+# CHECK-S-OBJ: pncvt.b s3, s4
+pncvt.b s3, s4
+
+# CHECK-S-OBJ-NOALIAS: pnsrli.h s5, s6, 0
+# CHECK-S-OBJ: pncvt.h s5, s6
+pncvt.h s5, s6
+
+# CHECK-S-OBJ-NOALIAS: pnsrli.b s7, s8, 8
+# CHECK-S-OBJ: pncvth.b s7, s8
+pncvth.b s7, s8
+
+# CHECK-S-OBJ-NOALIAS: pnsrli.h s9, s10, 16
+# CHECK-S-OBJ: pncvth.h s9, s10
+pncvth.h s9, s10

diff  --git a/llvm/test/MC/RISCV/rv32p-valid.s b/llvm/test/MC/RISCV/rv32p-valid.s
index 70dae5b5cd81e..525a07eeb17c6 100644
--- a/llvm/test/MC/RISCV/rv32p-valid.s
+++ b/llvm/test/MC/RISCV/rv32p-valid.s
@@ -891,9 +891,9 @@ predsumu.dhs a2, a2, t3
 # CHECK-ASM-AND-OBJ: predsumu.dbs a2, a0, s0
 # CHECK-ASM: encoding: [0x1b,0x46,0x85,0x3c]
 predsumu.dbs a2, a0, s0
-# CHECK-ASM-AND-OBJ: pnsrli.b a2, a0, 0
-# CHECK-ASM: encoding: [0x1b,0xc6,0x05,0x01]
-pnsrli.b a2, a0, 0
+# CHECK-ASM-AND-OBJ: pnsrli.b a2, a0, 2
+# CHECK-ASM: encoding: [0x1b,0xc6,0x25,0x01]
+pnsrli.b a2, a0, 2
 # CHECK-ASM-AND-OBJ: pnsrli.h a0, t3, 1
 # CHECK-ASM: encoding: [0x1b,0xc5,0x1e,0x02]
 pnsrli.h a0, t3, 1

diff  --git a/llvm/test/MC/RISCV/rv64p-aliases-valid.s b/llvm/test/MC/RISCV/rv64p-aliases-valid.s
new file mode 100644
index 0000000000000..1f251f643d214
--- /dev/null
+++ b/llvm/test/MC/RISCV/rv64p-aliases-valid.s
@@ -0,0 +1,158 @@
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-p -M no-aliases \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-p \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-p < %s \
+# RUN:     | llvm-objdump --no-print-imm-hex -d -r -M no-aliases --mattr=+experimental-p - \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-p < %s \
+# RUN:     | llvm-objdump --no-print-imm-hex -d -r --mattr=+experimental-p - \
+# RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
+
+# Tests for aliases that are available on both RV32 and RV64
+
+# CHECK-S-OBJ-NOALIAS: padd.bs a0, zero, a1
+# CHECK-S-OBJ: pmv.bs a0, a1
+pmv.bs a0, a1
+
+# CHECK-S-OBJ-NOALIAS: padd.hs a2, zero, a3
+# CHECK-S-OBJ: pmv.hs a2, a3
+pmv.hs a2, a3
+
+# CHECK-S-OBJ-NOALIAS: psub.b a0, zero, a1
+# CHECK-S-OBJ: pneg.b a0, a1
+pneg.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: psub.h a2, zero, a3
+# CHECK-S-OBJ: pneg.h a2, a3
+pneg.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pabd.b a0, a1, zero
+# CHECK-S-OBJ: pabs.b a0, a1
+pabs.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pabd.h a2, a3, zero
+# CHECK-S-OBJ: pabs.h a2, a3
+pabs.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: ppaire.b a0, a1, zero
+# CHECK-S-OBJ: pzext.h.b a0, a1
+pzext.h.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmseq.b a0, a1, zero
+# CHECK-S-OBJ: pmseqz.b a0, a1
+pmseqz.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmseq.h a2, a3, zero
+# CHECK-S-OBJ: pmseqz.h a2, a3
+pmseqz.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.b a0, zero, a1
+# CHECK-S-OBJ: pmsnez.b a0, a1
+pmsnez.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.h a2, zero, a3
+# CHECK-S-OBJ: pmsnez.h a2, a3
+pmsnez.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmslt.b a0, a1, zero
+# CHECK-S-OBJ: pmsltz.b a0, a1
+pmsltz.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.h a2, a3, zero
+# CHECK-S-OBJ: pmsltz.h a2, a3
+pmsltz.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmslt.b a0, zero, a1
+# CHECK-S-OBJ: pmsgtz.b a0, a1
+pmsgtz.b a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.h a2, zero, a3
+# CHECK-S-OBJ: pmsgtz.h a2, a3
+pmsgtz.h a2, a3
+
+# CHECK-S-OBJ-NOALIAS: pmslt.b a0, a2, a1
+# CHECK-S-OBJ: pmslt.b a0, a2, a1
+pmsgt.b a0, a1, a2
+
+# CHECK-S-OBJ-NOALIAS: pmslt.h a3, a5, a4
+# CHECK-S-OBJ: pmslt.h a3, a5, a4
+pmsgt.h a3, a4, a5
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.b a0, a2, a1
+# CHECK-S-OBJ: pmsltu.b a0, a2, a1
+pmsgtu.b a0, a1, a2
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.h a3, a5, a4
+# CHECK-S-OBJ: pmsltu.h a3, a5, a4
+pmsgtu.h a3, a4, a5
+
+# Tests for RV64-only aliases (word operations)
+
+# CHECK-S-OBJ-NOALIAS: padd.ws a0, zero, a1
+# CHECK-S-OBJ: pmv.ws a0, a1
+pmv.ws a0, a1
+
+# CHECK-S-OBJ-NOALIAS: psub.w a2, zero, a3
+# CHECK-S-OBJ: pneg.w a2, a3
+pneg.w a2, a3
+
+# CHECK-S-OBJ-NOALIAS: ppaire.h a0, a1, zero
+# CHECK-S-OBJ: pzext.w.h a0, a1
+pzext.w.h a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmseq.w a0, a1, zero
+# CHECK-S-OBJ: pmseqz.w a0, a1
+pmseqz.w a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.w a0, zero, a1
+# CHECK-S-OBJ: pmsnez.w a0, a1
+pmsnez.w a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.w a0, a1, zero
+# CHECK-S-OBJ: pmsltz.w a0, a1
+pmsltz.w a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.w a0, zero, a1
+# CHECK-S-OBJ: pmsgtz.w a0, a1
+pmsgtz.w a0, a1
+
+# CHECK-S-OBJ-NOALIAS: pmslt.w a0, a2, a1
+# CHECK-S-OBJ: pmslt.w a0, a2, a1
+pmsgt.w a0, a1, a2
+
+# CHECK-S-OBJ-NOALIAS: pmsltu.w a3, a5, a4
+# CHECK-S-OBJ: pmsltu.w a3, a5, a4
+pmsgtu.w a3, a4, a5
+
+# CHECK-S-OBJ-NOALIAS: zip8p a4, a5, zero
+# CHECK-S-OBJ: pwcvtu.b a4, a5
+pwcvtu.b a4, a5
+
+# CHECK-S-OBJ-NOALIAS: zip16p a6, a7, zero
+# CHECK-S-OBJ: pwcvtu.h a6, a7
+pwcvtu.h a6, a7
+
+# CHECK-S-OBJ-NOALIAS: zip8p s0, zero, s1
+# CHECK-S-OBJ: pwcvth.b s0, s1
+pwcvth.b s0, s1
+
+# CHECK-S-OBJ-NOALIAS: zip16p s2, zero, s3
+# CHECK-S-OBJ: pwcvth.h s2, s3
+pwcvth.h s2, s3
+
+# CHECK-S-OBJ-NOALIAS: unzip8p s3, s4, zero
+# CHECK-S-OBJ: pncvt.b s3, s4
+pncvt.b s3, s4
+
+# CHECK-S-OBJ-NOALIAS: unzip16p s5, s6, zero
+# CHECK-S-OBJ: pncvt.h s5, s6
+pncvt.h s5, s6
+
+# CHECK-S-OBJ-NOALIAS: unzip8hp s7, s8, zero
+# CHECK-S-OBJ: pncvth.b s7, s8
+pncvth.b s7, s8
+
+# CHECK-S-OBJ-NOALIAS: unzip16hp s9, s10, zero
+# CHECK-S-OBJ: pncvth.h s9, s10
+pncvth.h s9, s10


        


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