[llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 13 08:00:47 PDT 2026
https://github.com/MacDue updated https://github.com/llvm/llvm-project/pull/188248
>From bd5b2be2032c61ddc995f785fa21839ec5a82b51 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: Wed, 8 Apr 2026 11:03:28 +0000
Subject: [PATCH 1/2] Remove pointers
---
llvm/docs/LangRef.rst | 80 ++---
llvm/include/llvm/CodeGen/BasicTTIImpl.h | 20 +-
llvm/include/llvm/IR/Intrinsics.td | 4 +-
.../Target/AArch64/AArch64ISelLowering.cpp | 17 +-
.../CostModel/AArch64/loop_dependence_mask.ll | 284 +++++++++---------
llvm/test/CodeGen/AArch64/alias_mask.ll | 136 ++++-----
llvm/test/CodeGen/AArch64/alias_mask_nosve.ll | 4 +-
.../CodeGen/AArch64/alias_mask_scalable.ll | 116 +++----
.../AArch64/alias_mask_scalable_nosve2.ll | 4 +-
9 files changed, 344 insertions(+), 321 deletions(-)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 5584e0828d3cd..f14877ed16c03 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -25102,16 +25102,16 @@ This is an overloaded intrinsic.
::
- declare <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
- declare <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
- declare <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
- declare <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
+ declare <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %addrA, i64 %addrB, i64 immarg %elementSize)
+ declare <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i32(i32 %addrA, i32 %addrB, i64 immarg %elementSize)
+ declare <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %addrA, i64 %addrB, i64 immarg %elementSize)
+ declare <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %addrA, i64 %addrB, i64 immarg %elementSize)
Overview:
"""""""""
-Given a vector load from %ptrA followed by a vector store to %ptrB, this
+Given a vector load from %addrA followed by a vector store to %addrB, this
instruction generates a mask where an active lane indicates that the
write-after-read sequence can be performed safely for that lane, without the
danger of a write-after-read hazard occurring.
@@ -25123,22 +25123,22 @@ the aliasing of pointers.
Arguments:
""""""""""
-The first two arguments are pointers and the last argument is an immediate.
+The first two arguments are integers and the last argument is an immediate.
The result is a vector with the i1 element type.
Semantics:
""""""""""
``%elementSize`` is the size of the accessed elements in bytes.
-The intrinsic returns ``poison`` if the distance between ``%prtA`` and ``%ptrB``
-is smaller than ``VF * %elementsize`` and either ``%ptrA + VF * %elementSize``
-or ``%ptrB + VF * %elementSize`` wrap.
+The intrinsic returns ``poison`` if the distance between ``%addrA`` and ``%addrB``
+is smaller than ``VF * %elementsize`` and either ``%addrA + VF * %elementSize``
+or ``%addrB + VF * %elementSize`` wrap.
-The element of the result mask is active when loading from %ptrA then storing to
-%ptrB is safe and doesn't result in a write-after-read hazard, meaning that:
+The element of the result mask is active when loading from %addrA then storing to
+%addrB is safe and doesn't result in a write-after-read hazard, meaning that:
-* (ptrB - ptrA) <= 0 (guarantees that all lanes are loaded before any stores), or
-* elementSize * lane < (ptrB - ptrA) (guarantees that this lane is loaded
+* (addrB - addrA) <= 0 (guarantees that all lanes are loaded before any stores), or
+* elementSize * lane < (addrB - addrA) (guarantees that this lane is loaded
before the store to the same address)
Examples:
@@ -25146,14 +25146,16 @@ Examples:
.. code-block:: llvm
- %loop.dependence.mask = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %ptrA, ptr %ptrB, i64 4)
- %vecA = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
+ %addrA = ptrtoaddr ptr %ptrA to i64
+ %addrB = ptrtoaddr ptr %ptrB to i64
+ %loop.dependence.mask = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %addrA, i64 %addrB, i64 4)
+ %vecA = call <4 x i32> @llvm.masked.load.v4i32.v4i32.p0(ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
[...]
- call @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %vecA, ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask)
+ call @llvm.masked.store.v4i32.v4i32.p0(<4 x i32> %vecA, ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask)
; For the above example, consider the following cases:
;
- ; 1. ptrA >= ptrB
+ ; 1. addrA >= addrB
;
; load = <0,1,2,3> ; uint32_t load = array[i+2];
; store = <0,1,2,3> ; array[i] = store;
@@ -25161,7 +25163,7 @@ Examples:
; This results in an all-true mask, as the load always occurs before the
; store, so it does not depend on any values to be stored.
;
- ; 2. ptrB - ptrA = 2 * elementSize:
+ ; 2. addrB - addrA = 2 * elementSize:
;
; load = <0,1,2,3> ; uint32_t load = array[i];
; store = <0,1,2,3> ; array[i+2] = store;
@@ -25170,7 +25172,7 @@ Examples:
; we can only read two lanes before we would read values that have yet to
; be written.
;
- ; 3. ptrB - ptrA = 4 * elementSize
+ ; 3. addrB - addrA = 4 * elementSize
;
; load = <0,1,2,3> ; uint32_t load = array[i];
; store = <0,1,2,3> ; array[i+4] = store;
@@ -25189,16 +25191,16 @@ This is an overloaded intrinsic.
::
- declare <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
- declare <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
- declare <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
- declare <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %ptrA, ptr %ptrB, i64 immarg %elementSize)
+ declare <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %addrA, i64 %addrB, i64 immarg %elementSize)
+ declare <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i32(i32 %addrA, i32 %addrB, i64 immarg %elementSize)
+ declare <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %addrA, i64 %addrB, i64 immarg %elementSize)
+ declare <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %addrA, i64 %addrB, i64 immarg %elementSize)
Overview:
"""""""""
-Given a vector store to %ptrA followed by a vector load from %ptrB, this
+Given a vector store to %addrA followed by a vector load from %addrB, this
instruction generates a mask where an active lane indicates that the
read-after-write sequence can be performed safely for that lane, without a
read-after-write hazard or a store-to-load forwarding hazard being introduced.
@@ -25215,23 +25217,23 @@ complete.
Arguments:
""""""""""
-The first two arguments are pointers and the last argument is an immediate.
+The first two arguments are integers and the last argument is an immediate.
The result is a vector with the i1 element type.
Semantics:
""""""""""
``%elementSize`` is the size of the accessed elements in bytes.
-The intrinsic returns ``poison`` if the distance between ``%prtA`` and ``%ptrB``
-is smaller than ``VF * %elementsize`` and either ``%ptrA + VF * %elementSize``
-or ``%ptrB + VF * %elementSize`` wrap.
+The intrinsic returns ``poison`` if the distance between ``%addrA`` and ``%addrB``
+is smaller than ``VF * %elementsize`` and either ``%addrA + VF * %elementSize``
+or ``%addrB + VF * %elementSize`` wrap.
-The element of the result mask is active when storing to %ptrA then loading from
-%ptrB is safe and doesn't result in aliasing, meaning that:
+The element of the result mask is active when storing to %addrA then loading from
+%addrB is safe and doesn't result in aliasing, meaning that:
-* elementSize * lane < abs(ptrB - ptrA) (guarantees that the store of this lane
+* elementSize * lane < abs(addrB - addrA) (guarantees that the store of this lane
occurs before loading from this address), or
-* ptrA == ptrB (doesn't introduce any new hazards that weren't in the scalar
+* addrA == addrB (doesn't introduce any new hazards that weren't in the scalar
code)
Examples:
@@ -25239,21 +25241,23 @@ Examples:
.. code-block:: llvm
- %loop.dependence.mask = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %ptrA, ptr %ptrB, i64 4)
- call @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %vecA, ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask)
+ %addrA = ptrtoaddr ptr %ptrA to i64
+ %addrB = ptrtoaddr ptr %ptrB to i64
+ %loop.dependence.mask = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %addrA, i64 %addrB, i64 4)
+ call @llvm.masked.store.v4i32.v4i32.p0(<4 x i32> %vecA, ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask)
[...]
- %vecB = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
+ %vecB = call <4 x i32> @llvm.masked.load.v4i32.v4i32.p0(ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
; For the above example, consider the following cases:
;
- ; 1. ptrA == ptrB
+ ; 1. addrA == addrB
;
; store = <0,1,2,3> ; array[i] = store;
; load = <0,1,2,3> ; uint32_t load = array[i];
;
; This results in a all-true mask. There is no conflict.
;
- ; 2. ptrB - ptrA = 2 * elementSize
+ ; 2. addrB - addrA = 2 * elementSize
;
; store = <0,1,2,3> ; array[i] = store;
; load = <0,1,2,3> ; uint32_t load = array[i+2];
@@ -25261,7 +25265,7 @@ Examples:
; This results in a mask with the first two lanes active. In this case,
; only two lanes can be written without overwriting values yet to be read.
;
- ; 3. ptrB - ptrA = -2 * elementSize
+ ; 3. addrB - addrA = -2 * elementSize
;
; store = <0,1,2,3> ; array[i+2] = store;
; load = <0,1,2,3> ; uint32_t load = array[i];
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index aa8f9beacac90..44ecded36b0e7 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -2207,35 +2207,31 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
// upper_bound = select cmp, -1, diff
// mask = get_active_lane_mask 0, upper_bound
//
- auto *PtrTy = cast<PointerType>(ICA.getArgTypes()[0]);
- Type *IntPtrTy = IntegerType::getIntNTy(
- RetTy->getContext(), thisT()->getDataLayout().getPointerSizeInBits(
- PtrTy->getAddressSpace()));
+ Type *AddrTy = ICA.getArgTypes()[0];
bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
InstructionCost Cost =
- thisT()->getArithmeticInstrCost(Instruction::Sub, IntPtrTy, CostKind);
+ thisT()->getArithmeticInstrCost(Instruction::Sub, AddrTy, CostKind);
if (IsReadAfterWrite) {
- IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, IntPtrTy, {IntPtrTy},
- {});
+ IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, AddrTy, {AddrTy}, {});
Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
}
TTI::OperandValueInfo EltSizeOpInfo =
TTI::getOperandInfo(ICA.getArgs()[2]);
- Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, IntPtrTy,
+ Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, AddrTy,
CostKind, {}, EltSizeOpInfo);
Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
CmpInst::Predicate Pred =
IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
- Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy,
- IntPtrTy, Pred, CostKind);
- Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, IntPtrTy,
+ Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy, AddrTy,
+ Pred, CostKind);
+ Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, AddrTy,
CondTy, Pred, CostKind);
IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
- {IntPtrTy, IntPtrTy}, FMF);
+ {AddrTy, AddrTy}, FMF);
Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
return Cost;
}
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 0b0fbf7bffc79..3abf775f88d85 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -2549,12 +2549,12 @@ let IntrProperties = [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>] in {
def int_loop_dependence_raw_mask:
DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [llvm_ptr_ty, llvm_ptr_ty, llvm_i64_ty],
+ [llvm_anyint_ty, LLVMMatchType<1>, llvm_i64_ty],
[IntrNoMem, IntrNoSync, IntrWillReturn, ImmArg<ArgIndex<2>>]>;
def int_loop_dependence_war_mask:
DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [llvm_ptr_ty, llvm_ptr_ty, llvm_i64_ty],
+ [llvm_anyint_ty, LLVMMatchType<1>, llvm_i64_ty],
[IntrNoMem, IntrNoSync, IntrWillReturn, ImmArg<ArgIndex<2>>]>;
def int_get_active_lane_mask:
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 165541ba089c8..cf767872571bd 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -5581,6 +5581,7 @@ AArch64TargetLowering::LowerLOOP_DEPENDENCE_MASK(SDValue Op,
unsigned LaneOffset = Op.getConstantOperandVal(3);
unsigned NumElements = VT.getVectorMinNumElements();
uint64_t EltSizeInBytes = Op.getConstantOperandVal(2);
+ EVT AddrTy = Op->getOperand(0).getValueType();
// Lane offsets and other element sizes are not supported by whilewr/rw.
if (LaneOffset != 0 || !is_contained({1u, 2u, 4u, 8u}, EltSizeInBytes))
@@ -5590,9 +5591,19 @@ AArch64TargetLowering::LowerLOOP_DEPENDENCE_MASK(SDValue Op,
EVT PredVT =
getPackedSVEVectorVT(EltVT).changeElementType(*DAG.getContext(), MVT::i1);
- // Legal whilewr/rw (lowered by tablegen matcher).
- if (PredVT == VT)
- return Op;
+ if (PredVT == VT) {
+ // Legal whilewr/rw (lowered by tablegen matcher).
+ if (AddrTy == MVT::i64)
+ return Op;
+
+ // Almost legal whilewr/rw (addresses must be promoted to i64).
+ assert(AddrTy == MVT::i32 && "Only expected i32 to be legal!");
+ return DAG.getNode(
+ Op.getOpcode(), DL, VT,
+ DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Op->getOperand(0)),
+ DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Op->getOperand(1)),
+ Op->getOperand(2), Op->getOperand(3));
+ }
// Expand if this mask needs splitting (this will produce a whilelo).
if (NumElements > PredVT.getVectorMinNumElements())
diff --git a/llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll b/llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
index 74bd41db4a64d..6d0df7e184447 100644
--- a/llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
@@ -4,186 +4,186 @@
; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=aarch64-linux-gnu -mattr=+sme | FileCheck %s --check-prefixes=CHECK,CHECK-SME
; loop.dependence.{war,raw}.mask can be lowered to while{wr,rw} if SVE2 or SME is enabled.
-define void @loop_dependence_war_mask(ptr %a, ptr %b) {
-; CHECK-EXPANDED-LABEL: 'loop_dependence_war_mask'
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 39 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 8)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 8)
+define void @loop_dependence_war_mask.i64(i64 %a, i64 %b) {
+; CHECK-EXPANDED-LABEL: 'loop_dependence_war_mask.i64'
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 39 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 8)
; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
-; CHECK-LABEL: 'loop_dependence_war_mask'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 1)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 2)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 4)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 8)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 1)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 2)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 4)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 8)
+; CHECK-LABEL: 'loop_dependence_war_mask.i64'
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 8)
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
entry:
- %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 1)
- %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 2)
- %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 4)
- %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 8)
+ %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+ %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+ %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+ %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
- %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 1)
- %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 2)
- %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 4)
- %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 8)
+ %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+ %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+ %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+ %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
ret void
}
-define void @loop_dependence_raw_mask(ptr %a, ptr %b) {
-; CHECK-EXPANDED-LABEL: 'loop_dependence_raw_mask'
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 8)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 8)
+define void @loop_dependence_raw_mask.i64(i64 %a, i64 %b) {
+; CHECK-EXPANDED-LABEL: 'loop_dependence_raw_mask.i64'
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 8)
; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
-; CHECK-LABEL: 'loop_dependence_raw_mask'
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 1)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 2)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 4)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 8)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %a, ptr %b, i64 1)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1(ptr %a, ptr %b, i64 2)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1(ptr %a, ptr %b, i64 4)
-; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 8)
+; CHECK-LABEL: 'loop_dependence_raw_mask.i64'
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 8)
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
entry:
- %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 1)
- %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 2)
- %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 4)
- %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 8)
+ %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+ %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+ %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+ %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
- %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 1)
- %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 2)
- %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 4)
- %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 8)
+ %res5 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
+ %res6 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
+ %res7 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
+ %res8 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
ret void
}
; Invalid element size and return type combinations must be expanded, even with sve2/sme
-define void @loop_dependence_war_mask_invalid(ptr %a, ptr %b) {
-; CHECK-EXPANDED-LABEL: 'loop_dependence_war_mask_invalid'
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 39 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 8)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 10)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 8)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 10)
+define void @loop_dependence_war_mask_invalid.i64(i64 %a, i64 %b) {
+; CHECK-EXPANDED-LABEL: 'loop_dependence_war_mask_invalid.i64'
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 39 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 10)
; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
-; CHECK-SVE2-LABEL: 'loop_dependence_war_mask_invalid'
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 39 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 10)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 10)
+; CHECK-SVE2-LABEL: 'loop_dependence_war_mask_invalid.i64'
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 39 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 10)
; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
-; CHECK-SME-LABEL: 'loop_dependence_war_mask_invalid'
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 10)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 10)
+; CHECK-SME-LABEL: 'loop_dependence_war_mask_invalid.i64'
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 10)
; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
entry:
- %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 8)
- %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 4)
- %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 2)
- %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 1)
- %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 10)
+ %res1 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+ %res2 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+ %res3 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+ %res4 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+ %res5 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
- %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 8)
- %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 4)
- %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 2)
- %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 1)
- %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 10)
+ %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+ %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+ %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+ %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+ %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
ret void
}
-define void @loop_dependence_raw_mask_invalid(ptr %a, ptr %b) {
-; CHECK-EXPANDED-LABEL: 'loop_dependence_raw_mask_invalid'
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 8)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 10)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %a, ptr %b, i64 8)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1(ptr %a, ptr %b, i64 4)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1(ptr %a, ptr %b, i64 2)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 1)
-; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 10)
+define void @loop_dependence_raw_mask_invalid.i64(i64 %a, i64 %b) {
+; CHECK-EXPANDED-LABEL: 'loop_dependence_raw_mask_invalid.i64'
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 10)
; CHECK-EXPANDED-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
-; CHECK-SVE2-LABEL: 'loop_dependence_raw_mask_invalid'
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 10)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 10)
+; CHECK-SVE2-LABEL: 'loop_dependence_raw_mask_invalid.i64'
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 10)
; CHECK-SVE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
-; CHECK-SME-LABEL: 'loop_dependence_raw_mask_invalid'
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 10)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %a, ptr %b, i64 8)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1(ptr %a, ptr %b, i64 4)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1(ptr %a, ptr %b, i64 2)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 1)
-; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 10)
+; CHECK-SME-LABEL: 'loop_dependence_raw_mask_invalid.i64'
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 21 for instruction: %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1.i64(i64 %a, i64 %b, i64 2)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 1)
+; CHECK-SME-NEXT: Cost Model: Invalid cost for instruction: %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 10)
; CHECK-SME-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
entry:
- %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 8)
- %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 4)
- %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 2)
- %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 1)
- %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 10)
+ %res1 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+ %res2 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+ %res3 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+ %res4 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+ %res5 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
- %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 8)
- %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 4)
- %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 2)
- %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 1)
- %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 10)
+ %res6 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
+ %res7 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
+ %res8 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 2)
+ %res9 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 1)
+ %res10 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 10)
ret void
}
diff --git a/llvm/test/CodeGen/AArch64/alias_mask.ll b/llvm/test/CodeGen/AArch64/alias_mask.ll
index 42833aa19a7fd..878888263ef47 100644
--- a/llvm/test/CodeGen/AArch64/alias_mask.ll
+++ b/llvm/test/CodeGen/AArch64/alias_mask.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64 -mattr=+sve2 %s -o - | FileCheck %s
-define <16 x i1> @whilewr_8(ptr %a, ptr %b) {
+define <16 x i1> @whilewr_8(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
@@ -9,11 +9,11 @@ define <16 x i1> @whilewr_8(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 1)
+ %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
ret <16 x i1> %0
}
-define <8 x i1> @whilewr_16(ptr %a, ptr %b) {
+define <8 x i1> @whilewr_16(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.h, x0, x1
@@ -21,11 +21,11 @@ define <8 x i1> @whilewr_16(ptr %a, ptr %b) {
; CHECK-NEXT: xtn v0.8b, v0.8h
; CHECK-NEXT: ret
entry:
- %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 2)
+ %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
ret <8 x i1> %0
}
-define <4 x i1> @whilewr_32(ptr %a, ptr %b) {
+define <4 x i1> @whilewr_32(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.s, x0, x1
@@ -33,11 +33,11 @@ define <4 x i1> @whilewr_32(ptr %a, ptr %b) {
; CHECK-NEXT: xtn v0.4h, v0.4s
; CHECK-NEXT: ret
entry:
- %0 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 4)
+ %0 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
ret <4 x i1> %0
}
-define <2 x i1> @whilewr_64(ptr %a, ptr %b) {
+define <2 x i1> @whilewr_64(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.d, x0, x1
@@ -45,11 +45,11 @@ define <2 x i1> @whilewr_64(ptr %a, ptr %b) {
; CHECK-NEXT: xtn v0.2s, v0.2d
; CHECK-NEXT: ret
entry:
- %0 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 8)
+ %0 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
ret <2 x i1> %0
}
-define <16 x i1> @whilerw_8(ptr %a, ptr %b) {
+define <16 x i1> @whilerw_8(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.b, x0, x1
@@ -57,11 +57,11 @@ define <16 x i1> @whilerw_8(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1(ptr %a, ptr %b, i64 1)
+ %0 = call <16 x i1> @llvm.loop.dependence.raw.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
ret <16 x i1> %0
}
-define <8 x i1> @whilerw_16(ptr %a, ptr %b) {
+define <8 x i1> @whilerw_16(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_16:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.h, x0, x1
@@ -69,11 +69,11 @@ define <8 x i1> @whilerw_16(ptr %a, ptr %b) {
; CHECK-NEXT: xtn v0.8b, v0.8h
; CHECK-NEXT: ret
entry:
- %0 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1(ptr %a, ptr %b, i64 2)
+ %0 = call <8 x i1> @llvm.loop.dependence.raw.mask.v8i1.i64(i64 %a, i64 %b, i64 2)
ret <8 x i1> %0
}
-define <4 x i1> @whilerw_32(ptr %a, ptr %b) {
+define <4 x i1> @whilerw_32(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_32:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.s, x0, x1
@@ -81,11 +81,11 @@ define <4 x i1> @whilerw_32(ptr %a, ptr %b) {
; CHECK-NEXT: xtn v0.4h, v0.4s
; CHECK-NEXT: ret
entry:
- %0 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1(ptr %a, ptr %b, i64 4)
+ %0 = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %a, i64 %b, i64 4)
ret <4 x i1> %0
}
-define <2 x i1> @whilerw_64(ptr %a, ptr %b) {
+define <2 x i1> @whilerw_64(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_64:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.d, x0, x1
@@ -93,11 +93,11 @@ define <2 x i1> @whilerw_64(ptr %a, ptr %b) {
; CHECK-NEXT: xtn v0.2s, v0.2d
; CHECK-NEXT: ret
entry:
- %0 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1(ptr %a, ptr %b, i64 8)
+ %0 = call <2 x i1> @llvm.loop.dependence.raw.mask.v2i1.i64(i64 %a, i64 %b, i64 8)
ret <2 x i1> %0
}
-define <32 x i1> @whilewr_8_split(ptr %a, ptr %b) {
+define <32 x i1> @whilewr_8_split(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_split:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x9, x1, x0
@@ -122,11 +122,11 @@ define <32 x i1> @whilewr_8_split(ptr %a, ptr %b) {
; CHECK-NEXT: str h1, [x8, #2]
; CHECK-NEXT: ret
entry:
- %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1(ptr %a, ptr %b, i64 1)
+ %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1.i64(i64 %a, i64 %b, i64 1)
ret <32 x i1> %0
}
-define <64 x i1> @whilewr_8_split2(ptr %a, ptr %b) {
+define <64 x i1> @whilewr_8_split2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_split2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x9, x1, x0
@@ -167,11 +167,11 @@ define <64 x i1> @whilewr_8_split2(ptr %a, ptr %b) {
; CHECK-NEXT: str h1, [x8, #2]
; CHECK-NEXT: ret
entry:
- %0 = call <64 x i1> @llvm.loop.dependence.war.mask.v64i1(ptr %a, ptr %b, i64 1)
+ %0 = call <64 x i1> @llvm.loop.dependence.war.mask.v64i1.i64(i64 %a, i64 %b, i64 1)
ret <64 x i1> %0
}
-define <16 x i1> @whilewr_16_expand(ptr %a, ptr %b) {
+define <16 x i1> @whilewr_16_expand(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_expand:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x8, x1, x0
@@ -184,11 +184,11 @@ define <16 x i1> @whilewr_16_expand(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 2)
+ %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 2)
ret <16 x i1> %0
}
-define <32 x i1> @whilewr_16_expand2(ptr %a, ptr %b) {
+define <32 x i1> @whilewr_16_expand2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_expand2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x9, x1, x0
@@ -215,11 +215,11 @@ define <32 x i1> @whilewr_16_expand2(ptr %a, ptr %b) {
; CHECK-NEXT: str h1, [x8]
; CHECK-NEXT: ret
entry:
- %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1(ptr %a, ptr %b, i64 2)
+ %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1.i64(i64 %a, i64 %b, i64 2)
ret <32 x i1> %0
}
-define <8 x i1> @whilewr_32_expand(ptr %a, ptr %b) {
+define <8 x i1> @whilewr_32_expand(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_expand:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -233,11 +233,11 @@ define <8 x i1> @whilewr_32_expand(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 4)
+ %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 4)
ret <8 x i1> %0
}
-define <16 x i1> @whilewr_32_expand2(ptr %a, ptr %b) {
+define <16 x i1> @whilewr_32_expand2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_expand2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -251,11 +251,11 @@ define <16 x i1> @whilewr_32_expand2(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 4)
+ %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 4)
ret <16 x i1> %0
}
-define <32 x i1> @whilewr_32_expand3(ptr %a, ptr %b) {
+define <32 x i1> @whilewr_32_expand3(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_expand3:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x9, x1, x0
@@ -283,11 +283,11 @@ define <32 x i1> @whilewr_32_expand3(ptr %a, ptr %b) {
; CHECK-NEXT: str h1, [x8]
; CHECK-NEXT: ret
entry:
- %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1(ptr %a, ptr %b, i64 4)
+ %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1.i64(i64 %a, i64 %b, i64 4)
ret <32 x i1> %0
}
-define <4 x i1> @whilewr_64_expand(ptr %a, ptr %b) {
+define <4 x i1> @whilewr_64_expand(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -301,11 +301,11 @@ define <4 x i1> @whilewr_64_expand(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 8)
+ %0 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 8)
ret <4 x i1> %0
}
-define <8 x i1> @whilewr_64_expand2(ptr %a, ptr %b) {
+define <8 x i1> @whilewr_64_expand2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -319,11 +319,11 @@ define <8 x i1> @whilewr_64_expand2(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 8)
+ %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 8)
ret <8 x i1> %0
}
-define <16 x i1> @whilewr_64_expand3(ptr %a, ptr %b) {
+define <16 x i1> @whilewr_64_expand3(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand3:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -337,11 +337,11 @@ define <16 x i1> @whilewr_64_expand3(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 8)
+ %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 8)
ret <16 x i1> %0
}
-define <32 x i1> @whilewr_64_expand4(ptr %a, ptr %b) {
+define <32 x i1> @whilewr_64_expand4(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand4:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x9, x1, x0
@@ -369,11 +369,11 @@ define <32 x i1> @whilewr_64_expand4(ptr %a, ptr %b) {
; CHECK-NEXT: str h1, [x8]
; CHECK-NEXT: ret
entry:
- %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1(ptr %a, ptr %b, i64 8)
+ %0 = call <32 x i1> @llvm.loop.dependence.war.mask.v32i1.i64(i64 %a, i64 %b, i64 8)
ret <32 x i1> %0
}
-define <9 x i1> @whilewr_8_widen(ptr %a, ptr %b) {
+define <9 x i1> @whilewr_8_widen(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_widen:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
@@ -401,11 +401,11 @@ define <9 x i1> @whilewr_8_widen(ptr %a, ptr %b) {
; CHECK-NEXT: strh w9, [x8]
; CHECK-NEXT: ret
entry:
- %0 = call <9 x i1> @llvm.loop.dependence.war.mask.v9i1(ptr %a, ptr %b, i64 1)
+ %0 = call <9 x i1> @llvm.loop.dependence.war.mask.v9i1.i64(i64 %a, i64 %b, i64 1)
ret <9 x i1> %0
}
-define <7 x i1> @whilewr_16_widen(ptr %a, ptr %b) {
+define <7 x i1> @whilewr_16_widen(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_widen:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.h, x0, x1
@@ -420,11 +420,11 @@ define <7 x i1> @whilewr_16_widen(ptr %a, ptr %b) {
; CHECK-NEXT: umov w6, v0.b[6]
; CHECK-NEXT: ret
entry:
- %0 = call <7 x i1> @llvm.loop.dependence.war.mask.v7i1(ptr %a, ptr %b, i64 2)
+ %0 = call <7 x i1> @llvm.loop.dependence.war.mask.v7i1.i64(i64 %a, i64 %b, i64 2)
ret <7 x i1> %0
}
-define <3 x i1> @whilewr_32_widen(ptr %a, ptr %b) {
+define <3 x i1> @whilewr_32_widen(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_widen:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.s, x0, x1
@@ -435,11 +435,11 @@ define <3 x i1> @whilewr_32_widen(ptr %a, ptr %b) {
; CHECK-NEXT: umov w2, v0.h[2]
; CHECK-NEXT: ret
entry:
- %0 = call <3 x i1> @llvm.loop.dependence.war.mask.v3i1(ptr %a, ptr %b, i64 4)
+ %0 = call <3 x i1> @llvm.loop.dependence.war.mask.v3i1.i64(i64 %a, i64 %b, i64 4)
ret <3 x i1> %0
}
-define <16 x i1> @whilewr_badimm(ptr %a, ptr %b) {
+define <16 x i1> @whilewr_badimm(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_badimm:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov x8, #6148914691236517205 // =0x5555555555555555
@@ -454,93 +454,93 @@ define <16 x i1> @whilewr_badimm(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 3)
+ %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 3)
ret <16 x i1> %0
}
; Scalarizing <1 x i1> types
-define <1 x i1> @whilewr_8_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilewr_8_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1(ptr %a, ptr %b, i64 1)
+ %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1.i64(i64 %a, i64 %b, i64 1)
ret <1 x i1> %0
}
-define <1 x i1> @whilewr_16_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilewr_16_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1(ptr %a, ptr %b, i64 2)
+ %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1.i64(i64 %a, i64 %b, i64 2)
ret <1 x i1> %0
}
-define <1 x i1> @whilewr_32_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilewr_32_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1(ptr %a, ptr %b, i64 4)
+ %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1.i64(i64 %a, i64 %b, i64 4)
ret <1 x i1> %0
}
-define <1 x i1> @whilewr_64_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilewr_64_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1(ptr %a, ptr %b, i64 8)
+ %0 = call <1 x i1> @llvm.loop.dependence.war.mask.v1i1.i64(i64 %a, i64 %b, i64 8)
ret <1 x i1> %0
}
-define <1 x i1> @whilerw_8_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilerw_8_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_8_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1(ptr %a, ptr %b, i64 1)
+ %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1.i64(i64 %a, i64 %b, i64 1)
ret <1 x i1> %0
}
-define <1 x i1> @whilerw_16_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilerw_16_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_16_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1(ptr %a, ptr %b, i64 2)
+ %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1.i64(i64 %a, i64 %b, i64 2)
ret <1 x i1> %0
}
-define <1 x i1> @whilerw_32_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilerw_32_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_32_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1(ptr %a, ptr %b, i64 4)
+ %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1.i64(i64 %a, i64 %b, i64 4)
ret <1 x i1> %0
}
-define <1 x i1> @whilerw_64_scalarize(ptr %a, ptr %b) {
+define <1 x i1> @whilerw_64_scalarize(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_64_scalarize:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
entry:
- %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1(ptr %a, ptr %b, i64 8)
+ %0 = call <1 x i1> @llvm.loop.dependence.raw.mask.v1i1.i64(i64 %a, i64 %b, i64 8)
ret <1 x i1> %0
}
-define <8 x i1> @whilewr_extract_v8i1(ptr %a, ptr %b) {
+define <8 x i1> @whilewr_extract_v8i1(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_extract_v8i1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
@@ -548,11 +548,11 @@ define <8 x i1> @whilewr_extract_v8i1(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1(ptr %a, ptr %b, i64 1)
+ %0 = call <8 x i1> @llvm.loop.dependence.war.mask.v8i1.i64(i64 %a, i64 %b, i64 1)
ret <8 x i1> %0
}
-define <4 x i1> @whilewr_extract_v4i1(ptr %a, ptr %b) {
+define <4 x i1> @whilewr_extract_v4i1(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_extract_v4i1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
@@ -561,11 +561,11 @@ define <4 x i1> @whilewr_extract_v4i1(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1(ptr %a, ptr %b, i64 1)
+ %0 = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %a, i64 %b, i64 1)
ret <4 x i1> %0
}
-define <2 x i1> @whilewr_extract_v2i1(ptr %a, ptr %b) {
+define <2 x i1> @whilewr_extract_v2i1(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_extract_v2i1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.s, x0, x1
@@ -573,6 +573,6 @@ define <2 x i1> @whilewr_extract_v2i1(ptr %a, ptr %b) {
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
entry:
- %0 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1(ptr %a, ptr %b, i64 4)
+ %0 = call <2 x i1> @llvm.loop.dependence.war.mask.v2i1.i64(i64 %a, i64 %b, i64 4)
ret <2 x i1> %0
}
diff --git a/llvm/test/CodeGen/AArch64/alias_mask_nosve.ll b/llvm/test/CodeGen/AArch64/alias_mask_nosve.ll
index 0b1221244a757..fecbf2ea10a07 100644
--- a/llvm/test/CodeGen/AArch64/alias_mask_nosve.ll
+++ b/llvm/test/CodeGen/AArch64/alias_mask_nosve.ll
@@ -4,8 +4,8 @@
; TODO: Currently lowering get_active_lane_mask requires +sve
; XFAIL: *
-define <16 x i1> @whilewr_8(ptr %a, ptr %b) {
+define <16 x i1> @whilewr_8(i64 %a, i64 %b) {
entry:
- %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1(ptr %a, ptr %b, i64 1)
+ %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1)
ret <16 x i1> %0
}
diff --git a/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll b/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
index e9463b5c571b6..a894a8db7a865 100644
--- a/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
+++ b/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
@@ -1,87 +1,87 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64 -mattr=+sve2 %s -o - | FileCheck %s
-define <vscale x 16 x i1> @whilewr_8(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilewr_8(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 16 x i1> %0
}
-define <vscale x 8 x i1> @whilewr_16(ptr %a, ptr %b) {
+define <vscale x 8 x i1> @whilewr_16(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.h, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 2)
+ %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 2)
ret <vscale x 8 x i1> %0
}
-define <vscale x 4 x i1> @whilewr_32(ptr %a, ptr %b) {
+define <vscale x 4 x i1> @whilewr_32(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.s, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 4 x i1> %0
}
-define <vscale x 2 x i1> @whilewr_64(ptr %a, ptr %b) {
+define <vscale x 2 x i1> @whilewr_64(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.d, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 8)
+ %0 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 8)
ret <vscale x 2 x i1> %0
}
-define <vscale x 16 x i1> @whilerw_8(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilerw_8(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.b, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.raw.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 16 x i1> %0
}
-define <vscale x 8 x i1> @whilerw_16(ptr %a, ptr %b) {
+define <vscale x 8 x i1> @whilerw_16(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_16:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.h, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1(ptr %a, ptr %b, i64 2)
+ %0 = call <vscale x 8 x i1> @llvm.loop.dependence.raw.mask.nxv8i1.i64(i64 %a, i64 %b, i64 2)
ret <vscale x 8 x i1> %0
}
-define <vscale x 4 x i1> @whilerw_32(ptr %a, ptr %b) {
+define <vscale x 4 x i1> @whilerw_32(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_32:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.s, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.raw.mask.nxv4i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 4 x i1> %0
}
-define <vscale x 2 x i1> @whilerw_64(ptr %a, ptr %b) {
+define <vscale x 2 x i1> @whilerw_64(i64 %a, i64 %b) {
; CHECK-LABEL: whilerw_64:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilerw p0.d, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1(ptr %a, ptr %b, i64 8)
+ %0 = call <vscale x 2 x i1> @llvm.loop.dependence.raw.mask.nxv2i1.i64(i64 %a, i64 %b, i64 8)
ret <vscale x 2 x i1> %0
}
-define <vscale x 32 x i1> @whilewr_8_split(ptr %a, ptr %b) {
+define <vscale x 32 x i1> @whilewr_8_split(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_split:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x9, x1, x0
@@ -92,11 +92,11 @@ define <vscale x 32 x i1> @whilewr_8_split(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p1.b, x8, x9
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 32 x i1> %0
}
-define <vscale x 64 x i1> @whilewr_8_split2(ptr %a, ptr %b) {
+define <vscale x 64 x i1> @whilewr_8_split2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_split2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x9, x1, x0
@@ -111,11 +111,11 @@ define <vscale x 64 x i1> @whilewr_8_split2(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p3.b, x8, x9
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 64 x i1> @llvm.loop.dependence.war.mask.nxv64i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 64 x i1> @llvm.loop.dependence.war.mask.nxv64i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 64 x i1> %0
}
-define <vscale x 16 x i1> @whilewr_16_expand(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilewr_16_expand(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_expand:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x8, x1, x0
@@ -126,11 +126,11 @@ define <vscale x 16 x i1> @whilewr_16_expand(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.b, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 2)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 2)
ret <vscale x 16 x i1> %0
}
-define <vscale x 32 x i1> @whilewr_16_expand2(ptr %a, ptr %b) {
+define <vscale x 32 x i1> @whilewr_16_expand2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_expand2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x9, x1, x0
@@ -143,11 +143,11 @@ define <vscale x 32 x i1> @whilewr_16_expand2(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p1.b, x8, x9
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1(ptr %a, ptr %b, i64 2)
+ %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1.i64(i64 %a, i64 %b, i64 2)
ret <vscale x 32 x i1> %0
}
-define <vscale x 8 x i1> @whilewr_32_expand(ptr %a, ptr %b) {
+define <vscale x 8 x i1> @whilewr_32_expand(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_expand:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -159,11 +159,11 @@ define <vscale x 8 x i1> @whilewr_32_expand(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.h, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 8 x i1> %0
}
-define <vscale x 16 x i1> @whilewr_32_expand2(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilewr_32_expand2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_expand2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -175,11 +175,11 @@ define <vscale x 16 x i1> @whilewr_32_expand2(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.b, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 16 x i1> %0
}
-define <vscale x 32 x i1> @whilewr_32_expand3(ptr %a, ptr %b) {
+define <vscale x 32 x i1> @whilewr_32_expand3(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_expand3:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x9, x1, x0
@@ -193,11 +193,11 @@ define <vscale x 32 x i1> @whilewr_32_expand3(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p1.b, x8, x9
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 32 x i1> %0
}
-define <vscale x 4 x i1> @whilewr_64_expand(ptr %a, ptr %b) {
+define <vscale x 4 x i1> @whilewr_64_expand(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -209,11 +209,11 @@ define <vscale x 4 x i1> @whilewr_64_expand(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.s, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 8)
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 8)
ret <vscale x 4 x i1> %0
}
-define <vscale x 8 x i1> @whilewr_64_expand2(ptr %a, ptr %b) {
+define <vscale x 8 x i1> @whilewr_64_expand2(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand2:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -225,11 +225,11 @@ define <vscale x 8 x i1> @whilewr_64_expand2(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.h, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 8)
+ %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 8)
ret <vscale x 8 x i1> %0
}
-define <vscale x 16 x i1> @whilewr_64_expand3(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilewr_64_expand3(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand3:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x8, x1, x0
@@ -241,11 +241,11 @@ define <vscale x 16 x i1> @whilewr_64_expand3(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.b, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 8)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 8)
ret <vscale x 16 x i1> %0
}
-define <vscale x 32 x i1> @whilewr_64_expand4(ptr %a, ptr %b) {
+define <vscale x 32 x i1> @whilewr_64_expand4(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_64_expand4:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: subs x9, x1, x0
@@ -259,41 +259,41 @@ define <vscale x 32 x i1> @whilewr_64_expand4(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p1.b, x8, x9
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1(ptr %a, ptr %b, i64 8)
+ %0 = call <vscale x 32 x i1> @llvm.loop.dependence.war.mask.nxv32i1.i64(i64 %a, i64 %b, i64 8)
ret <vscale x 32 x i1> %0
}
-define <vscale x 9 x i1> @whilewr_8_widen(ptr %a, ptr %b) {
+define <vscale x 9 x i1> @whilewr_8_widen(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8_widen:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 9 x i1> @llvm.loop.dependence.war.mask.nxv9i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 9 x i1> @llvm.loop.dependence.war.mask.nxv9i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 9 x i1> %0
}
-define <vscale x 7 x i1> @whilewr_16_widen(ptr %a, ptr %b) {
+define <vscale x 7 x i1> @whilewr_16_widen(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_16_widen:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.h, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 7 x i1> @llvm.loop.dependence.war.mask.nxv7i1(ptr %a, ptr %b, i64 2)
+ %0 = call <vscale x 7 x i1> @llvm.loop.dependence.war.mask.nxv7i1.i64(i64 %a, i64 %b, i64 2)
ret <vscale x 7 x i1> %0
}
-define <vscale x 3 x i1> @whilewr_32_widen(ptr %a, ptr %b) {
+define <vscale x 3 x i1> @whilewr_32_widen(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_32_widen:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.s, x0, x1
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 3 x i1> @llvm.loop.dependence.war.mask.nxv3i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 3 x i1> @llvm.loop.dependence.war.mask.nxv3i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 3 x i1> %0
}
-define <vscale x 16 x i1> @whilewr_badimm(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilewr_badimm(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_badimm:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: mov x8, #6148914691236517205 // =0x5555555555555555
@@ -306,22 +306,22 @@ define <vscale x 16 x i1> @whilewr_badimm(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.b, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 3)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 3)
ret <vscale x 16 x i1> %0
}
-define <vscale x 8 x i1> @whilewr_extract_nxv8i1(ptr %a, ptr %b) {
+define <vscale x 8 x i1> @whilewr_extract_nxv8i1(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_extract_nxv8i1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
; CHECK-NEXT: punpklo p0.h, p0.b
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 8 x i1> @llvm.loop.dependence.war.mask.nxv8i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 8 x i1> %0
}
-define <vscale x 4 x i1> @whilewr_extract_nxv4i1(ptr %a, ptr %b) {
+define <vscale x 4 x i1> @whilewr_extract_nxv4i1(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_extract_nxv4i1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.b, x0, x1
@@ -329,18 +329,30 @@ define <vscale x 4 x i1> @whilewr_extract_nxv4i1(ptr %a, ptr %b) {
; CHECK-NEXT: punpklo p0.h, p0.b
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 4 x i1> %0
}
-define <vscale x 2 x i1> @whilewr_extract_nxv2i1(ptr %a, ptr %b) {
+define <vscale x 2 x i1> @whilewr_extract_nxv2i1(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_extract_nxv2i1:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: whilewr p0.s, x0, x1
; CHECK-NEXT: punpklo p0.h, p0.b
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1(ptr %a, ptr %b, i64 4)
+ %0 = call <vscale x 2 x i1> @llvm.loop.dependence.war.mask.nxv2i1.i64(i64 %a, i64 %b, i64 4)
ret <vscale x 2 x i1> %0
}
+
+define <vscale x 4 x i1> @whilewr_i32_addresses(i32 %a, i32 %b) {
+; CHECK-LABEL: whilewr_i32_addresses:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov w8, w1
+; CHECK-NEXT: mov w9, w0
+; CHECK-NEXT: whilewr p0.s, x9, x8
+; CHECK-NEXT: ret
+entry:
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i32 %a, i32 %b, i64 4)
+ ret <vscale x 4 x i1> %0
+}
diff --git a/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll b/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
index 541e312757369..25772467a27f6 100644
--- a/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
+++ b/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64 -mattr=+sve %s -o - | FileCheck %s
-define <vscale x 16 x i1> @whilewr_8(ptr %a, ptr %b) {
+define <vscale x 16 x i1> @whilewr_8(i64 %a, i64 %b) {
; CHECK-LABEL: whilewr_8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: sub x8, x1, x0
@@ -10,6 +10,6 @@ define <vscale x 16 x i1> @whilewr_8(ptr %a, ptr %b) {
; CHECK-NEXT: whilelo p0.b, xzr, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1(ptr %a, ptr %b, i64 1)
+ %0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 16 x i1> %0
}
>From 4fa7ea8868040fd717a7b549669cca0a36a2da9e Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: Mon, 13 Apr 2026 14:59:34 +0000
Subject: [PATCH 2/2] Fixups
---
llvm/docs/LangRef.rst | 8 +++----
llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 ++--
.../SelectionDAG/LegalizeVectorOps.cpp | 23 +++++++++++--------
.../CodeGen/AArch64/alias_mask_scalable.ll | 2 +-
.../AArch64/alias_mask_scalable_nosve2.ll | 16 +++++++++++++
5 files changed, 36 insertions(+), 17 deletions(-)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index f14877ed16c03..d43a9da555762 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -25149,9 +25149,9 @@ Examples:
%addrA = ptrtoaddr ptr %ptrA to i64
%addrB = ptrtoaddr ptr %ptrB to i64
%loop.dependence.mask = call <4 x i1> @llvm.loop.dependence.war.mask.v4i1.i64(i64 %addrA, i64 %addrB, i64 4)
- %vecA = call <4 x i32> @llvm.masked.load.v4i32.v4i32.p0(ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
+ %vecA = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
[...]
- call @llvm.masked.store.v4i32.v4i32.p0(<4 x i32> %vecA, ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask)
+ call @llvm.masked.store.v4i32.p0(<4 x i32> %vecA, ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask)
; For the above example, consider the following cases:
;
@@ -25244,9 +25244,9 @@ Examples:
%addrA = ptrtoaddr ptr %ptrA to i64
%addrB = ptrtoaddr ptr %ptrB to i64
%loop.dependence.mask = call <4 x i1> @llvm.loop.dependence.raw.mask.v4i1.i64(i64 %addrA, i64 %addrB, i64 4)
- call @llvm.masked.store.v4i32.v4i32.p0(<4 x i32> %vecA, ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask)
+ call @llvm.masked.store.v4i32.p0(<4 x i32> %vecA, ptr align 4 %ptrA, <4 x i1> %loop.dependence.mask)
[...]
- %vecB = call <4 x i32> @llvm.masked.load.v4i32.v4i32.p0(ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
+ %vecB = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 %ptrB, <4 x i1> %loop.dependence.mask, <4 x i32> poison)
; For the above example, consider the following cases:
;
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 44ecded36b0e7..592cbf18051fd 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -2196,13 +2196,13 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
// The possible expansions are...
//
// loop_dependence_war_mask:
- // diff = (ptrB - ptrA) / eltSize
+ // diff = (addrB - addrA) / eltSize
// cmp = icmp sle diff, 0
// upper_bound = select cmp, -1, diff
// mask = get_active_lane_mask 0, upper_bound
//
// loop_dependence_raw_mask:
- // diff = (abs(ptrB - ptrA)) / eltSize
+ // diff = (abs(addrB - addrA)) / eltSize
// cmp = icmp eq diff, 0
// upper_bound = select cmp, -1, diff
// mask = get_active_lane_mask 0, upper_bound
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 46e9a783324f2..908f544073073 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -1897,36 +1897,39 @@ SDValue VectorLegalizer::ExpandLOOP_DEPENDENCE_MASK(SDNode *N) {
EVT VT = N->getValueType(0);
SDValue SourceValue = N->getOperand(0);
SDValue SinkValue = N->getOperand(1);
- SDValue EltSizeInBytes = N->getOperand(2);
// Note: The lane offset is scalable if the mask is scalable.
ElementCount LaneOffsetEC =
ElementCount::get(N->getConstantOperandVal(3), VT.isScalableVT());
- EVT PtrVT = SourceValue->getValueType(0);
+ EVT AddrVT = SourceValue->getValueType(0);
+ SDValue EltSizeInBytes = DAG.getZExtOrTrunc(N->getOperand(2), DL, AddrVT);
bool IsReadAfterWrite = N->getOpcode() == ISD::LOOP_DEPENDENCE_RAW_MASK;
// Take the difference between the pointers and divided by the element size,
// to see how many lanes separate them.
- SDValue Diff = DAG.getNode(ISD::SUB, DL, PtrVT, SinkValue, SourceValue);
+ SDValue Diff = DAG.getNode(ISD::SUB, DL, AddrVT, SinkValue, SourceValue);
if (IsReadAfterWrite)
- Diff = DAG.getNode(ISD::ABS, DL, PtrVT, Diff);
- Diff = DAG.getNode(ISD::SDIV, DL, PtrVT, Diff, EltSizeInBytes);
+ Diff = DAG.getNode(ISD::ABS, DL, AddrVT, Diff);
+ Diff = DAG.getNode(ISD::SDIV, DL, AddrVT, Diff, EltSizeInBytes);
// The pointers do not alias if:
// * Diff <= 0 (WAR_MASK)
// * Diff == 0 (RAW_MASK)
EVT CmpVT =
- TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), PtrVT);
- SDValue Zero = DAG.getConstant(0, DL, PtrVT);
+ TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), AddrVT);
+ SDValue Zero = DAG.getConstant(0, DL, AddrVT);
SDValue Cmp = DAG.getSetCC(DL, CmpVT, Diff, Zero,
IsReadAfterWrite ? ISD::SETEQ : ISD::SETLE);
// The pointers do not alias if:
// Lane + LaneOffset < Diff (WAR/RAW_MASK)
- SDValue LaneOffset = DAG.getElementCount(DL, PtrVT, LaneOffsetEC);
- SDValue MaskN =
- DAG.getSelect(DL, PtrVT, Cmp, DAG.getConstant(-1, DL, PtrVT), Diff);
+ SDValue LaneOffset = DAG.getElementCount(DL, AddrVT, LaneOffsetEC);
+ SDValue MaskN = DAG.getSelect(
+ DL, AddrVT, Cmp,
+ DAG.getConstant(APInt::getMaxValue(AddrVT.getScalarSizeInBits()), DL,
+ AddrVT),
+ Diff);
return DAG.getNode(ISD::GET_ACTIVE_LANE_MASK, DL, VT, LaneOffset, MaskN);
}
diff --git a/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll b/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
index a894a8db7a865..c893531a778f0 100644
--- a/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
+++ b/llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
@@ -353,6 +353,6 @@ define <vscale x 4 x i1> @whilewr_i32_addresses(i32 %a, i32 %b) {
; CHECK-NEXT: whilewr p0.s, x9, x8
; CHECK-NEXT: ret
entry:
- %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i64(i32 %a, i32 %b, i64 4)
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i32(i32 %a, i32 %b, i64 4)
ret <vscale x 4 x i1> %0
}
diff --git a/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll b/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
index 25772467a27f6..548fd086234d2 100644
--- a/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
+++ b/llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
@@ -13,3 +13,19 @@ entry:
%0 = call <vscale x 16 x i1> @llvm.loop.dependence.war.mask.nxv16i1.i64(i64 %a, i64 %b, i64 1)
ret <vscale x 16 x i1> %0
}
+
+define <vscale x 4 x i1> @whilewr_i32_addresses(i32 %a, i32 %b) {
+; CHECK-LABEL: whilewr_i32_addresses:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: subs w8, w1, w0
+; CHECK-NEXT: add w9, w8, #3
+; CHECK-NEXT: csel w8, w9, w8, mi
+; CHECK-NEXT: asr w8, w8, #2
+; CHECK-NEXT: cmp w8, #1
+; CHECK-NEXT: csinv w8, w8, wzr, ge
+; CHECK-NEXT: whilelo p0.s, wzr, w8
+; CHECK-NEXT: ret
+entry:
+ %0 = call <vscale x 4 x i1> @llvm.loop.dependence.war.mask.nxv4i1.i32(i32 %a, i32 %b, i64 4)
+ ret <vscale x 4 x i1> %0
+}
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