[compiler-rt] [llvm] [mlir] [compiler-rt] Don't provide `__arm_sme_state` for baremetal targets (PR #191434)

Mon Apr 13 06:33:09 PDT 2026

llvmbot wrote:



@llvm/pr-subscribers-mlir

@llvm/pr-subscribers-backend-aarch64

Author: Benjamin Maxwell (MacDue)

<details>
<summary>Changes</summary>

Previously, we required baremetal runtimes to implement an undocumented `__aarch64_sme_accessible` hook to check if SME is available (as checking CPU features may vary across targets).

This allowed us to provide a generic `__arm_sme_state` implementation but caused some friction for toolchains that depend on compiler-rt.

This patch instead removes the implementation of `__arm_sme_state` for baremetal. This makes it the responsibility of the runtime (e.g. libc) to provide this function for baremetal targets.

The requirements of this function are documented in the AAPCS64: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#811__arm_sme_state

All other SME ABI rountines are still provided by compiler-rt.

---
Full diff: https://github.com/llvm/llvm-project/pull/191434.diff


6 Files Affected:

- (modified) compiler-rt/lib/builtins/CMakeLists.txt (+1-1) 
- (modified) compiler-rt/lib/builtins/aarch64/sme-abi.S (+4-1) 
- (modified) compiler-rt/lib/builtins/cpu_model/aarch64.c (+3-3) 
- (modified) compiler-rt/lib/builtins/cpu_model/aarch64/fmv/baremetal.inc (+21-16) 
- (modified) llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll (-9) 
- (modified) mlir/lib/ExecutionEngine/ArmSMEStubs.cpp (-5) 


``````````diff

diff --git a/compiler-rt/lib/builtins/CMakeLists.txt b/compiler-rt/lib/builtins/CMakeLists.txt
index 503a9aa3ff4ec..6444119abd340 100644
--- a/compiler-rt/lib/builtins/CMakeLists.txt
+++ b/compiler-rt/lib/builtins/CMakeLists.txt
@@ -992,7 +992,7 @@ else ()
   elseif(COMPILER_RT_BAREMETAL_BUILD)
     foreach (arch ${BUILTIN_SUPPORTED_ARCH})
       if("${arch}" MATCHES "arm64|aarch64")
-        list(APPEND BUILTIN_DEFS ENABLE_BAREMETAL_AARCH64_FMV)
+        list(APPEND BUILTIN_DEFS TARGET_BAREMETAL_AARCH64)
       endif()
     endforeach ()
   endif()
diff --git a/compiler-rt/lib/builtins/aarch64/sme-abi.S b/compiler-rt/lib/builtins/aarch64/sme-abi.S
index 465f1c763c0d3..9a9187622b1ae 100644
--- a/compiler-rt/lib/builtins/aarch64/sme-abi.S
+++ b/compiler-rt/lib/builtins/aarch64/sme-abi.S
@@ -53,9 +53,11 @@ DEFINE_COMPILERRT_PRIVATE_FUNCTION(do_abort)
   .cfi_endproc
 END_COMPILERRT_FUNCTION(do_abort)
 
+// Note: It is the responsibility of the baremetal runtime/libc to implement
+// __arm_sme_state.
+#if !defined(TARGET_BAREMETAL_AARCH64)
 // __arm_sme_state fills the result registers based on a local
 // that is set as part of the compiler-rt startup code.
-//   __aarch64_has_sme_and_tpidr2_el0
 DEFINE_COMPILERRT_FUNCTION(__arm_sme_state)
   .variant_pcs __arm_sme_state
   BTI_C
@@ -73,6 +75,7 @@ DEFINE_COMPILERRT_FUNCTION(__arm_sme_state)
 1:
   ret
 END_COMPILERRT_FUNCTION(__arm_sme_state)
+#endif // !defined(TARGET_BAREMETAL_AARCH64)
 
 DEFINE_COMPILERRT_FUNCTION(__arm_tpidr2_restore)
   .variant_pcs __arm_tpidr2_restore
diff --git a/compiler-rt/lib/builtins/cpu_model/aarch64.c b/compiler-rt/lib/builtins/cpu_model/aarch64.c
index 119d18b8df8d7..347bb4e121c97 100644
--- a/compiler-rt/lib/builtins/cpu_model/aarch64.c
+++ b/compiler-rt/lib/builtins/cpu_model/aarch64.c
@@ -69,7 +69,9 @@ struct {
 
 // The formatter wants to re-order these includes, but doing so is incorrect:
 // clang-format off
-#if defined(__APPLE__)
+#if defined(TARGET_BAREMETAL_AARCH64)
+#include "aarch64/fmv/baremetal.inc"
+#elif defined(__APPLE__)
 #include "aarch64/fmv/apple.inc"
 #elif defined(__FreeBSD__) || defined(__OpenBSD__)
 #include "aarch64/fmv/hwcap.inc"
@@ -84,8 +86,6 @@ struct {
 #include "aarch64/fmv/getauxval.inc"
 #elif defined(_WIN32)
 #include "aarch64/fmv/windows.inc"
-#elif defined(ENABLE_BAREMETAL_AARCH64_FMV)
-#include "aarch64/fmv/baremetal.inc"
 #else
 #include "aarch64/fmv/unimplemented.inc"
 #endif
diff --git a/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/baremetal.inc b/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/baremetal.inc
index f188e84808e01..e95ac9fac8709 100644
--- a/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/baremetal.inc
+++ b/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/baremetal.inc
@@ -1,19 +1,19 @@
-// For baremetal platforms, we don't really initialise '__aarch64_cpu_features',
-// with exception of FEAT_SME that we can get from '__aarch64_sme_accessible'.
+#include <stdint.h>
 
-#if defined(COMPILER_RT_SHARED_LIB)
-__attribute__((weak))
-#endif
-extern _Bool
-__aarch64_sme_accessible(void);
+// The libc/runtime for baremetal targets should provide an implementation of
+// __arm_sme_state. LLVM's compiler-rt does not provide this function for
+// baremetal as checking CPU features is implementation defined.
+//
+// See:
+// https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#811__arm_sme_state
+extern struct {
+  uint64_t x0;
+  uint64_t x1;
+} __arm_sme_state(void);
 
-static _Bool has_sme(void) {
-#if defined(COMPILER_RT_SHARED_LIB)
-  if (!__aarch64_sme_accessible)
-    return 0;
-#endif
-  return __aarch64_sme_accessible();
-}
+// __arm_sme_state:
+// Bit 63 of X0 is set to one iff the current thread has access to SME.
+#define SME_STATE_HAS_SME_BIT_X0 (1ULL << 63)
 
 void __init_cpu_features_resolver(unsigned long hwcap,
                                   const __ifunc_arg_t *arg) {}
@@ -23,8 +23,13 @@ void CONSTRUCTOR_ATTRIBUTE __init_cpu_features(void) {
   if (__atomic_load_n(&__aarch64_cpu_features.features, __ATOMIC_RELAXED))
     return;
 
-  unsigned long long feat = 0;
-  if (has_sme())
+  // For baremetal platforms, we don't really initialise
+  // '__aarch64_cpu_features', with exception of FEAT_SME that we can get from
+  // '__arm_sme_state'.
+  _Bool has_sme = (__arm_sme_state().x0 & SME_STATE_HAS_SME_BIT_X0) != 0;
+
+  uint64_t feat = 0;
+  if (has_sme)
     feat |= 1ULL << FEAT_SME;
 
   __atomic_store_n(&__aarch64_cpu_features.features, feat, __ATOMIC_RELAXED);
diff --git a/llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll b/llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll
index f7182e2a166a5..9369cb99d88ab 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll
@@ -3,15 +3,6 @@
 
 ; Checks SME ABI routines can be implemented as stubs without +sme.
 
-define i1 @__aarch64_sme_accessible() {
-; CHECK-LABEL: __aarch64_sme_accessible:
-; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    mov w0, #1 // =0x1
-; CHECK-NEXT:    ret
-entry:
-  ret i1 true
-}
-
 define [2 x i64] @__arm_sme_state() {
 ; CHECK-LABEL: __arm_sme_state:
 ; CHECK:       // %bb.0: // %entry
diff --git a/mlir/lib/ExecutionEngine/ArmSMEStubs.cpp b/mlir/lib/ExecutionEngine/ArmSMEStubs.cpp
index e01384ba91a0d..8abd2073494c3 100644
--- a/mlir/lib/ExecutionEngine/ArmSMEStubs.cpp
+++ b/mlir/lib/ExecutionEngine/ArmSMEStubs.cpp
@@ -34,11 +34,6 @@
 
 extern "C" {
 
-bool MLIR_ARMSMEABISTUBS_EXPORTED __aarch64_sme_accessible() {
-  // The ArmSME tests are run within an emulator so we assume SME is available.
-  return true;
-}
-
 struct sme_state {
   int64_t x0;
   int64_t x1;

``````````

</details>


https://github.com/llvm/llvm-project/pull/191434
