[llvm] [AArch64][ISel] Add lowering for fixed-width `cttz` intrinsic (PR #190988)

[Harry Ramsey via llvm-commits]

Harry-Ramsey wrote:

> Sounds OK - just to check there is no good way to lower v2i64?

I looked over the v2i64 and this is current compared to expansion.

Current:
```
mov w8, #1 // =0x1
dup v1.2d, x8
sub v1.2d, v0.2d, v1.2d
bic v0.16b, v1.16b, v0.16b
```

Expansion:
```
rev64 v0.16b, v0.16b
rbit v0.16b, v0.16b
ushr v1.2d, v0.2d, #1
orr v0.16b, v0.16b, v1.16b
ushr v1.2d, v0.2d, #2
orr v0.16b, v0.16b, v1.16b
ushr v1.2d, v0.2d, #4
orr v0.16b, v0.16b, v1.16b
ushr v1.2d, v0.2d, #8
orr v0.16b, v0.16b, v1.16b
ushr v1.2d, v0.2d, #16
orr v0.16b, v0.16b, v1.16b
ushr v1.2d, v0.2d, #32
orr v0.16b, v0.16b, v1.16b
mvn v0.16b, v0.16b
```

Would this be ideal?

https://github.com/llvm/llvm-project/pull/190988