[llvm] [AMDGPU][GlobalISel] Guard against use of disallowed sub-registers (PR #188781)

[Igor Wodiany via llvm-commits]

================
@@ -243,13 +243,15 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
         continue;
       Register SrcReg = MI.getOperand(1).getReg();
       Register DstReg = MI.getOperand(0).getReg();
-      if (SrcReg.isVirtual() && DstReg.isVirtual()) {
-        auto SrcRC = MRI.getRegClass(SrcReg);
-        auto DstRC = MRI.getRegClass(DstReg);
-        if (SrcRC == DstRC) {
-          MRI.replaceRegWith(DstReg, SrcReg);
-          MI.eraseFromParent();
-        }
+      unsigned SrcSubIdx = MI.getOperand(1).getSubReg();
----------------
IgWod wrote:

So I got a code that handles subregs and uses `constrainRegClass`, but it generates a large number of diffs in tests, since it seems it opens up new optimizations opportunities (I need to verify it's fully correct). I would suggest we keep this change as it is for this PR and I'll open a follow up for that.

https://github.com/llvm/llvm-project/pull/188781