[llvm] [LangRef] Correct description of predicate.enable MD (PR #191496)

[Hassnaa Hamdi via llvm-commits]

https://github.com/hassnaaHamdi updated https://github.com/llvm/llvm-project/pull/191496

>From 7aed65469f929e06f53e35bfee5bb0bffee5765f Mon Sep 17 00:00:00 2001
From: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: Fri, 10 Apr 2026 18:58:09 +0000
Subject: [PATCH 1/2] [LangRef] Correct description of predicate.enable MD

The documentation incorrectly stated that this metadata enables/disables
vectorization, but it actually controls predication.
Also clarify that enabling predication implicitly enables vectorization.
---
 llvm/docs/LangRef.rst | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index b82d3e3ffbeb8..c6462e7c42111 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -7874,8 +7874,9 @@ This metadata selectively enables or disables creating predicated instructions
 for the loop, which can enable folding of the scalar epilogue loop into the
 main loop. The first operand is the string
 ``llvm.loop.vectorize.predicate.enable`` and the second operand is a bit. If
-the bit operand value is 1 vectorization is enabled. A value of 0 disables
-vectorization:
+the bit operand value is 1 predication is enabled. A value of 0 disables
+predication:
+Additionally, enabling predication implicitly enables vectorization.
 
 .. code-block:: llvm
 

>From ebc0ec7fda6d4acd858efcea4004200c44c551c6 Mon Sep 17 00:00:00 2001
From: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: Mon, 13 Apr 2026 09:29:03 +0000
Subject: [PATCH 2/2] improve readability

---
 llvm/docs/LangRef.rst | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index c6462e7c42111..86325ef731381 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -7876,13 +7876,14 @@ main loop. The first operand is the string
 ``llvm.loop.vectorize.predicate.enable`` and the second operand is a bit. If
 the bit operand value is 1 predication is enabled. A value of 0 disables
 predication:
-Additionally, enabling predication implicitly enables vectorization.
 
 .. code-block:: llvm
 
    !0 = !{!"llvm.loop.vectorize.predicate.enable", i1 0}
    !1 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}
 
+Additionally, enabling predication implicitly enables vectorization.
+
 '``llvm.loop.vectorize.scalable.enable``' Metadata
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^