[llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)
Robert Imschweiler via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 13 00:25:24 PDT 2026
================
@@ -646,6 +646,114 @@ GCNSubtarget::getMaxNumVectorRegs(const Function &F) const {
return std::pair(MaxNumVGPRs, MaxNumAGPRs);
}
+// Check to which source operand UseOpIdx points to and return a pointer to the
+// operand of the corresponding source modifier.
+// Return nullptr if UseOpIdx either doesn't point to src0/1/2 or if there is no
+// operand for the corresponding source modifier.
+static const MachineOperand *
+getVOP3PSourceModifierFromOpIdx(const MachineInstr *UseI, int UseOpIdx,
+ const SIInstrInfo &InstrInfo) {
+ AMDGPU::OpName UseName =
+ AMDGPU::getOperandIdxName(UseI->getOpcode(), UseOpIdx);
+ switch (UseName) {
+ case AMDGPU::OpName::src0:
+ return InstrInfo.getNamedOperand(*UseI, AMDGPU::OpName::src0_modifiers);
+ case AMDGPU::OpName::src1:
+ return InstrInfo.getNamedOperand(*UseI, AMDGPU::OpName::src1_modifiers);
+ case AMDGPU::OpName::src2:
+ return InstrInfo.getNamedOperand(*UseI, AMDGPU::OpName::src2_modifiers);
+ default:
+ return nullptr;
+ }
+}
+
+// Get the subreg idx of the subreg that is used by the given instruction
+// operand, considering the given op_sel modifier.
+// Return 0 if the whole register is used or as a conservative fallback.
+static unsigned getEffectiveSubRegIdx(const SIRegisterInfo &TRI,
+ const SIInstrInfo &InstrInfo,
+ const MachineOperand &Op) {
+ const MachineInstr *I = Op.getParent();
+ if (!InstrInfo.isVOP3P(*I) || InstrInfo.isWMMA(*I) || InstrInfo.isSWMMAC(*I))
----------------
ro-i wrote:
note that I'm checking for WMMA here to *exclude* them, since the srcN_modifier operands that would be returned by `getVOP3PSourceModifierFromOpIdx` two lines below would not be actionable for them.
Hm, we first would need to create a way of knowing which instructions have op_sel or other modifiers that we want to work with. Maybe the allowlist-approach could be extended in a follow-up?
https://github.com/llvm/llvm-project/pull/140255
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