[llvm] [AMDGPU] Relax VOPD constraints for gfx12+ with data deps (PR #191264)

[Shilei Tian via llvm-commits]

================
@@ -174,6 +180,57 @@ bool llvm::checkVOPDRegConstraints(const SIInstrInfo &TII,
   return true;
 }
 
+/// Core pair-eligibility check for a single VOPD encoding variant (VOPD or
+/// VOPD3).  Returns the X/Y assignment on success, or std::nullopt otherwise.
+static std::optional<VOPDMatchInfo>
+tryMatchVOPDPairVariant(const SIInstrInfo &TII, unsigned EncodingFamily,
+                        const MachineInstr &FirstMI,
+                        const MachineInstr &SecondMI, bool IsVOPD3) {
+  unsigned Opc = FirstMI.getOpcode();
+  unsigned Opc2 = SecondMI.getOpcode();
+  auto FirstCanBeVOPD = AMDGPU::getCanBeVOPD(Opc, EncodingFamily, IsVOPD3);
+  auto SecondCanBeVOPD = AMDGPU::getCanBeVOPD(Opc2, EncodingFamily, IsVOPD3);
+
+  // If SecondMI depends on FirstMI they cannot execute at the same time.
+  if (dataDependencyForVOPD(FirstMI, SecondMI))
+    return std::nullopt;
+
+  bool IsAntiDep = dataDependencyForVOPD(SecondMI, FirstMI);
+  // AllowSameVGPR relaxes the VGPR bank overlap check for source operands.
+  // Only enable it for VOPD3 and when there is no antidependency.
+  const GCNSubtarget &ST = TII.getSubtarget();
+  bool AllowSameVGPR = ST.hasGFX1250Insts() && !IsAntiDep;
+
+  if (FirstCanBeVOPD.X && SecondCanBeVOPD.Y) {
+    if ((!IsAntiDep || TII.isVOPDAntidependencyAllowed(FirstMI)) &&
+        checkVOPDRegConstraints(TII, FirstMI, SecondMI, IsVOPD3, AllowSameVGPR))
+      return VOPDMatchInfo{&FirstMI, &SecondMI, IsVOPD3};
+  }
+
+  if (FirstCanBeVOPD.Y && SecondCanBeVOPD.X) {
+    if (IsAntiDep && !TII.isVOPDAntidependencyAllowed(SecondMI))
+      return std::nullopt;
+    if (checkVOPDRegConstraints(TII, SecondMI, FirstMI, IsVOPD3, AllowSameVGPR))
+      return VOPDMatchInfo{&SecondMI, &FirstMI, IsVOPD3};
+  }
+
+  return std::nullopt;
+}
+
+std::optional<VOPDMatchInfo>
+llvm::tryMatchVOPDPair(const SIInstrInfo &TII, const MachineInstr &FirstMI,
+                       const MachineInstr &SecondMI) {
+  const GCNSubtarget &ST = TII.getSubtarget();
+  unsigned EncodingFamily = AMDGPU::getVOPDEncodingFamily(ST);
+  if (auto Match = tryMatchVOPDPairVariant(TII, EncodingFamily, FirstMI,
+                                           SecondMI, false))
----------------
shiltian wrote:


```suggestion
                                           SecondMI, /*IsVOPD3=*/false))
```

https://github.com/llvm/llvm-project/pull/191264