[llvm] [AMDGPU] Post-RA Peephole for latency-hiding and hazard-avoidance bet… (PR #191319)

Zeng Wu via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 10 18:09:45 PDT 2026


zwu-2025 wrote:

> This seems like a scheduling problem - why doesn't PostRA scheduler do it?
> 
> My main concern is that this is not always beneficial - for example, if we want to schedule the mfma after the buffer_load to hide the buffer_load latency.
> 
> I'm also unclear on why we're limiting to just mfma - why not any valu for example?

The scheduler pre/post RA will consider many elements and trade-offs in a much bigger scope and if our scheduler can handle this case well for now, we can ignore the changes here. 

As for why MFMA only, we only see it between buffer_load and MFMA so we add it in peephole. 
If we want to use it to more VALUs, peephole might be a good place and I would like take more look with more concrete cases.

https://github.com/llvm/llvm-project/pull/191319


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