[llvm] [LangRef] Correct description of predicate.enable MD (PR #191496)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-ir

Author: Hassnaa Hamdi (hassnaaHamdi)

<details>
<summary>Changes</summary>

The documentation incorrectly stated that this metadata enables/disables vectorization, but it actually controls predication. Also clarify that enabling predication implicitly enables vectorization.

---
Full diff: https://github.com/llvm/llvm-project/pull/191496.diff


1 Files Affected:

- (modified) llvm/docs/LangRef.rst (+3-2) 


``````````diff
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index b82d3e3ffbeb8..c6462e7c42111 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -7874,8 +7874,9 @@ This metadata selectively enables or disables creating predicated instructions
 for the loop, which can enable folding of the scalar epilogue loop into the
 main loop. The first operand is the string
 ``llvm.loop.vectorize.predicate.enable`` and the second operand is a bit. If
-the bit operand value is 1 vectorization is enabled. A value of 0 disables
-vectorization:
+the bit operand value is 1 predication is enabled. A value of 0 disables
+predication:
+Additionally, enabling predication implicitly enables vectorization.
 
 .. code-block:: llvm
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/191496