[llvm] [AArch64] Lower masked.expandload intrinsic using SVE2p2/SME2p2 EXPAND (PR #190999)

Kerry McLaughlin via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 10 09:12:40 PDT 2026


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@@ -7439,14 +7368,48 @@ SDValue AArch64TargetLowering::LowerMLOAD(SDValue Op, SelectionDAG &DAG) const {
   if (PassThru->isUndef() || isZerosVector(PassThru.getNode()))
     return Op;
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kmclaughlin-arm wrote:

I've moved this to the `!isExpandingLoad()` block below. The tests I copied from `sve-fixed-length-masked-loads.ll` include tests for this, and I've added a couple to `scalable-expanding-load.ll` also.

https://github.com/llvm/llvm-project/pull/190999


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