[llvm] [AMDGPU] Break v2i32 and/or/xor ops into i32 pairs when followed by t… (PR #191422)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 10 08:57:18 PDT 2026
================
@@ -13956,6 +13956,58 @@ static uint32_t getPermuteMask(SDValue V) {
return ~0;
}
+static SDValue performAndOrXorv2i32Combine(SDNode *N, SelectionDAG &DAG) {
+ EVT VT = N->getValueType(0);
+ const unsigned Opc = N->getOpcode();
+ assert(VT == MVT::v2i32);
+ if (!N->isDivergent())
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arsenm wrote:
Divergence isn't really what this cares about, divergence is just a poor proxy for VALU
https://github.com/llvm/llvm-project/pull/191422
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