[llvm] [AMDGPU][GlobalISel] Guard against use of disallowed sub-registers (PR #188781)

[Matt Arsenault via llvm-commits]

================
@@ -243,13 +243,15 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
         continue;
       Register SrcReg = MI.getOperand(1).getReg();
       Register DstReg = MI.getOperand(0).getReg();
-      if (SrcReg.isVirtual() && DstReg.isVirtual()) {
-        auto SrcRC = MRI.getRegClass(SrcReg);
-        auto DstRC = MRI.getRegClass(DstReg);
-        if (SrcRC == DstRC) {
-          MRI.replaceRegWith(DstReg, SrcReg);
-          MI.eraseFromParent();
-        }
+      unsigned SrcSubIdx = MI.getOperand(1).getSubReg();
----------------
arsenm wrote:

This part LGTM, though it could try to find the compatible subclass and constrain. At most that will be a compile time improvement, PeepholeOpt should take care of it later anyway 

https://github.com/llvm/llvm-project/pull/188781