[llvm] [AMDGPU] Post-RA Peephole for latency-hiding and hazard-avoidance bet… (PR #191319)

[Shilei Tian via llvm-commits]

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shiltian wrote:

```suggestion
    for (MachineBasicBlock &MBB : MF)
      Changed |= optimizeBufferLoadM0(MBB);
```

https://github.com/llvm/llvm-project/pull/191319