[llvm] df45fbb - [AMDGPU] Fix V_FMA_MIX_BF16 selection in true16 (#191272)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 9 12:29:17 PDT 2026
Author: Stanislav Mekhanoshin
Date: 2026-04-09T12:29:12-07:00
New Revision: df45fbb04445bfb19939df7c037412efc9dc8efe
URL: https://github.com/llvm/llvm-project/commit/df45fbb04445bfb19939df7c037412efc9dc8efe
DIFF: https://github.com/llvm/llvm-project/commit/df45fbb04445bfb19939df7c037412efc9dc8efe.diff
LOG: [AMDGPU] Fix V_FMA_MIX_BF16 selection in true16 (#191272)
Added:
Modified:
llvm/lib/Target/AMDGPU/VOP3PInstructions.td
llvm/test/CodeGen/AMDGPU/bf16.ll
llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index 6d926ae624e70..0e90bf787b510 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -476,7 +476,7 @@ defm : MadFmaMixFP32Pats<fma, V_FMA_MIX_F32_BF16, bf16>;
let True16Predicate = NotUseRealTrue16Insts in
defm : MadFmaMixFP16Pats<fma, V_FMA_MIXLO_BF16, V_FMA_MIXHI_BF16, bf16, v2bf16>;
let True16Predicate = UseRealTrue16Insts in
-defm : MadFmaMixFP16Pats_t16<fma, V_FMA_MIX_BF16_t16>;
+defm : MadFmaMixFP16Pats_t16<fma, V_FMA_MIX_BF16_t16, bf16, v2bf16>;
} // End SubtargetPredicate = HasFmaMixBF16Insts
def PK_ADD_MINMAX_Profile : VOP3P_Profile<VOP_V2I16_V2I16_V2I16_V2I16, VOP3_PACKED> {
diff --git a/llvm/test/CodeGen/AMDGPU/bf16.ll b/llvm/test/CodeGen/AMDGPU/bf16.ll
index 7662c844a835d..bdf6410e9e49f 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16.ll
@@ -14787,21 +14787,12 @@ define bfloat @v_fmul_bf16(bfloat %a, bfloat %b) {
; GFX11FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1250TRUE16-LABEL: v_fmul_bf16:
-; GFX1250TRUE16: ; %bb.0:
-; GFX1250TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250TRUE16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, neg(0) op_sel_hi:[1,1,0]
-; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250TRUE16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250FAKE16-LABEL: v_fmul_bf16:
-; GFX1250FAKE16: ; %bb.0:
-; GFX1250FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, 0 op_sel_hi:[1,1,0]
-; GFX1250FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_fmul_bf16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, 0 op_sel_hi:[1,1,0]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%op = fmul bfloat %a, %b
ret bfloat %op
}
@@ -47225,21 +47216,12 @@ define bfloat @v_fma_bf16(bfloat %a, bfloat %b, bfloat %c) {
; GFX11FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1250TRUE16-LABEL: v_fma_bf16:
-; GFX1250TRUE16: ; %bb.0:
-; GFX1250TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250TRUE16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250TRUE16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250FAKE16-LABEL: v_fma_bf16:
-; GFX1250FAKE16: ; %bb.0:
-; GFX1250FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_fma_bf16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%op = call bfloat @llvm.fma.bf16(bfloat %a, bfloat %b, bfloat %c)
ret bfloat %op
}
@@ -52206,21 +52188,12 @@ define bfloat @v_fmuladd_bf16(bfloat %a, bfloat %b, bfloat %c) {
; GFX11FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX11FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1250TRUE16-LABEL: v_fmuladd_bf16:
-; GFX1250TRUE16: ; %bb.0:
-; GFX1250TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250TRUE16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250TRUE16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250FAKE16-LABEL: v_fmuladd_bf16:
-; GFX1250FAKE16: ; %bb.0:
-; GFX1250FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_fmuladd_bf16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%op = call bfloat @llvm.fmuladd.bf16(bfloat %a, bfloat %b, bfloat %c)
ret bfloat %op
}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
index f32abce3cdd86..7ded324418fc1 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
@@ -30,9 +30,9 @@ define amdgpu_kernel void @cos_bf16(ptr addrspace(1) %out, bfloat %src) #1 {
; REAL16-NEXT: s_mov_b32 s3, 0x3e230000
; REAL16-NEXT: v_mov_b32_e32 v1, 0
; REAL16-NEXT: s_wait_kmcnt 0x0
-; REAL16-NEXT: v_fma_mix_f32_bf16 v0, s2, s3, neg(0) op_sel_hi:[1,0,0]
-; REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
+; REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0 ; msbs: dst=0 src0=0 src1=0 src2=0
+; REAL16-NEXT: v_fma_mixlo_bf16 v0, s2, s3, 0 op_sel_hi:[1,0,0]
+; REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT: v_cos_bf16_e32 v0.l, v0.l
; REAL16-NEXT: global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
index e082b8da0d0f9..cc8c01a7afcd3 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
@@ -30,9 +30,9 @@ define amdgpu_kernel void @sin_bf16(ptr addrspace(1) %out, bfloat %src) #1 {
; REAL16-NEXT: s_mov_b32 s3, 0x3e230000
; REAL16-NEXT: v_mov_b32_e32 v1, 0
; REAL16-NEXT: s_wait_kmcnt 0x0
-; REAL16-NEXT: v_fma_mix_f32_bf16 v0, s2, s3, neg(0) op_sel_hi:[1,0,0]
-; REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
+; REAL16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 0 ; msbs: dst=0 src0=0 src1=0 src2=0
+; REAL16-NEXT: v_fma_mixlo_bf16 v0, s2, s3, 0 op_sel_hi:[1,0,0]
+; REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT: v_sin_bf16_e32 v0.l, v0.l
; REAL16-NEXT: global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll b/llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
index 3b684268dcc50..5884b35a31ec4 100644
--- a/llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
@@ -3,22 +3,12 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-REAL16 %s
define <2 x bfloat> @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo(bfloat %src0, bfloat %src1, bfloat %src2) #0 {
-; GFX1250-FAKE16-LABEL: v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v0.l
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
%src2.ext = fpext bfloat %src2 to float
@@ -43,11 +33,8 @@ define <2 x bfloat> @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_constlo(bfloat %src0,
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v0, s0
+; GFX1250-REAL16-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.l, 0x3f80
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v1.l
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
@@ -72,11 +59,8 @@ define <2 x bfloat> @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_reglo(bfloat %src0, b
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v0, s0
+; GFX1250-REAL16-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.l, v3.l
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v1.l
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
@@ -102,11 +86,8 @@ define i32 @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_intpack(bfloat %src0, bfloat %
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v0, s0
+; GFX1250-REAL16-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.l, 0
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v1.l
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
@@ -133,11 +114,8 @@ define i32 @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_intpack_sext(bfloat %src0, bfl
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v0, s0
+; GFX1250-REAL16-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.l, 0
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v1.l
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
@@ -182,24 +160,12 @@ define <2 x bfloat> @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo_clamp_precvt(
}
define <2 x bfloat> @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo_clamp_postcvt(bfloat %src0, bfloat %src1, bfloat %src2) #0 {
-; GFX1250-FAKE16-LABEL: v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo_clamp_postcvt:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo_clamp_postcvt:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: v_pk_max_num_bf16 v0, v0, v0 op_sel_hi:[0,0] clamp
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v0.l
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo_clamp_postcvt:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixhi_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
%src2.ext = fpext bfloat %src2 to float
@@ -226,13 +192,10 @@ define <2 x bfloat> @v_mad_mixhi_bf16_bf16lo_bf16lo_bf16lo_undeflo_clamp_postcvt
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v1.l, v0.l
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_pk_max_num_bf16 v1, v1, v1 op_sel_hi:[0,0] clamp
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, v1.l
+; GFX1250-REAL16-NEXT: v_mov_b16_e32 v3.l, v0.l
+; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-REAL16-NEXT: v_fma_mixlo_bf16 v0, v3, v1, v2 op_sel_hi:[1,1,1]
+; GFX1250-REAL16-NEXT: v_fma_mixhi_bf16 v0, v3, v1, v2 op_sel_hi:[1,1,1] clamp
; GFX1250-REAL16-NEXT: global_store_b16 v[0:1], v0, off scope:SCOPE_SYS
; GFX1250-REAL16-NEXT: s_wait_storecnt 0x0
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
@@ -257,5 +220,3 @@ declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) #
attributes #0 = { nounwind denormal_fpenv(float: preservesign) }
attributes #1 = { nounwind readnone speculatable }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX1250: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll b/llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
index 8eb7ccf6d5ab1..1a5b6daf2bdd0 100644
--- a/llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
@@ -3,63 +3,36 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-REAL16 %s
define bfloat @mixlo_simple(float %src0, float %src1, float %src2) #0 {
-; GFX1250-FAKE16-LABEL: mixlo_simple:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: mixlo_simple:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fmac_f32_e32 v2, v0, v1
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v2, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: mixlo_simple:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)
%cvt.result = fptrunc float %result to bfloat
ret bfloat %cvt.result
}
define bfloat @mixlo_simpl_no_flush(float %src0, float %src1, float %src2) {
-; GFX1250-FAKE16-LABEL: mixlo_simpl_no_flush:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: mixlo_simpl_no_flush:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fmac_f32_e32 v2, v0, v1
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v2, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: mixlo_simpl_no_flush:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)
%cvt.result = fptrunc float %result to bfloat
ret bfloat %cvt.result
}
define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo(bfloat %src0, bfloat %src1, bfloat %src2) #0 {
-; GFX1250-FAKE16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
%src2.ext = fpext bfloat %src2 to float
@@ -69,21 +42,12 @@ define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo(bfloat %src0, bfloat %src1,
}
define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo_no_flush(bfloat %src0, bfloat %src1, bfloat %src2) {
-; GFX1250-FAKE16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo_no_flush:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo_no_flush:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo_no_flush:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,1]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
%src2.ext = fpext bfloat %src2 to float
@@ -93,21 +57,12 @@ define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_bf16lo_no_flush(bfloat %src0, bflo
}
define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_f32(bfloat %src0, bfloat %src1, float %src2) #0 {
-; GFX1250-FAKE16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_f32:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,0]
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_f32:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,0]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_f32:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,0]
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
%result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)
@@ -116,22 +71,12 @@ define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_f32(bfloat %src0, bfloat %src1, fl
}
define bfloat @v_mad_mixlo_bf16_bf16lo_bf16lo_f32_clamp_post_cvt(bfloat %src0, bfloat %src1, float %src2) #0 {
-; GFX1250-FAKE16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_f32_clamp_post_cvt:
-; GFX1250-FAKE16: ; %bb.0:
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_f32_clamp_post_cvt:
-; GFX1250-REAL16: ; %bb.0:
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,0]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: v_pk_max_num_bf16 v0, v0, v0 op_sel_hi:[0,0] clamp
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: v_mad_mixlo_bf16_bf16lo_bf16lo_f32_clamp_post_cvt:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext bfloat %src0 to float
%src1.ext = fpext bfloat %src1 to float
%result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)
@@ -197,12 +142,11 @@ define <3 x bfloat> @v_mad_mix_v3f32(<3 x bfloat> %src0, <3 x bfloat> %src1, <3
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v1, v1, v3, v5 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]
+; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]
; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v2, v4 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v1, s0
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, v3
+; GFX1250-REAL16-NEXT: v_fma_mixlo_bf16 v1, v1, v3, v5 op_sel_hi:[1,1,1]
+; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, v6
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext <3 x bfloat> %src0 to <3 x float>
%src1.ext = fpext <3 x bfloat> %src1 to <3 x float>
@@ -285,14 +229,12 @@ define <3 x bfloat> @v_mad_mix_v3f32_clamp_postcvt(<3 x bfloat> %src0, <3 x bflo
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v1, v1, v3, v5 op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]
-; GFX1250-REAL16-NEXT: v_fma_mix_f32_bf16 v0, v0, v2, v4 op_sel_hi:[1,1,1]
+; GFX1250-REAL16-NEXT: v_fma_mixlo_bf16 v1, v1, v3, v5 op_sel_hi:[1,1,1]
+; GFX1250-REAL16-NEXT: v_fma_mixhi_bf16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp
+; GFX1250-REAL16-NEXT: v_fma_mixlo_bf16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp
; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v1, s0
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, v3 clamp
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1250-REAL16-NEXT: v_pk_max_num_bf16 v1, v1, v1 clamp
+; GFX1250-REAL16-NEXT: v_mov_b32_e32 v0, v3
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%src0.ext = fpext <3 x bfloat> %src0 to <3 x float>
%src1.ext = fpext <3 x bfloat> %src1 to <3 x float>
@@ -543,11 +485,8 @@ define i32 @mixlo_zext(float %src0, float %src1, float %src2) #0 {
; GFX1250-REAL16: ; %bb.0:
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_fmac_f32_e32 v2, v0, v1
+; GFX1250-REAL16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, v2
; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.h, 0
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v1, v2, s0
-; GFX1250-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)
%cvt.result = fptrunc float %result to bfloat
@@ -557,21 +496,12 @@ define i32 @mixlo_zext(float %src0, float %src1, float %src2) #0 {
}
define bfloat @mixlo_fptrunc(float %a, float %b) #0 {
-; GFX1250-FAKE16-LABEL: mixlo_fptrunc:
-; GFX1250-FAKE16: ; %bb.0: ; %.entry
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, 0
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: mixlo_fptrunc:
-; GFX1250-REAL16: ; %bb.0: ; %.entry
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_mul_f32_e32 v0, v0, v1
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: mixlo_fptrunc:
+; GFX1250: ; %bb.0: ; %.entry
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, 0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
.entry:
%mul = fmul float %a, %b
%trunc = fptrunc float %mul to bfloat
@@ -579,21 +509,12 @@ define bfloat @mixlo_fptrunc(float %a, float %b) #0 {
}
define bfloat @mixlo_fptrunc_no_flush(float %a, float %b) {
-; GFX1250-FAKE16-LABEL: mixlo_fptrunc_no_flush:
-; GFX1250-FAKE16: ; %bb.0: ; %.entry
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, v0, v1, 0
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: mixlo_fptrunc_no_flush:
-; GFX1250-REAL16: ; %bb.0: ; %.entry
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_mul_f32_e32 v0, v0, v1
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: mixlo_fptrunc_no_flush:
+; GFX1250: ; %bb.0: ; %.entry
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, v0, v1, 0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
.entry:
%mul = fmul float %a, %b
%trunc = fptrunc float %mul to bfloat
@@ -601,21 +522,12 @@ define bfloat @mixlo_fptrunc_no_flush(float %a, float %b) {
}
define bfloat @mixlo_fptrunc_abs_src_mod(float %a, float %b) #0 {
-; GFX1250-FAKE16-LABEL: mixlo_fptrunc_abs_src_mod:
-; GFX1250-FAKE16: ; %bb.0: ; %.entry
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, |v0|, v1, 0
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: mixlo_fptrunc_abs_src_mod:
-; GFX1250-REAL16: ; %bb.0: ; %.entry
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_mul_f32_e64 v0, |v0|, v1
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: mixlo_fptrunc_abs_src_mod:
+; GFX1250: ; %bb.0: ; %.entry
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, |v0|, v1, 0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
.entry:
%a.fabs = call float @llvm.fabs.f32(float %a)
%mul = fmul float %a.fabs, %b
@@ -624,21 +536,12 @@ define bfloat @mixlo_fptrunc_abs_src_mod(float %a, float %b) #0 {
}
define bfloat @mixlo_fptrunc_neg_src_mod(float %a, float %b) #0 {
-; GFX1250-FAKE16-LABEL: mixlo_fptrunc_neg_src_mod:
-; GFX1250-FAKE16: ; %bb.0: ; %.entry
-; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-FAKE16-NEXT: v_fma_mixlo_bf16 v0, -v0, v1, 0
-; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-REAL16-LABEL: mixlo_fptrunc_neg_src_mod:
-; GFX1250-REAL16: ; %bb.0: ; %.entry
-; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
-; GFX1250-REAL16-NEXT: v_mul_f32_e64 v0, -v0, v1
-; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
-; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1250-LABEL: mixlo_fptrunc_neg_src_mod:
+; GFX1250: ; %bb.0: ; %.entry
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: s_wait_kmcnt 0x0
+; GFX1250-NEXT: v_fma_mixlo_bf16 v0, -v0, v1, 0
+; GFX1250-NEXT: s_set_pc_i64 s[30:31]
.entry:
%a.fneg = fneg float %a
%mul = fmul float %a.fneg, %b
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