[llvm] [ARM] Take advantage of built-in mod of shift amount in variable-shift rotations (PR #157208)

[via llvm-commits]

================
@@ -3155,6 +3157,108 @@ bool ARMDAGToDAGISel::tryInsertVectorElt(SDNode *N) {
   return false;
 }
 
+/// tryShiftAmountMod - Take advantage of built-in mod of shift amount in
+/// variable shift/rotate instructions.
+bool ARMDAGToDAGISel::tryShiftAmountMod(SDNode *N) {
+  EVT VT = N->getValueType(0);
+  if (VT != MVT::i32)
+    return false;
+  // On ARM we intentionally do this only for ROTR. Unlike AArch64, variable
+  // SHL/SRL/SRA do not all have the same modulo-shift semantics we can exploit.
+  // Select ROR by register; in ARM state this is modeled as MOVsr with a ROR
+  // shifter operand, while in Thumb we use tROR/t2RORrr directly.
+
+  SDValue ShiftAmt = N->getOperand(1);
+  SDLoc DL(N);
+  SDValue NewShiftAmt;
+  auto emitUnary = [&](unsigned Opc, SDValue Src, bool AddZeroImm) {
+    if (Subtarget->isThumb2() || !Subtarget->isThumb()) {
+      SDValue Ops[] = {Src};
+      if (AddZeroImm) {
----------------
SiliconA-Z wrote:

Did.

https://github.com/llvm/llvm-project/pull/157208