[llvm] [AMDGPU] Add block carried latency to CoExecSched (PR #187413)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 8 05:46:41 PDT 2026
================
@@ -216,16 +236,77 @@ void CandidateHeuristics::initialize(ScheduleDAGMI *SchedDAG,
HWUInfo[(int)InstructionFlavor::MultiCycleVALU].setProducesCoexecWindow(true);
HWUInfo[(int)InstructionFlavor::TRANS].setProducesCoexecWindow(true);
- collectHWUIPressure();
+ collectRegionSummary();
+}
+
+unsigned CandidateHeuristics::getCarriedLatency(SUnit *SU) {
+ MachineInstr *MI = SU->getInstr();
+ unsigned CarriedLatency = 0;
+ for (auto &Op : MI->operands()) {
+ if (!Op.isReg())
+ continue;
+ if (!Op.isUse())
+ continue;
+ auto Reg = Op.getReg();
+ if (!Reg.isVirtual())
+ continue;
+
+ for (auto &Def : DAG->MRI.def_instructions(Reg)) {
+ // We don't have the proper modelling to accurately measure all carried
+ // latency. Just try to measure carried latency for long latency loads to
+ // avoid long stalls.
+ if (!Def.mayLoad())
+ continue;
+
+ unsigned Latency = getHWUICyclesForMI(&Def);
+
+ // Load is carried across block
+ if (Def.getParent() != MI->getParent()) {
+ bool FoundUseInDefBlock = false;
+ for (auto &Use : DAG->MRI.use_nodbg_instructions(Reg)) {
----------------
arsenm wrote:
No auto
https://github.com/llvm/llvm-project/pull/187413
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