[llvm] [NewPM] Port AArch64RedundantCondBranch to the new pass manager (PR #190897)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: Kyungtak Woo (kevinwkt)

<details>
<summary>Changes</summary>

Adds a newPM pass for AArch64RedundantCondBranch

- Refactors base logic into an Impl class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass using refactored logic
- Updated existing .mir tests to also test with the New Pass Manager.

Context and motivation in https://llvm.org/docs/NewPassManager.html#status-of-the-new-and-legacy-pass-managers


---
Full diff: https://github.com/llvm/llvm-project/pull/190897.diff


5 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64.h (+8-1) 
- (modified) llvm/lib/Target/AArch64/AArch64PassRegistry.def (+1) 
- (modified) llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp (+28-9) 
- (modified) llvm/lib/Target/AArch64/AArch64TargetMachine.cpp (+1-1) 
- (modified) llvm/test/CodeGen/AArch64/cbz_wzr.mir (+1) 


``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 617ca3d01c039..665669e5a0b5f 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -136,7 +136,7 @@ void initializeAArch64PostSelectOptimizePass(PassRegistry &);
 void initializeAArch64PreLegalizerCombinerLegacyPass(PassRegistry &);
 void initializeAArch64PromoteConstantPass(PassRegistry&);
 void initializeAArch64RedundantCopyEliminationPass(PassRegistry&);
-void initializeAArch64RedundantCondBranchPass(PassRegistry &);
+void initializeAArch64RedundantCondBranchLegacyPass(PassRegistry &);
 void initializeAArch64SIMDInstrOptPass(PassRegistry &);
 void initializeAArch64SLSHardeningPass(PassRegistry &);
 void initializeAArch64SpeculationHardeningPass(PassRegistry &);
@@ -179,6 +179,13 @@ class AArch64BranchTargetsPass
                         MachineFunctionAnalysisManager &MFAM);
 };
 
+class AArch64RedundantCondBranchPass
+    : public PassInfoMixin<AArch64RedundantCondBranchPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
 class AArch64AdvSIMDScalarPass
     : public PassInfoMixin<AArch64AdvSIMDScalarPass> {
 public:
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index 2fcd42b90caa8..5ed51368444c5 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -40,6 +40,7 @@ MACHINE_FUNCTION_PASS("aarch64-post-coalescer", AArch64PostCoalescerPass())
 MACHINE_FUNCTION_PASS("aarch64-prelegalizer-combiner",
                       AArch64PreLegalizerCombinerPass())
 MACHINE_FUNCTION_PASS("aarch64-ptrauth", AArch64PointerAuthPass())
+MACHINE_FUNCTION_PASS("aarch64-redundantcondbranch", AArch64RedundantCondBranchPass())
 MACHINE_FUNCTION_PASS("aarch64-simd-scalar", AArch64AdvSIMDScalarPass())
 MACHINE_FUNCTION_PASS("aarch64-O0-prelegalizer-combiner",
                       AArch64O0PreLegalizerCombinerPass())
diff --git a/llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp b/llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp
index 1a5a9f0a6018b..e5a67ca9df9b7 100644
--- a/llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp
@@ -25,10 +25,15 @@ using namespace llvm;
 #define DEBUG_TYPE "aarch64-redundantcondbranch"
 
 namespace {
-class AArch64RedundantCondBranch : public MachineFunctionPass {
+
+class AArch64RedundantCondBranchImpl {
+public:
+  bool run(MachineFunction &MF);
+};
+class AArch64RedundantCondBranchLegacy : public MachineFunctionPass {
 public:
   static char ID;
-  AArch64RedundantCondBranch() : MachineFunctionPass(ID) {}
+  AArch64RedundantCondBranchLegacy() : MachineFunctionPass(ID) {}
 
   bool runOnMachineFunction(MachineFunction &MF) override;
 
@@ -39,17 +44,14 @@ class AArch64RedundantCondBranch : public MachineFunctionPass {
     return "AArch64 Redundant Conditional Branch Elimination";
   }
 };
-char AArch64RedundantCondBranch::ID = 0;
+char AArch64RedundantCondBranchLegacy::ID = 0;
 } // namespace
 
-INITIALIZE_PASS(AArch64RedundantCondBranch, "aarch64-redundantcondbranch",
+INITIALIZE_PASS(AArch64RedundantCondBranchLegacy, "aarch64-redundantcondbranch",
                 "AArch64 Redundant Conditional Branch Elimination pass", false,
                 false)
 
-bool AArch64RedundantCondBranch::runOnMachineFunction(MachineFunction &MF) {
-  if (skipFunction(MF.getFunction()))
-    return false;
-
+bool AArch64RedundantCondBranchImpl::run(MachineFunction &MF) {
   const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
 
   bool Changed = false;
@@ -58,6 +60,23 @@ bool AArch64RedundantCondBranch::runOnMachineFunction(MachineFunction &MF) {
   return Changed;
 }
 
+bool AArch64RedundantCondBranchLegacy::runOnMachineFunction(
+    MachineFunction &MF) {
+  if (skipFunction(MF.getFunction()))
+    return false;
+
+  return AArch64RedundantCondBranchImpl().run(MF);
+}
+
+PreservedAnalyses
+AArch64RedundantCondBranchPass::run(MachineFunction &MF,
+                                    MachineFunctionAnalysisManager &) {
+  if (AArch64RedundantCondBranchImpl().run(MF)) {
+    return getMachineFunctionPassPreservedAnalyses();
+  }
+  return PreservedAnalyses::all();
+}
+
 FunctionPass *llvm::createAArch64RedundantCondBranchPass() {
-  return new AArch64RedundantCondBranch();
+  return new AArch64RedundantCondBranchLegacy();
 }
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index fab2804f531f2..ca02a506d3097 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -266,7 +266,7 @@ LLVMInitializeAArch64Target() {
   initializeAArch64PostSelectOptimizePass(PR);
   initializeAArch64PromoteConstantPass(PR);
   initializeAArch64RedundantCopyEliminationPass(PR);
-  initializeAArch64RedundantCondBranchPass(PR);
+  initializeAArch64RedundantCondBranchLegacyPass(PR);
   initializeAArch64StorePairSuppressPass(PR);
   initializeFalkorHWPFFixPass(PR);
   initializeFalkorMarkStridedAccessesLegacyPass(PR);
diff --git a/llvm/test/CodeGen/AArch64/cbz_wzr.mir b/llvm/test/CodeGen/AArch64/cbz_wzr.mir
index 9e70d2a12b0fd..9ee1a5c033a6e 100644
--- a/llvm/test/CodeGen/AArch64/cbz_wzr.mir
+++ b/llvm/test/CodeGen/AArch64/cbz_wzr.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
 # RUN: llc -o - %s -mtriple=aarch64-none-eabi -run-pass=machine-cp,aarch64-redundantcondbranch -mcp-use-is-copy-instr | FileCheck %s
+# RUN: llc -o - %s -mtriple=aarch64-none-eabi -passes=machine-cp,aarch64-redundantcondbranch -mcp-use-is-copy-instr | FileCheck %s
 
 ---
 name:            cbz_wzr

``````````

</details>


https://github.com/llvm/llvm-project/pull/190897