[llvm] [NewPM] Port AArch64RedundantCopyElimination (PR #190582)
Kyungtak Woo via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 7 18:29:43 PDT 2026
https://github.com/kevinwkt updated https://github.com/llvm/llvm-project/pull/190582
>From a3b2b80d4c17c455be34f2da17692111ac860bbd Mon Sep 17 00:00:00 2001
From: Kyungtak Woo <kevinwkt at google.com>
Date: Mon, 6 Apr 2026 05:57:28 +0000
Subject: [PATCH 1/3] [NewPM] port AArch64RedundantCopyElimination
---
llvm/lib/Target/AArch64/AArch64.h | 9 +++-
.../Target/AArch64/AArch64PassRegistry.def | 1 +
.../AArch64RedundantCopyElimination.cpp | 53 +++++++++++++------
.../Target/AArch64/AArch64TargetMachine.cpp | 2 +-
.../CodeGen/AArch64/machine-copy-remove.mir | 1 +
.../AArch64/machine-zero-copy-remove.mir | 1 +
6 files changed, 50 insertions(+), 17 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 6c3990842efb9..c6f576166dba8 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -121,7 +121,7 @@ void initializeAArch64PostLegalizerLoweringPass(PassRegistry &);
void initializeAArch64PostSelectOptimizePass(PassRegistry &);
void initializeAArch64PreLegalizerCombinerPass(PassRegistry &);
void initializeAArch64PromoteConstantPass(PassRegistry&);
-void initializeAArch64RedundantCopyEliminationPass(PassRegistry&);
+void initializeAArch64RedundantCopyEliminationLegacyPass(PassRegistry &);
void initializeAArch64RedundantCondBranchPass(PassRegistry &);
void initializeAArch64SIMDInstrOptPass(PassRegistry &);
void initializeAArch64SLSHardeningPass(PassRegistry &);
@@ -218,6 +218,13 @@ class AArch64PostCoalescerPass
MachineFunctionAnalysisManager &MFAM);
};
+class AArch64RedundantCopyEliminationPass
+ : public PassInfoMixin<AArch64RedundantCopyEliminationPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
} // end namespace llvm
#endif
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index c5248f20b6f78..2d5a70741a097 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -29,6 +29,7 @@
MACHINE_FUNCTION_PASS("aarch64-branch-targets", AArch64BranchTargetsPass())
MACHINE_FUNCTION_PASS("aarch64-collect-loh", AArch64CollectLOHPass())
MACHINE_FUNCTION_PASS("aarch64-condopt", AArch64ConditionOptimizerPass())
+MACHINE_FUNCTION_PASS("aarch64-copyelim", AArch64RedundantCopyEliminationPass())
MACHINE_FUNCTION_PASS("aarch64-dead-defs", AArch64DeadRegisterDefinitionsPass())
MACHINE_FUNCTION_PASS("aarch64-expand-pseudo", AArch64ExpandPseudoPass())
MACHINE_FUNCTION_PASS("aarch64-fix-cortex-a53-835769", AArch64A53Fix835769Pass())
diff --git a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
index 9dc721eb7315d..26385b08c9c29 100644
--- a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
@@ -66,7 +66,11 @@ using namespace llvm;
STATISTIC(NumCopiesRemoved, "Number of copies removed.");
namespace {
-class AArch64RedundantCopyElimination : public MachineFunctionPass {
+class AArch64RedundantCopyEliminationImpl {
+public:
+ bool run(MachineFunction &MF);
+
+private:
const MachineRegisterInfo *MRI;
const TargetRegisterInfo *TRI;
@@ -77,10 +81,6 @@ class AArch64RedundantCopyElimination : public MachineFunctionPass {
// OptBBClobberedRegs is used when optimizing away redundant copies/moves.
LiveRegUnits OptBBClobberedRegs, OptBBUsedRegs;
-public:
- static char ID;
- AArch64RedundantCopyElimination() : MachineFunctionPass(ID) {}
-
struct RegImm {
MCPhysReg Reg;
int32_t Imm;
@@ -91,7 +91,15 @@ class AArch64RedundantCopyElimination : public MachineFunctionPass {
SmallVectorImpl<RegImm> &KnownRegs,
MachineBasicBlock::iterator &FirstUse);
bool optimizeBlock(MachineBasicBlock *MBB);
+};
+
+class AArch64RedundantCopyEliminationLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+ AArch64RedundantCopyEliminationLegacy() : MachineFunctionPass(ID) {}
+
bool runOnMachineFunction(MachineFunction &MF) override;
+
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().setNoVRegs();
}
@@ -99,10 +107,10 @@ class AArch64RedundantCopyElimination : public MachineFunctionPass {
return "AArch64 Redundant Copy Elimination";
}
};
-char AArch64RedundantCopyElimination::ID = 0;
-}
+char AArch64RedundantCopyEliminationLegacy::ID = 0;
+} // end anonymous namespace
-INITIALIZE_PASS(AArch64RedundantCopyElimination, "aarch64-copyelim",
+INITIALIZE_PASS(AArch64RedundantCopyEliminationLegacy, "aarch64-copyelim",
"AArch64 redundant copy elimination pass", false, false)
/// It's possible to determine the value of a register based on a dominating
@@ -117,7 +125,7 @@ INITIALIZE_PASS(AArch64RedundantCopyElimination, "aarch64-copyelim",
/// the constant in \p MBB for some cases. If we find any constant values, push
/// a physical register and constant value pair onto the KnownRegs vector and
/// return true. Otherwise, return false if no known values were found.
-bool AArch64RedundantCopyElimination::knownRegValInBlock(
+bool AArch64RedundantCopyEliminationImpl::knownRegValInBlock(
MachineInstr &CondBr, MachineBasicBlock *MBB,
SmallVectorImpl<RegImm> &KnownRegs, MachineBasicBlock::iterator &FirstUse) {
unsigned Opc = CondBr.getOpcode();
@@ -272,7 +280,7 @@ bool AArch64RedundantCopyElimination::knownRegValInBlock(
return false;
}
-bool AArch64RedundantCopyElimination::optimizeBlock(MachineBasicBlock *MBB) {
+bool AArch64RedundantCopyEliminationImpl::optimizeBlock(MachineBasicBlock *MBB) {
// Check if the current basic block has a single predecessor.
if (MBB->pred_size() != 1)
return false;
@@ -470,10 +478,7 @@ bool AArch64RedundantCopyElimination::optimizeBlock(MachineBasicBlock *MBB) {
return true;
}
-bool AArch64RedundantCopyElimination::runOnMachineFunction(
- MachineFunction &MF) {
- if (skipFunction(MF.getFunction()))
- return false;
+bool AArch64RedundantCopyEliminationImpl::run(MachineFunction &MF) {
TRI = MF.getSubtarget().getRegisterInfo();
MRI = &MF.getRegInfo();
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
@@ -493,6 +498,24 @@ bool AArch64RedundantCopyElimination::runOnMachineFunction(
return Changed;
}
+bool AArch64RedundantCopyEliminationLegacy::runOnMachineFunction(
+ MachineFunction &MF) {
+ if (skipFunction(MF.getFunction()))
+ return false;
+ return AArch64RedundantCopyEliminationImpl().run(MF);
+}
+
+PreservedAnalyses
+AArch64RedundantCopyEliminationPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ const bool Changed = AArch64RedundantCopyEliminationImpl().run(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
+}
+
FunctionPass *llvm::createAArch64RedundantCopyEliminationPass() {
- return new AArch64RedundantCopyElimination();
+ return new AArch64RedundantCopyEliminationLegacy();
}
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 94fbe709d6fe1..89add4b8c104d 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -265,7 +265,7 @@ LLVMInitializeAArch64Target() {
initializeAArch64PostLegalizerLoweringPass(PR);
initializeAArch64PostSelectOptimizePass(PR);
initializeAArch64PromoteConstantPass(PR);
- initializeAArch64RedundantCopyEliminationPass(PR);
+ initializeAArch64RedundantCopyEliminationLegacyPass(PR);
initializeAArch64RedundantCondBranchPass(PR);
initializeAArch64StorePairSuppressPass(PR);
initializeFalkorHWPFFixPass(PR);
diff --git a/llvm/test/CodeGen/AArch64/machine-copy-remove.mir b/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
index b2fc40a4d2553..5d39861178207 100644
--- a/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
+++ b/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64--linux-gnu -passes=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
---
# Check that bb.0 COPY is seen through to allow the bb.1 COPY of XZR to be removed.
# CHECK-LABEL: name: test1
diff --git a/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir b/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
index 37a7eb0dafcbc..da28615c46871 100644
--- a/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
+++ b/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64--linux-gnu -passes=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
---
# CHECK-LABEL: name: test1
# CHECK: ANDSWri $w0, 1, implicit-def $nzcv
>From d0797f11b2d1bed22b1b39cefcb1dd2e1e4d99fe Mon Sep 17 00:00:00 2001
From: Kyungtak Woo <kevinwkt at google.com>
Date: Mon, 6 Apr 2026 06:01:50 +0000
Subject: [PATCH 2/3] fmt fix
---
llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
index 26385b08c9c29..414f5501bb18a 100644
--- a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
@@ -280,7 +280,8 @@ bool AArch64RedundantCopyEliminationImpl::knownRegValInBlock(
return false;
}
-bool AArch64RedundantCopyEliminationImpl::optimizeBlock(MachineBasicBlock *MBB) {
+bool AArch64RedundantCopyEliminationImpl::optimizeBlock(
+ MachineBasicBlock *MBB) {
// Check if the current basic block has a single predecessor.
if (MBB->pred_size() != 1)
return false;
>From 635c4c7ca74ffd7c1a3d771aca67cd94b210fbff Mon Sep 17 00:00:00 2001
From: Kyungtak Woo <kevinwkt at google.com>
Date: Wed, 8 Apr 2026 01:29:05 +0000
Subject: [PATCH 3/3] get rid of verify-machineinstrs
---
llvm/test/CodeGen/AArch64/machine-copy-remove.mir | 2 +-
llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/machine-copy-remove.mir b/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
index 5d39861178207..731f86af102b5 100644
--- a/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
+++ b/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
-# RUN: llc -mtriple=aarch64--linux-gnu -passes=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64--linux-gnu -passes=aarch64-copyelim %s -o - | FileCheck %s
---
# Check that bb.0 COPY is seen through to allow the bb.1 COPY of XZR to be removed.
# CHECK-LABEL: name: test1
diff --git a/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir b/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
index da28615c46871..8890af354ccc0 100644
--- a/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
+++ b/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
-# RUN: llc -mtriple=aarch64--linux-gnu -passes=aarch64-copyelim %s -verify-machineinstrs -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64--linux-gnu -passes=aarch64-copyelim %s -o - | FileCheck %s
---
# CHECK-LABEL: name: test1
# CHECK: ANDSWri $w0, 1, implicit-def $nzcv
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