[llvm] [SPIR-V] Use OpDecorateId instead of OpDecorate for memory aliasing decorations (PR #190731)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-spir-v

Author: Arseniy Obolenskiy (aobolensk)

<details>
<summary>Changes</summary>

AliasScopeINTEL and NoAliasINTEL decorations take ID operands, so they must use OpDecorateId rather than OpDecorate per the SPIR-V spec

---
Full diff: https://github.com/llvm/llvm-project/pull/190731.diff


4 Files Affected:

- (modified) llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp (+1-1) 
- (modified) llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp (+1-1) 
- (modified) llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll (+2-1) 
- (modified) llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll (+8-7) 


``````````diff
diff --git a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
index 6a3bc39b8e73b..b7dcd10bac809 100644
--- a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
+++ b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
@@ -135,7 +135,7 @@ void SPIRVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
     recordIntType(MI);
   }
 
-  if (OpCode == SPIRV::OpDecorate) {
+  if (OpCode == SPIRV::OpDecorate || OpCode == SPIRV::OpDecorateId) {
     printOpDecorate(MI, OS);
   } else if (OpCode == SPIRV::OpExtInstImport) {
     recordOpExtInstImport(MI);
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 50f672768f141..0377dfe378e49 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -2214,7 +2214,7 @@ void SPIRVGlobalRegistry::buildMemAliasingOpDecorate(
       getOrAddMemAliasingINTELInst(MIRBuilder, AliasingListMD);
   if (!AliasList)
     return;
-  MIRBuilder.buildInstr(SPIRV::OpDecorate)
+  MIRBuilder.buildInstr(SPIRV::OpDecorateId)
       .addUse(Reg)
       .addImm(Dec)
       .addUse(AliasList->getOperand(0).getReg());
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
index e8f55dce97a07..96b77ef52e42e 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
@@ -1,13 +1,14 @@
 ; Check aliasing information translation on atomic load and store
 
 ; RUN: llc -O0 -mtriple=spirv64-unknown-unknown -verify-machineinstrs --spirv-ext=+SPV_INTEL_memory_access_aliasing %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_memory_access_aliasing %s -o - -filetype=obj | spirv-val %}
 
 ; CHECK: OpCapability MemoryAccessAliasingINTEL
 ; CHECK: OpExtension "SPV_INTEL_memory_access_aliasing"
 ; CHECK: %[[#Domain1:]] = OpAliasDomainDeclINTEL
 ; CHECK: %[[#Scope1:]] = OpAliasScopeDeclINTEL %[[#Domain1]]
 ; CHECK: %[[#List1:]] = OpAliasScopeListDeclINTEL %[[#Scope1]]
-; CHECK: OpDecorate %[[#Load:]] NoAliasINTEL %[[#List1]]
+; CHECK: OpDecorateId %[[#Load:]] NoAliasINTEL %[[#List1]]
 ; CHECK: %[[#Load:]] = OpAtomicLoad
 
 define spir_func i32 @test_load(ptr addrspace(4) %object) #0 {
diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
index dd0987fdfe75d..729a85ea888b5 100644
--- a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
+++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
@@ -2,6 +2,7 @@
 
 ; RUN: llc -O0 -mtriple=spirv64-unknown-unknown -verify-machineinstrs --spirv-ext=+SPV_INTEL_memory_access_aliasing %s -o - | FileCheck %s --check-prefix=CHECK-EXT
 ; RUN: llc -O0 -mtriple=spirv64-unknown-unknown -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-NO-EXT
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_memory_access_aliasing %s -o - -filetype=obj | spirv-val %}
 
 ; CHECK-EXT: OpCapability MemoryAccessAliasingINTEL
 ; CHECK-EXT: OpExtension "SPV_INTEL_memory_access_aliasing"
@@ -14,13 +15,13 @@
 ; CHECK-EXT: %[[#Domain3:]] = OpAliasDomainDeclINTEL
 ; CHECK-EXT: %[[#Scope2:]] = OpAliasScopeDeclINTEL %[[#Domain3]]
 ; CHECK-EXT: %[[#List3:]] = OpAliasScopeListDeclINTEL %[[#Scope2]]
-; CHECK-EXT: OpDecorate %[[#Fun1:]] AliasScopeINTEL %[[#List1]]
-; CHECK-EXT: OpDecorate %[[#Fun2:]] AliasScopeINTEL %[[#List1]]
-; CHECK-EXT: OpDecorate %[[#Fun2]] NoAliasINTEL %[[#List2]]
-; CHECK-EXT: OpDecorate %[[#Fun3:]] NoAliasINTEL %[[#List1]]
-; CHECK-EXT: OpDecorate %[[#Fun4:]] AliasScopeINTEL %[[#List3]]
-; CHECK-EXT: OpDecorate %[[#Fun5:]] AliasScopeINTEL %[[#List3]]
-; CHECK-EXT: OpDecorate %[[#Fun6:]] NoAliasINTEL %[[#List3]]
+; CHECK-EXT: OpDecorateId %[[#Fun1:]] AliasScopeINTEL %[[#List1]]
+; CHECK-EXT: OpDecorateId %[[#Fun2:]] AliasScopeINTEL %[[#List1]]
+; CHECK-EXT: OpDecorateId %[[#Fun2]] NoAliasINTEL %[[#List2]]
+; CHECK-EXT: OpDecorateId %[[#Fun3:]] NoAliasINTEL %[[#List1]]
+; CHECK-EXT: OpDecorateId %[[#Fun4:]] AliasScopeINTEL %[[#List3]]
+; CHECK-EXT: OpDecorateId %[[#Fun5:]] AliasScopeINTEL %[[#List3]]
+; CHECK-EXT: OpDecorateId %[[#Fun6:]] NoAliasINTEL %[[#List3]]
 ; CHECK-EXT: %[[#Fun1]] = OpFunctionCall
 ; CHECK-EXT: %[[#Fun2]] = OpFunctionCall
 ; CHECK-EXT: %[[#Fun3]] = OpFunctionCall

``````````

</details>


https://github.com/llvm/llvm-project/pull/190731