[llvm] [SPARC][IAS] Make 64-bit instructions available in 32-bit mode on V9 (PR #187534)

[Sergei Barannikov via llvm-commits]

s-barannikov wrote:

> > > This should allow usage of 64-bit instructions, like `sllx`/`srlx`, in inline assembly snippets in a source file otherwise intended to target 32-bit V9 processors, as done in, for example, the Linux kernel.
> > 
> > 
> > Sorry, this is not very clear to me. What is `32-bit V9 processor`?
> 
> 32-bit userland on a 64-bit / v9 CPU. Referred to as v8plus.

OK, but then they shouldn't be available if there is no 32-bit userland on a 64-bit / v9 CPU, right? So `HasV9` predicate used on these instructions isn't quite correct (unless `HasV9` is false in V8+ mode). Maybe not a big deal.

https://github.com/llvm/llvm-project/pull/187534