[llvm] [NVPTX][NFC] Use preferred LLVM coding style in NVPTX backend (PR #190572)
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Sun Apr 5 19:22:39 PDT 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-nvptx
Author: Balaji Krishna Yugandhar Atukuri (balaji-krishna-atukuri)
<details>
<summary>Changes</summary>
A multi-file NFC cleanup that replaces non-idiomatic patterns with their preferred LLVM equivalents across the NVPTX backend.
### Changes
- **`.empty()` idiom**: Replace `.size() == 0` / `.size() > 0` with `.empty()` / `!.empty()` in `NVPTXLowerAggrCopies`, `NVPTXAsmPrinter`, `NVPTXISelDAGToDAG`, and `NVPTXTargetTransformInfo`.
- **`static_cast`**: Replace C-style casts with `static_cast` in `NVPTXInstPrinter` and `NVPTXAsmPrinter`.
- **`UINT_MAX`**: Replace `(unsigned)0xFFFFFFFF` with `UINT_MAX` in `NVPTXISelLowering`.
- **Unused include**: Remove `#include "llvm/CodeGen/StackProtector.h"` from `NVPTXAtomicLower.cpp` (not referenced).
- **Typos**: Fix `Optimiztions`, `opportunites`, `undesireable`, `addrspacecat`, `seem`/`seen`, `free'd`/`freed`, `will lets`/`will let` across 7 files.
All changes are mechanical. NVPTX lit tests pass.
---
Full diff: https://github.com/llvm/llvm-project/pull/190572.diff
13 Files Affected:
- (modified) llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp (+3-3)
- (modified) llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp (+2-2)
- (modified) llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp (-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp (+3-3)
- (modified) llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXPeephole.cpp (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp (+3-3)
- (modified) llvm/lib/Target/NVPTX/NVPTXTargetMachine.h (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp (+1-1)
``````````diff
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
index 64419d5cceefe..cf92fa069cb72 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
@@ -284,7 +284,7 @@ void NVPTXInstPrinter::printAtomicCode(const MCInst *MI, int OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O, StringRef Modifier) {
const MCOperand &MO = MI->getOperand(OpNum);
- int Imm = (int)MO.getImm();
+ int Imm = static_cast<int>(MO.getImm());
if (Modifier == "sem") {
auto Ordering = NVPTX::Ordering(Imm);
switch (Ordering) {
@@ -378,7 +378,7 @@ void NVPTXInstPrinter::printMmaCode(const MCInst *MI, int OpNum,
const MCSubtargetInfo &, raw_ostream &O,
StringRef Modifier) {
const MCOperand &MO = MI->getOperand(OpNum);
- int Imm = (int)MO.getImm();
+ int Imm = static_cast<int>(MO.getImm());
if (Modifier.empty() || Modifier == "version") {
O << Imm; // Just print out PTX version
return;
@@ -413,7 +413,7 @@ void NVPTXInstPrinter::printUsedBytesMaskPragma(const MCInst *MI, int OpNum,
raw_ostream &O) {
auto &Op = MI->getOperand(OpNum);
assert(Op.isImm() && "Invalid operand");
- uint32_t Imm = (uint32_t)Op.getImm();
+ uint32_t Imm = static_cast<uint32_t>(Op.getImm());
if (Imm != UINT32_MAX) {
O << ".pragma \"used_bytes_mask " << format_hex(Imm, 1) << "\";\n\t";
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
index 573671de03ab9..842ef2118b8f1 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
@@ -729,7 +729,7 @@ void NVPTXAsmPrinter::emitGlobals(const Module &M) {
VisitGlobalVariableForEmission(&I, Globals, GVVisited, GVVisiting);
assert(GVVisited.size() == M.global_size() && "Missed a global variable");
- assert(GVVisiting.size() == 0 && "Did not fully process a global variable");
+ assert(GVVisiting.empty() && "Did not fully process a global variable");
const NVPTXTargetMachine &NTM = static_cast<const NVPTXTargetMachine &>(TM);
const NVPTXSubtarget &STI = *NTM.getSubtargetImpl();
@@ -1142,7 +1142,7 @@ void NVPTXAsmPrinter::AggBuffer::printBytes(raw_ostream &os) {
if (pos)
os << ", ";
if (pos != nextSymbolPos) {
- os << (unsigned int)buffer[pos];
+ os << static_cast<unsigned int>(buffer[pos]);
++pos;
continue;
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
index 6085a96077661..6bd8803d0491a 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
@@ -46,7 +46,7 @@
#include <string>
#include <vector>
-// The ptx syntax and format is very different from that usually seem in a .s
+// The ptx syntax and format is very different from that usually seen in a .s
// file,
// therefore we are not able to use the MCAsmStreamer interface here.
//
diff --git a/llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp b/llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
index 918daf6c04ecd..b8ca32a57c7f6 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAtomicLower.cpp
@@ -12,7 +12,6 @@
#include "NVPTXAtomicLower.h"
#include "NVPTX.h"
-#include "llvm/CodeGen/StackProtector.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/InstIterator.h"
#include "llvm/IR/Instructions.h"
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
index ede1deb5400b0..37f8a8ea52fe3 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
@@ -1908,7 +1908,7 @@ NVPTX::Scope NVPTXScopes::operator[](SyncScope::ID ID) const {
return S->second;
}
-bool NVPTXScopes::empty() const { return Scopes.size() == 0; }
+bool NVPTXScopes::empty() const { return Scopes.empty(); }
#define CP_ASYNC_BULK_TENSOR_OPCODE(dir, dim, mode, is_s32, suffix) \
(is_s32 \
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index af5991ebf2c8f..773d7a1c606ee 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -514,9 +514,9 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,
// always lower memset, memcpy, and memmove intrinsics to load/store
// instructions, rather
// then generating calls to memset, mempcy or memmove.
- MaxStoresPerMemset = MaxStoresPerMemsetOptSize = (unsigned)0xFFFFFFFF;
- MaxStoresPerMemcpy = MaxStoresPerMemcpyOptSize = (unsigned) 0xFFFFFFFF;
- MaxStoresPerMemmove = MaxStoresPerMemmoveOptSize = (unsigned) 0xFFFFFFFF;
+ MaxStoresPerMemset = MaxStoresPerMemsetOptSize = UINT_MAX;
+ MaxStoresPerMemcpy = MaxStoresPerMemcpyOptSize = UINT_MAX;
+ MaxStoresPerMemmove = MaxStoresPerMemmoveOptSize = UINT_MAX;
setBooleanContents(ZeroOrNegativeOneBooleanContent);
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
index d0b50d2610bd5..13b24ed0c987d 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
@@ -93,7 +93,7 @@ bool NVPTXLowerAggrCopies::runOnFunction(Function &F) {
}
}
- if (AggrLoads.size() == 0 && MemCalls.size() == 0) {
+ if (AggrLoads.empty() && MemCalls.empty()) {
return false;
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
index 42e65d7c9c847..50fd53b473974 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
@@ -78,7 +78,7 @@
// becomes
//
// define void @foo({i32*, i32*}* byval %input) {
-// %b_param = addrspacecat ptr %input to ptr addrspace(101)
+// %b_param = addrspacecast ptr %input to ptr addrspace(101)
// %b_ptr = getelementptr {ptr, ptr}, ptr addrspace(101) %b_param, i64 0, i32 1
// %b = load ptr, ptr addrspace(101) %b_ptr
// %b_global = addrspacecast ptr %b to ptr addrspace(1)
diff --git a/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp b/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
index e9b0aaeca4964..bcf473f55f748 100644
--- a/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
@@ -1,4 +1,4 @@
-//===-- NVPTXPeephole.cpp - NVPTX Peephole Optimiztions -------------------===//
+//===-- NVPTXPeephole.cpp - NVPTX Peephole Optimizations ------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
diff --git a/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h b/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
index 1334bfa035a96..171896c1c4b12 100644
--- a/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
+++ b/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
@@ -23,7 +23,7 @@
namespace llvm {
class NVPTXRegisterInfo : public NVPTXGenRegisterInfo {
private:
- // Hold Strings that can be free'd all together with NVPTXRegisterInfo
+ // Hold Strings that can be freed all together with NVPTXRegisterInfo
BumpPtrAllocator StrAlloc;
UniqueStringSaver StrPool;
// State for debug register mapping that can be mutated even through a const
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index 10e746c502c09..dfc3db9f6e7ca 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -51,7 +51,7 @@ static cl::opt<bool>
cl::desc("Disable load/store vectorizer"),
cl::init(false), cl::Hidden);
-// NVPTX IR Peephole is a new pass; this option will lets us turn it off in case
+// NVPTX IR Peephole is a new pass; this option will let us turn it off in case
// we encounter some issues.
static cl::opt<bool>
DisableNVPTXIRPeephole("disable-nvptx-ir-peephole",
@@ -87,7 +87,7 @@ static cl::opt<bool> UseShortPointersOpt(
// as good as it gets in terms of the effort we could've done, and it's
// certainly a much better effort than what we do now.
//
-// This early injection of the copies has potential to create undesireable
+// This early injection of the copies has potential to create undesirable
// side-effects, so it's disabled by default, for now, until it sees more
// testing.
static cl::opt<bool> EarlyByValArgsCopy(
@@ -310,7 +310,7 @@ void NVPTXPassConfig::addAddressSpaceInferencePasses() {
void NVPTXPassConfig::addStraightLineScalarOptimizationPasses() {
addPass(createSeparateConstOffsetFromGEPPass());
addPass(createSpeculativeExecutionPass());
- // ReassociateGEPs exposes more opportunites for SLSR. See
+ // ReassociateGEPs exposes more opportunities for SLSR. See
// the example in reassociate-geps-and-slsr.ll.
addPass(createStraightLineStrengthReducePass());
// SeparateConstOffsetFromGEP and SLSR creates common expressions which GVN or
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
index 118a01a0352f5..525f30da3f34a 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
@@ -28,7 +28,7 @@ class NVPTXTargetMachine : public CodeGenTargetMachineImpl {
NVPTX::DrvInterface drvInterface;
NVPTXSubtarget Subtarget;
- // Hold Strings that can be free'd all together with NVPTXTargetMachine
+ // Hold Strings that can be freed all together with NVPTXTargetMachine
BumpPtrAllocator StrAlloc;
UniqueStringSaver StrPool;
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
index af560bb1f11bd..d2e40217546ad 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
@@ -663,7 +663,7 @@ void NVPTXTTIImpl::collectKernelLaunchBounds(
LB.push_back({"maxclusterrank", *Val});
const auto MaxNTID = getMaxNTID(F);
- if (MaxNTID.size() > 0)
+ if (!MaxNTID.empty())
LB.push_back({"maxntidx", MaxNTID[0]});
if (MaxNTID.size() > 1)
LB.push_back({"maxntidy", MaxNTID[1]});
``````````
</details>
https://github.com/llvm/llvm-project/pull/190572
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