[llvm] [DAG] computeKnownFPClass - Add handling for AssertNoFPClass (PR #190185)
Joao Victor Amorim Vieira via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 5 12:49:04 PDT 2026
https://github.com/joaovam updated https://github.com/llvm/llvm-project/pull/190185
>From 40e2469648326d6241891aac0b578fac44e2aa7a Mon Sep 17 00:00:00 2001
From: joaovam <amorimvictorjoao3 at gmail.com>
Date: Sun, 5 Apr 2026 16:47:09 -0300
Subject: [PATCH] Add handling for AssertNoFPClass
---
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 8 +++
llvm/test/CodeGen/RISCV/known-fpclass.ll | 52 +++++++++++++++++++
2 files changed, 60 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/known-fpclass.ll
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 137922aa62557..e69c0c5559631 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6106,6 +6106,14 @@ KnownFPClass SelectionDAG::computeKnownFPClass(SDValue Op,
Known.fabs();
break;
}
+ case ISD::AssertNoFPClass: {
+ Known = computeKnownFPClass(Op.getOperand(0), DemandedElts,
+ InterestedClasses, Depth + 1);
+ FPClassTest AssertedClasses =
+ static_cast<FPClassTest>(Op->getConstantOperandVal(1));
+ Known.KnownFPClasses &= ~AssertedClasses;
+ break;
+ }
default:
if (Opcode >= ISD::BUILTIN_OP_END || Opcode == ISD::INTRINSIC_WO_CHAIN ||
Opcode == ISD::INTRINSIC_W_CHAIN || Opcode == ISD::INTRINSIC_VOID) {
diff --git a/llvm/test/CodeGen/RISCV/known-fpclass.ll b/llvm/test/CodeGen/RISCV/known-fpclass.ll
new file mode 100644
index 0000000000000..bc39817f6d5e1
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/known-fpclass.ll
@@ -0,0 +1,52 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d < %s | FileCheck %s
+
+define <vscale x 4 x i1> @test_fcmp_ord_no_nan(<vscale x 4 x float> nofpclass(nan) %a, <vscale x 4 x float> nofpclass(nan) %b) {
+; CHECK-LABEL: test_fcmp_ord_no_nan:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfeq.vv v12, v10, v10
+; CHECK-NEXT: vmfeq.vv v10, v8, v8
+; CHECK-NEXT: vmand.mm v0, v10, v12
+; CHECK-NEXT: ret
+ %cmp = fcmp ord <vscale x 4 x float> %a, %b
+ ret <vscale x 4 x i1> %cmp
+}
+
+define <vscale x 4 x i1> @test_fcmp_uno_no_nan(<vscale x 4 x float> nofpclass(nan) %a, <vscale x 4 x float> nofpclass(nan) %b) {
+; CHECK-LABEL: test_fcmp_uno_no_nan:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v12, v10, v10
+; CHECK-NEXT: vmfne.vv v10, v8, v8
+; CHECK-NEXT: vmor.mm v0, v10, v12
+; CHECK-NEXT: ret
+ %cmp = fcmp uno <vscale x 4 x float> %a, %b
+ ret <vscale x 4 x i1> %cmp
+}
+
+declare <vscale x 4 x i1> @llvm.is.fpclass.nxv4f32(<vscale x 4 x float>, i32)
+
+define <vscale x 4 x i1> @test_is_fpclass_no_inf(<vscale x 4 x float> nofpclass(inf) %a) {
+ ; 512 = 0x200 = fcPosInf | fcNegInf
+; CHECK-LABEL: test_is_fpclass_no_inf:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
+; CHECK-NEXT: vmclr.m v0
+; CHECK-NEXT: ret
+ %class = call <vscale x 4 x i1> @llvm.is.fpclass.nxv4f32(<vscale x 4 x float> %a, i32 512)
+ ret <vscale x 4 x i1> %class
+}
+
+define <vscale x 4 x i1> @test_fabs_no_nan(<vscale x 4 x float> nofpclass(nan) %a) {
+; CHECK-LABEL: test_fabs_no_nan:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vfabs.v v8, v8
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: ret
+ %abs = call <vscale x 4 x float> @llvm.fabs.nxv4f32(<vscale x 4 x float> %a)
+ %cmp = fcmp uno <vscale x 4 x float> %abs, %abs
+ ret <vscale x 4 x i1> %cmp
+}
+
More information about the llvm-commits
mailing list