[llvm] [AVR] Support stack realignment (PR #187129)

Patryk Wychowaniec via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 5 10:01:56 PDT 2026


================

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Patryk27 wrote:

avr-gcc _seems_ to have an optimization pass that tries to allocate FP in a register-pair used for passing an argument:
```cpp
void use(void *);

void fun() {
  _Alignas(64) int x; // lands in r25r24

  use(&x);
}
```
```cpp
void use(int, void *);

void fun() {
  _Alignas(64) int x; // lands in r23r22

  use(123, &x);
}
```
```cpp
void use(int, int, void *);

void fun() {
  _Alignas(64) int x; // lands in r21r20

  use(123, 456, &x);
}
```
When that's not possible, avr-gcc falls back to r17r16:
```cpp
void use(int, int, int, int, void *);

void fun() {
  _Alignas(64) int x; // lands in r17r16

  use(1, 2, 3, 4, &x);
}
```
```cpp
void use(void *);

void fun() {
  _Alignas(64) int x; // lands in r17r16 too, because `use(&y);` trashes r25r24
  int y;

  use(&x);
  use(&y);
  use(&x);
}
```
Because this seems to be just an optimization, I've decided not to try to replicate this behavior now and leave it as a follow-up.

I suspect we should be able to reuse other passes already provided by LLVM - e.g. given this code:
```cpp
void use(void *);

void fun() {
  _Alignas(64) int x;

  use(&x);
}
```
... what we currently emit is:
```asm
fun:
  push r16
  push r17
  push r28
  push r29
  in r28, 61
  in r29, 62
  subi r28, 64
  sbci r29, 0
  in r0, 63
  cli
  out 62, r29
  out 63, r0
  out 61, r28
  movw r16, r28
  subi r16, 192
  sbci r17, 255
  andi r16, 192
  movw r24, r16 # [1]
  call use
```
... and that's easily optimizable by propagating the `[1]` constraint "up" and replacing uses of r17r16 with r25r24 (or so I think!).

https://github.com/llvm/llvm-project/pull/187129


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