[llvm] [AArch64][SPIR-V] Support SPIR_FUNC and SPIR_KERNEL calling conventions (PR #190515)

[Arseniy Obolenskiy via llvm-commits]

https://github.com/aobolensk created https://github.com/llvm/llvm-project/pull/190515

Accept SPIR_FUNC and SPIR_KERNEL in AArch64 call lowering and argument-register classification

This fixes lowering for OpenCL kernels on AArch64, including the reproducer from #69197 on RISC-V (fixed there in #69282), also enables support for part of target triple sensitive tests for [SPIRV-LLVM-Translator](https://github.com/KhronosGroup/SPIRV-LLVM-Translator) on AArch64 (tested on M1)

>From ff651deb3085be35fd0e15b4be9f2d353626406f Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <gooddoog at student.su>
Date: Sun, 5 Apr 2026 12:03:22 +0200
Subject: [PATCH] [AArch64][SPIR-V] Support SPIR_FUNC and SPIR_KERNEL calling
 conventions

Accept SPIR_FUNC and SPIR_KERNEL in AArch64 call lowering and argument-register classification

This fixes lowering for OpenCL kernels on AArch64, including the reproducer from #69197 on RISC-V (fixed in #69282), also enables support for part of target triple sensitive tests for [SPIRV-LLVM-Translator](https://github.com/KhronosGroup/SPIRV-LLVM-Translator) on AArch64 (tested on M1)
---
 .../Target/AArch64/AArch64ISelLowering.cpp    |  2 ++
 .../Target/AArch64/AArch64RegisterInfo.cpp    |  2 ++
 llvm/test/CodeGen/AArch64/spir-func.ll        | 31 +++++++++++++++++++
 3 files changed, 35 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/spir-func.ll

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index e1483ca55b7af..e8237e151fc5a 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -8610,6 +8610,8 @@ CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC,
     [[fallthrough]];
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::SPIR_FUNC:
+  case CallingConv::SPIR_KERNEL:
   case CallingConv::PreserveMost:
   case CallingConv::PreserveAll:
   case CallingConv::CXX_FAST_TLS:
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index 858214464ef33..1cae6b57e67bc 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -690,6 +690,8 @@ bool AArch64RegisterInfo::isArgumentRegister(const MachineFunction &MF,
     [[fallthrough]];
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::SPIR_FUNC:
+  case CallingConv::SPIR_KERNEL:
   case CallingConv::PreserveMost:
   case CallingConv::PreserveAll:
   case CallingConv::CXX_FAST_TLS:
diff --git a/llvm/test/CodeGen/AArch64/spir-func.ll b/llvm/test/CodeGen/AArch64/spir-func.ll
new file mode 100644
index 0000000000000..a04d09e2b6bbf
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/spir-func.ll
@@ -0,0 +1,31 @@
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs -global-isel < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
+
+; Check the SPIR call conventions work.
+
+define spir_func i32 @callee(i32 %a, i32 %b) {
+; CHECK-LABEL: callee:
+; CHECK: add w0, w0, w1
+; CHECK: ret
+  %sum = add i32 %a, %b
+  ret i32 %sum
+}
+
+define spir_func i32 @caller(i32 %x) {
+; CHECK-LABEL: caller:
+; CHECK: mov w1, #7
+; CHECK: bl callee
+; CHECK: ret
+  %call = call spir_func i32 @callee(i32 %x, i32 7)
+  ret i32 %call
+}
+
+declare spir_func i64 @_Z13get_global_idj(i32)
+
+define spir_kernel void @addVectors(ptr %a, ptr %b, ptr %c) {
+; CHECK-LABEL: addVectors:
+; CHECK: bl _Z13get_global_idj
+; CHECK: ret
+  %gid = call spir_func i64 @_Z13get_global_idj(i32 0)
+  ret void
+}